Project Settings
Project Name LED_test Device Name rev_1: GOWIN-GW1N : GW1N_4
Implementation Name rev_1 Top Module [auto]
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 10000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 14 2 0 - 00m:01s - 2019/8/5
17:24:48
(premap)Complete 9 1 0 0m:01s 0m:01s 191MB 2019/8/5
17:24:51
(fpga_mapper)Complete 12 6 0 0m:04s 0m:03s 192MB 2019/8/5
17:24:56
Multi-srs Generator Complete2019/8/5
17:24:49

Area Summary
I/O ports (io_port) 6 Non I/O Register bits (non_io_reg) 27 (0%)
I/O Register bits (total_io_reg) 0 Block Rams (v_ram) 0 (10)
Block Multipliers (dsp_used) 0 (8) LUTs (total_luts) 46 (0%)

Timing Summary
Clock NameReq FreqEst FreqSlack
LED_test|clk145.3 MHz123.5 MHz-1.215
System100.0 MHz234.1 MHz5.729

Optimizations Summary
Combined Clock Conversion 1 / 0