Project Settings |
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Project Name | DK-START-GW1NS2-ledtest | Device Name | rev_1: GOWIN-GW1NS : GW1NS_2C |
Implementation Name | rev_1 | Top Module | ledtest_top |
Pipelining | 1 | Retiming | 0 |
Resource Sharing | 1 | Fanout Guide | 10000 |
Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
Clock Conversion | 1 | FSM Compiler | 1 |
Run Status |
Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
(compiler) | Complete |
9 |
1 |
0 |
- |
00m:01s |
- |
2019/8/6 14:29:08 |
(premap) | Complete |
9 |
0 |
0 |
0m:01s |
0m:02s |
194MB |
2019/8/6 14:29:12 |
(fpga_mapper) | Complete |
12 |
7 |
0 |
0m:04s |
0m:04s |
194MB |
2019/8/6 14:29:17 |
Multi-srs Generator |
Complete | | | | | | | 2019/8/6 14:29:09 |
Area Summary |
|
I/O ports
(io_port) | 18 |
Non I/O Register bits
(non_io_reg) | 143 (11%) |
I/O Register bits
(total_io_reg) | 0 |
Block Rams
(v_ram) | 4 (4) |
LUTs
(total_luts) | 192 (11%) |
| |
Timing Summary |
|
Clock Name | Req Freq | Est Freq | Slack |
GW_CLKDIV|fclk_inferred_clock | 112.8 MHz | 58.2 MHz | -4.156 |
SPI_Z2|N_88_i_inferred_clock | 100.0 MHz | NA | NA |
System | 165.4 MHz | 140.6 MHz | -1.067 |
Optimizations Summary |
Combined Clock Conversion | 0 / 2 |
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