# Thu Dec 20 16:37:51 2018


Copyright (C) 1994-2018 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: O-2018.09G-Beta3
Install: D:\Program Files\Gowin\Gowin_YunYuan_V1.8.3Beta\SynplifyPro
OS: Windows 6.1

Hostname: GW-HW-023

Implementation : rev_1
Synopsys Generic Technology Pre-mapping, Version mapgw, Build 1226R, Built Nov 21 2018 00:25:10


Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)

@A:MF827 :  | No constraint file specified. 
@N:MF284 :  | Setting synthesis effort to medium for the design 
Linked File:  DK-START-GW1NS2-ledtest_scck.rpt
Printing clock  summary report in "E:\Demo_program\DK-START-GW1NSR2\DK-START-GW1NSR2-ledtest\DK-START-GW1NSR2-ledtest\impl\synthesize\rev_1\DK-START-GW1NS2-ledtest_scck.rpt" file 
@N:MF916 :  | Option synthesis_strategy=base is enabled.  
@N:MF248 :  | Running in 64-bit mode. 
@N:MF666 :  | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.) 

Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 102MB peak: 104MB)


Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 102MB peak: 104MB)


Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 104MB peak: 104MB)


Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 115MB peak: 118MB)

@N:MF284 :  | Setting synthesis effort to medium for the design 
@N:MH105 :  | UMR3 is only supported for HAPS-80. 
@N:MH105 :  | UMR3 is only supported for HAPS-80. 
ICG Latch Removal Summary:
Number of ICG latches removed:	0
Number of ICG latches not removed:	0
syn_allowed_resources : blockrams=4  set on top level netlist ledtest_top

Finished netlist restructuring (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 192MB peak: 194MB)



Clock Summary
******************

          Start                             Requested     Requested     Clock        Clock                     Clock
Level     Clock                             Frequency     Period        Type         Group                     Load 
--------------------------------------------------------------------------------------------------------------------
0 -       System                            328.2 MHz     3.047         system       system_clkgroup           0    
                                                                                                                    
0 -       GW_CLKDIV|fclk_inferred_clock     100.0 MHz     10.000        inferred     Autoconstr_clkgroup_0     147  
                                                                                                                    
0 -       SPI_Z2|N_88_i_inferred_clock      100.0 MHz     10.000        inferred     Autoconstr_clkgroup_1     3    
====================================================================================================================



Clock Load Summary
***********************

                                  Clock     Source                                                                                                        Clock Pin                                                                                                                     Non-clock Pin                                                                                                                   Non-clock Pin
Clock                             Load      Pin                                                                                                           Seq Example                                                                                                                   Seq Example                                                                                                                     Comb Example 
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
System                            0         -                                                                                                             -                                                                                                                             -                                                                                                                               -            
                                                                                                                                                                                                                                                                                                                                                                                                                                     
GW_CLKDIV|fclk_inferred_clock     147       Gowin_EMPU_inst.Gowin_EMPU_inst.sysclk.clkdiv_inst.CLKOUT(CLKDIV)                                             Gowin_EMPU_inst.Gowin_EMPU_inst.u_gw_peripherals_interconnect.u_gw_cmsdk_apb2_spi.u_spi.\\genblk1\.c_status_fast\[2\].CLK     -                                                                                                                               -            
                                                                                                                                                                                                                                                                                                                                                                                                                                     
SPI_Z2|N_88_i_inferred_clock      3         Gowin_EMPU_inst.Gowin_EMPU_inst.u_gw_peripherals_interconnect.u_gw_cmsdk_apb2_spi.u_spi.N_88_i_cZ.F(LUT2)     Gowin_EMPU_inst.Gowin_EMPU_inst.u_gw_peripherals_interconnect.u_gw_cmsdk_apb2_spi.u_spi.\\genblk1\.SCLK_MASTER_2.G            Gowin_EMPU_inst.Gowin_EMPU_inst.u_gw_peripherals_interconnect.u_gw_cmsdk_apb2_spi.u_spi.\\genblk1\.SCLK_MASTER_1_fast.CLEAR     -            
=====================================================================================================================================================================================================================================================================================================================================================================================================================================


@N:FX1143 :  | Skipping assigning INTERNAL_VREF to iobanks, because the table of mapping from pin to iobank is not initialized. 
Finished Pre Mapping Phase.
@N:BN225 :  | Writing default property annotation file E:\Demo_program\DK-START-GW1NSR2\DK-START-GW1NSR2-ledtest\DK-START-GW1NSR2-ledtest\impl\synthesize\rev_1\DK-START-GW1NS2-ledtest.sap. 

Starting constraint checker (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 192MB peak: 194MB)


Finished constraint checker preprocessing (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 192MB peak: 194MB)

None
None

Finished constraint checker (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 192MB peak: 194MB)

Pre-mapping successful!

At Mapper Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 108MB peak: 194MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Thu Dec 20 16:37:53 2018

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