PnR Messages
Report Title | Gowin PnR Report |
Design File | E:\Demo_program\DK-START-GW1NSR2\DK-START-GW1NSR2-ledtest\DK-START-GW1NSR2-ledtest\impl\synthesize\rev_1\DK-START-GW1NS2-ledtest.vm |
Physical Constraints File | E:\Demo_program\DK-START-GW1NSR2\DK-START-GW1NSR2-ledtest\DK-START-GW1NSR2-ledtest\src\DK-START-GW1NS2-ledtest.cst |
Timing Constraints File | --- |
Command Line | D:\Program Files\Gowin\Gowin_YunYuan_V1.8.3Beta\Pnr\bin\gowin.exe -do E:\Demo_program\DK-START-GW1NSR2\DK-START-GW1NSR2-ledtest\DK-START-GW1NSR2-ledtest\impl\pnr\cmd.do |
GOWIN Version | v1.8.3.01Beta |
Part Number | GW1NSR-LX2CQN48PES |
Created Time | Thu Dec 20 16:40:12 2018 |
Legal Announcement | Copyright (C)2014-2018 Gowin Semiconductor Corporation. All rights reserved. |
PnR Details
Placer:
Starting Placer:
    Placement Phase 0 ...   REAL time: 0.043 secs
    Placement Phase 1 ...   REAL time: 0.066 secs
    Placement Phase 2 ...   REAL time: 0.047 secs
    Placement Phase 3 ...   REAL time: 2.26 secs
Total REAL time to Placement completion: 2.416 secs.
Resource Usage Summary:
Resource | Usage | Utilization |
CFU Logics | 197(192 LUTs, 5 ALUs)/1728 | 11% |
Registers | 144/1127 | 12% |
    --logic Registers | 144/1080 | 13% |
    --I/O Registers | 0/47 | 0% |
CLSs(ideal) | 104/864 | 12% |
CLSs(used) | 140/864 | 16% |
I/O Ports | 18 | - |
I/O Bufs | 18/33 | 54% |
    --Input Bufs | 2 | - |
    --Output Bufs | 0 | - |
    --Inout Bufs | 16 | - |
Iologics | 0/99 | 0% |
BSRAMs | 4/4 | 100% |
PLLs | 0/1 | 0% |
DLLs | 0/2 | 0% |
DCSs | 0/4 | 0% |
DQCEs | 1/12 | 8% |
OSC | 0/1 | 0% |
I/O Bank Usage Summary:
I/O Bank | Usage |
bank 0 | 5/24(20%) |
bank 1 | 6/9(66%) |
bank 2 | 5/11(45%) |
bank 3 | 2/8(25%) |
Router:
Starting Router:
    Route Phase 0: 981 unrouted;   REAL time: 0 secs
    Route Phase 1: 470 unrouted;   REAL time: 0.04 secs
    Route Phase 2: 0 unrouted;   REAL time: 0.177 secs
Total REAL time to Router completion: 0.217 secs.
Global Clock Usage Summary:
Global Clock | Usage |
PRIMARY | 2/8(25%) |
SECONDARY | 0/8(0%) |
GCLK_PIN | 1/6(16%) |
PLL | 0/1(0%) |
DLL | 0/2(0%) |
CLKDIV | 1/8(12%) |
DLLDLY | 0/8(0%) |
Global Clock Signals:
Signal | Global Clock | Location |
fclk | PRIMARY | LEFT |
AE_test | PRIMARY | LEFT |
Pinout by Port Name:
Port Name | Loc./Bank | Dir. | Site | I/O Type | Drive | Pull Mode | Slew Rate | Clamp | OpenDrain | VREF | BankVccio |
sys_clk | 35/1 | in | IOR3[A] | LVCMOS33 | NA | UP | NA | NA | NA | NA | 3.3 |
reset_n | 14/2 | in | IOB7[B] | LVCMOS33 | NA | UP | NA | NA | NA | NA | 3.3 |
gpio[0] | 3/3 | io | IOL2[A] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[1] | 11/3 | io | IOL7[B] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[2] | 47/0 | io | IOT4[A] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[3] | 45/0 | io | IOT5[A] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[4] | 43/0 | io | IOT6[A] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[5] | 41/0 | io | IOT7[A] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[6] | 39/0 | io | IOT13[A] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[7] | 33/1 | io | IOR4[A] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[8] | 34/1 | io | IOR4[B] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[9] | 31/1 | io | IOR7[B] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[10] | 30/1 | io | IOR8[B] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[11] | 27/1 | io | IOR9[B] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[12] | 24/2 | io | IOB15[B] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[13] | 19/2 | io | IOB11[A] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[14] | 20/2 | io | IOB11[B] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
gpio[15] | 22/2 | io | IOB13[B] | LVCMOS33 | 8 | UP | FAST | NA | OFF | NA | 3.3 |
All Package Pins:
Loc./Bank | Signal | Dir. | Site | Io Type | Pull Mode | Hysteresis | DiffResistor | SingleResistor | p2/0 | UNUSED | - | IOT2[A] | - | - | - | - | - | 48/0 | UNUSED | - | IOT3[A] | - | - | - | - | - | 47/0 | gpio[2] | io | IOT4[A] | LVCMOS33 | UP | NONE | NA | NA | 46/0 | UNUSED | - | IOT4[B] | - | - | - | - | - | 45/0 | gpio[3] | io | IOT5[A] | LVCMOS33 | UP | NONE | NA | NA | 44/0 | UNUSED | - | IOT5[B] | - | - | - | - | - | 43/0 | gpio[4] | io | IOT6[A] | LVCMOS33 | UP | NONE | NA | NA | 42/0 | UNUSED | - | IOT6[B] | - | - | - | - | - | 41/0 | gpio[5] | io | IOT7[A] | LVCMOS33 | UP | NONE | NA | NA | 40/0 | UNUSED | - | IOT7[B] | - | - | - | - | - | p3/0 | UNUSED | - | IOT8[A] | - | - | - | - | - | p4/0 | UNUSED | - | IOT9[A] | - | - | - | - | - | p5/0 | UNUSED | - | IOT10[A] | - | - | - | - | - | p6/0 | UNUSED | - | IOT11[A] | - | - | - | - | - | p7/0 | UNUSED | - | IOT12[A] | - | - | - | - | - | p8/0 | UNUSED | - | IOT12[B] | - | - | - | - | - | 39/0 | gpio[6] | io | IOT13[A] | LVCMOS33 | UP | NONE | NA | NA | 38/0 | UNUSED | - | IOT13[B] | - | - | - | - | - | p9/0 | UNUSED | - | IOT14[A] | - | - | - | - | - | p10/0 | UNUSED | - | IOT15[A] | - | - | - | - | - | p11/0 | UNUSED | - | IOT16[A] | - | - | - | - | - | p12/0 | UNUSED | - | IOT17[A] | - | - | - | - | - | p13/0 | UNUSED | - | IOT18[A] | - | - | - | - | - | p14/0 | UNUSED | - | IOT19[A] | - | - | - | - | - | 14/2 | reset_n | in | IOB7[B] | LVCMOS33 | UP | NONE | NA | NA | 15/2 | UNUSED | - | IOB9[A] | - | - | - | - | - | 16/2 | UNUSED | - | IOB9[B] | - | - | - | - | - | 17/2 | UNUSED | - | IOB10[A] | - | - | - | - | - | 18/2 | UNUSED | - | IOB10[B] | - | - | - | - | - | 19/2 | gpio[13] | io | IOB11[A] | LVCMOS33 | UP | NONE | NA | NA | 20/2 | gpio[14] | io | IOB11[B] | LVCMOS33 | UP | NONE | NA | NA | 21/2 | UNUSED | - | IOB13[A] | - | - | - | - | - | 22/2 | gpio[15] | io | IOB13[B] | LVCMOS33 | UP | NONE | NA | NA | 23/2 | UNUSED | - | IOB15[A] | - | - | - | - | - | 24/2 | gpio[12] | io | IOB15[B] | LVCMOS33 | UP | NONE | NA | NA | 3/3 | gpio[0] | io | IOL2[A] | LVCMOS33 | UP | NONE | NA | OFF | 4/3 | UNUSED | - | IOL6[A] | - | - | - | - | - | 5/3 | UNUSED | - | IOL6[B] | - | - | - | - | - | 6/3 | UNUSED | - | IOL6[D] | - | - | - | - | - | 7/3 | UNUSED | - | IOL6[E] | - | - | - | - | - | 9/3 | UNUSED | - | IOL6[G] | - | - | - | - | - | 10/3 | UNUSED | - | IOL7[A] | - | - | - | - | - | 11/3 | gpio[1] | io | IOL7[B] | LVCMOS33 | UP | NONE | NA | OFF | 35/1 | sys_clk | in | IOR3[A] | LVCMOS33 | UP | NONE | NA | OFF | 33/1 | gpio[7] | io | IOR4[A] | LVCMOS33 | UP | NONE | NA | NA | 34/1 | gpio[8] | io | IOR4[B] | LVCMOS33 | UP | NONE | NA | NA | 32/1 | UNUSED | - | IOR7[A] | - | - | - | - | - | 31/1 | gpio[9] | io | IOR7[B] | LVCMOS33 | UP | NONE | NA | NA | 29/1 | UNUSED | - | IOR8[A] | - | - | - | - | - | 30/1 | gpio[10] | io | IOR8[B] | LVCMOS33 | UP | NONE | NA | NA | 28/1 | UNUSED | - | IOR9[A] | - | - | - | - | - | 27/1 | gpio[11] | io | IOR9[B] | LVCMOS33 | UP | NONE | NA | NA |
Placement and routing completed.