Project Settings |
---|
Project Name | IO_test | Device Name | rev_1: GOWIN-GW2A : GW2A_18 |
Implementation Name | rev_1 | Top Module | [auto] |
Pipelining | 1 | Retiming | 0 |
Resource Sharing | 1 | Fanout Guide | 10000 |
Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
Clock Conversion | 1 | FSM Compiler | 1 |
Run Status |
Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
(compiler) | Complete |
14 |
2 |
0 |
- |
00m:00s |
- |
2019/8/6 14:42:47 |
(premap) | Complete |
9 |
1 |
0 |
0m:01s |
0m:01s |
191MB |
2019/8/6 14:42:51 |
(fpga_mapper) | Complete |
12 |
6 |
0 |
0m:03s |
0m:03s |
191MB |
2019/8/6 14:42:55 |
Multi-srs Generator |
Complete | | | | 00m:01s | | | 2019/8/6 14:42:49 |
Area Summary |
|
I/O ports
(io_port) | 6 |
Non I/O Register bits
(non_io_reg) | 27 (0%) |
I/O Register bits
(total_io_reg) | 0 |
Block Rams
(v_ram) | 0 (46) |
Block Multipliers
(dsp_used) | 0 (24) |
LUTs
(total_luts) | 18 (0%) |
Timing Summary |
|
Clock Name | Req Freq | Est Freq | Slack |
IO_test|clk | 293.5 MHz | 249.5 MHz | -0.601 |
System | 150.0 MHz | 259.4 MHz | 2.811 |
Optimizations Summary |
Combined Clock Conversion | 1 / 0 |
| |
|