-top_module ddr3_syn_top
-include_path {F:/gwip_test/refDesign_sdc/DDR_PSRAM_RefDesign/new_ref_design_v1_9_5_02/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_PHY_1vs2_2A55K/project/src/ddr3_phy_interface/temp/DDR3_PHY}
-disable_insert_pad 0
-ram_rw_check 1
-looplimit 2000
