# project files
add_file "F:/gwip_test/refDesign_sdc/DDR_PSRAM_RefDesign/new_ref_design_v1_9_5_02/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_PHY_1vs2_2A55K/project/temp/gao/ao_0/gw_ao_parameter.v"
add_file "F:/gwip_test/refDesign_sdc/DDR_PSRAM_RefDesign/new_ref_design_v1_9_5_02/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_PHY_1vs2_2A55K/project/temp/gao/ao_0/gw_ao_top_define.v"
add_file "F:/gwip_test/refDesign_sdc/DDR_PSRAM_RefDesign/new_ref_design_v1_9_5_02/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_PHY_1vs2_2A55K/project/temp/gao/ao_0/gw_ao_expression.v"
add_file "E:/Gowin/Gowin_V1.9.5.02Beta/IDE/data/ipcores/GAO/GW_AO_0/gw_ao_crc32.v"
add_file "E:/Gowin/Gowin_V1.9.5.02Beta/IDE/data/ipcores/GAO/GW_AO_0/gw_ao_define.v"
add_file "E:/Gowin/Gowin_V1.9.5.02Beta/IDE/data/ipcores/GAO/GW_AO_0/gw_ao_match.v"
add_file "E:/Gowin/Gowin_V1.9.5.02Beta/IDE/data/ipcores/GAO/GW_AO_0/gw_ao_mem_ctrl.v"
add_file "E:/Gowin/Gowin_V1.9.5.02Beta/IDE/data/ipcores/GAO/GW_AO_0/gw_ao_top.v"

# implementation: "rev_1"
impl -add rev_1 -type fpga

# device options
set_option -technology GOWIN-GW2A
set_option -part GW2A_55
set_option -package PBGA484
set_option -speed_grade -8

set_option -frequency auto
set_option -maxfan 10000
set_option -disable_io_insertion 0
set_option -update_models_cp 0
set_option -rw_check_on_ram 1
set_option -run_prop_extract 1
set_option -symbolic_fsm_compiler 1
set_option -resource_sharing 1
set_option -pipe 1
set_option -retiming 0
set_option -write_apr_constraint 1
set_option -vlog_std sysv
set_option -compiler_compatible 0
set_option -multi_file_compilation_unit 1
set_option -looplimit 2000
set_option -fix_gated_and_generated_clocks 1

# set result format/file
project -result_file "ao_0.vm"
impl -active "rev_1"
project -run -clean

