Project Settings
Project Name ao_control Device Name rev_1: GOWIN-GW2AR : GW2AR_18
Implementation Name rev_1 Top Module [auto]
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 10000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 6 2 0 - 00m:02s - 2020/5/21
13:35:38
(premap)Complete 6 0 0 0m:02s 0m:02s 225MB 2020/5/21
13:35:44
(fpga_mapper)Complete 9 1 0 0m:04s 0m:04s 227MB 2020/5/21
13:35:49
Multi-srs Generator Complete00m:01s2020/5/21
13:35:40

Area Summary
I/O ports (io_port) 17 Non I/O Register bits (non_io_reg) 14 (0%)
I/O Register bits (total_io_reg) 0 Ultra Rams 0
Block Rams (v_ram) 0 (46) Block Multipliers (dsp_used) 0 (24)
LUTs (total_luts) 17 (0%)

Timing Summary
Clock NameReq FreqEst FreqSlack
gw_con_top|tck_i605.2 MHz257.2 MHz-1.118

Optimizations Summary
Combined Clock Conversion 1 / 0