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	  Example DDR1 Design Read Me
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Object device:GW2AR-18-LQFP176
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File List:
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.
|-- doc
|   `-- Readme.txt                              -->  Read Me file (this file)
|-- tb 
|   `-- tb.v                                    -->  TestBench for Example DDR1 design
|-- project
|   `-- ddr1_board_test_18K.gprj          	                -->  GowinYunYuan Project File for Example Design
|   `-- ddr1_board_test_18K.gprj.user                      -->  GowinYunYuan Project File for Example Design
|   |-- impl
|   |   `-- dualpin_config.ini
|   |   `-- commonsyn_config.ini
|   |   |-- config
|   |   |-- pnr
|   |   `-- synthesis_config.ini                -->  Synplify_Pro Config File for Example Design
|   |   |-- synthesize
|   |-- src                          
|       |-- ddr1_syn_top.v                      -->  File for GowinYunYuan Project
|       |-- ddr1.cst                            -->  File for GowinYunYuan Project
|       |-- ddr1.sdc                            -->  File for GowinYunYuan Project
|       |-- ddr1.gao                            -->  File for GowinYunYuan Project
|       |-- DDR1_test_rst.v                     -->  File for GowinYunYuan Project
|       |-- key_debounce.v                      -->  File for GowinYunYuan Project
|       `-- ddr_memory_interface          
|           |-- ddr_memory_interface.v         -->  File for GowinYunYuan Project(Encrypted)
|           |-- ddr_memory_interface.vo        -->  File for GowinYunYuan Project
|           `-- ddr_memory_interface.ipc       -->  File for GowinYunYuan Project
|           |-- temp                            -->  File for GowinYunYuan Project
|-- simulation                               -->  Simulation File

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HOW TO OPEN A PROJECT IN GowinYunYuan:
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1. Unzip the respective design files.
2. Launch GowinYunYuan and select "File -> Open -> Project"
3. In the Open Project dialog, enter the Project location -- "project",select the project"ddr1_board_test_18K.gprj".
4. Click Finish. Now the project is successfully loaded. 

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HOW TO RUN SYNTHESIZE, PLACE AND ROUTE, IP CORE GENERATION, AND TIMING ANALYSIS IN GowinYunYuan:
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1. Click the Process tab in the process panel of the GowinYunYuan dashboard. 
   Double click on Synthsize(Synplify Pro). This will bring the design through synthesis.
2. Click the Process tab in the process panel of the GowinYunYuan dashboard. 
   Double click on Place & Route. This will bring the design through mapping, place and route.
3. Once Place & Route is done, user can double click on Timing Analysis Report to get 
   the timing analysis result.
4. Click on "Project -> Configuration -> Place & Route" to configurate the Post-Place File 
   and SDF File of the design.
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HOW TO RUN SIMULATION
1. User can run functional simulation by software VCS. 
2. User can check waveform by software Verdi.
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HOW TO  GENERATE IP CORE
1. Click the IP Core Generator tab in the Window panel of the GowinYunYuan dashboard.
   Double click on "DDR Memory Interface". This will generate the IP Core for the design.
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