-d F:\gwip_test\refDesign_sdc\DDR_PSRAM_RefDesign\new_ref_design_v1_9_5_02\Gowin_DDR_Memory_Interface_RefDesign\DDR_MC_PHY_1vs2\project\impl\synthesize\rev_1\ddr1_board_test_18K.vm
-p GW2AR-18-LQFP176-8
-pn GW2AR-LV18LQ176C8/I7
-cst F:\gwip_test\refDesign_sdc\DDR_PSRAM_RefDesign\new_ref_design_v1_9_5_02\Gowin_DDR_Memory_Interface_RefDesign\DDR_MC_PHY_1vs2\project\src\ddr1.cst
-cfg F:\gwip_test\refDesign_sdc\DDR_PSRAM_RefDesign\new_ref_design_v1_9_5_02\Gowin_DDR_Memory_Interface_RefDesign\DDR_MC_PHY_1vs2\project\impl\pnr\device.cfg
-sdc F:\gwip_test\refDesign_sdc\DDR_PSRAM_RefDesign\new_ref_design_v1_9_5_02\Gowin_DDR_Memory_Interface_RefDesign\DDR_MC_PHY_1vs2\project\src\ddr1.sdc
-gao F:\gwip_test\refDesign_sdc\DDR_PSRAM_RefDesign\new_ref_design_v1_9_5_02\Gowin_DDR_Memory_Interface_RefDesign\DDR_MC_PHY_1vs2\project\src\gao.v
-bit
-tr
-ph
-o
-timing
