Project Settings |
---|
Project Name | Divider | Device Name | rev_1: GOWIN-GW2A : GW2A_55 |
Implementation Name | rev_1 | Top Module | [auto] |
Pipelining | 1 | Retiming | 0 |
Resource Sharing | 1 | Fanout Guide | 10000 |
Disable I/O Insertion | 1 | Disable Sequential Optimizations | 0 |
Clock Conversion | 1 | FSM Compiler | 1 |
Run Status |
Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
(compiler) | Complete |
8 |
0 |
0 |
- |
00m:01s |
- |
2018/9/28 15:38:37 |
(premap) | Complete |
13 |
1 |
0 |
0m:01s |
0m:02s |
192MB |
2018/9/28 15:38:41 |
(fpga_mapper) | Complete |
16 |
1 |
0 |
0m:04s |
0m:04s |
197MB |
2018/9/28 15:38:46 |
Multi-srs Generator |
Complete | | | | | | | 2018/9/28 15:38:38 |
Area Summary |
|
Non I/O Register bits
(non_io_reg) | 131 (0%) |
I/O Register bits
(total_io_reg) | 0 |
Block Rams
(v_ram) | 0 (140) |
Block Multipliers
(dsp_used) | 0 (20) |
LUTs
(total_luts) | 198 (0%) |
| |
Timing Summary |
|
Clock Name | Req Freq | Est Freq | Slack |
fra_div|clk | 212.4 MHz | 180.6 MHz | -0.831 |
Optimizations Summary |
Combined Clock Conversion | 1 / 0 |
| |
|