Report Title |
Power Analysis Report |
Design File |
E:\myWork\IP\releaseVerify\RefDesign\1.9.9Beta-6\refDesign\Gowin_DVI_RX_RefDesign\project\impl\gwsynthesis\dk_video.vg |
Physical Constraints File |
E:\myWork\IP\releaseVerify\RefDesign\1.9.9Beta-6\refDesign\Gowin_DVI_RX_RefDesign\project\src\dk_video.cst |
Timing Constraints File |
E:\myWork\IP\releaseVerify\RefDesign\1.9.9Beta-6\refDesign\Gowin_DVI_RX_RefDesign\project\src\dk_video.sdc |
Version |
V1.9.9 Beta-6 |
Part Number |
GW2A-LV18PG484C8/I7 |
Device |
GW2A-18 |
Device Version |
C |
Created Time |
Mon Oct 30 11:25:11 2023
|
Legal Announcement |
Copyright (C)2014-2023 Gowin Semiconductor Corporation. All rights reserved. |
Total Power (mW) |
199.200 |
Quiescent Power (mW) |
92.190 |
Dynamic Power (mW) |
107.010 |
Junction Temperature |
29.749 |
Theta JA |
23.840 |
Max Allowed Ambient Temperature |
80.251 |
Default IO Toggle Rate |
0.125 |
Default Remain Toggle Rate |
0.125 |
Use Vectorless Estimation |
false |
Filter Glitches |
false |
Related Vcd File |
|
Related Saif File |
|
Use Custom Theta JA |
false |
Air Flow |
LFM_0 |
Heat Sink |
None |
Use Custom Theta SA |
false |
Board Thermal Model |
None |
Use Custom Theta JB |
false |
Ambient Temperature |
25.000
|
Voltage Source |
Voltage |
Dynamic Current(mA) |
Quiescent Current(mA) |
Power(mW) |
VCC |
1.000 |
81.669 |
61.511 |
143.180 |
VCCX |
2.500 |
1.698 |
11.364 |
32.653 |
VCCIO15 |
1.500 |
0.143 |
0.293 |
0.654 |
VCCIO25 |
2.500 |
8.119 |
0.485 |
21.509 |
VCCIO33 |
3.300 |
0.177 |
0.188 |
1.204 |
Block Type |
Total Power(mW) |
Static Power(mW) |
Average Toggle Rate(millions of transitions/sec) |
Logic |
1.382 |
NA |
8.669 |
IO |
31.181
| 3.950
| 22.807
|
BSRAM |
0.643
| NA |
NA |
PLL |
77.667
| NA |
NA |
Hierarchy Entity |
Total Power(mW) |
Block Dynamic Power(mW) |
video_top |
79.693 |
79.693(79.657) |
video_top/DVI_RX_Top_inst/ |
39.525 |
39.525(39.525) |
video_top/DVI_RX_Top_inst/dvi2rgb_inst/ |
39.525 |
39.525(0.679) |
video_top/DVI_RX_Top_inst/dvi2rgb_inst/u_Data_Aligning_Auto/ |
0.632 |
0.632(0.000) |
video_top/DVI_RX_Top_inst/dvi2rgb_inst/u_tmds_b/ |
0.020 |
0.020(0.000) |
video_top/DVI_RX_Top_inst/dvi2rgb_inst/u_tmds_g/ |
0.014 |
0.014(0.000) |
video_top/DVI_RX_Top_inst/dvi2rgb_inst/u_tmds_r/ |
0.013 |
0.013(0.000) |
video_top/DVI_TX_Top_inst/ |
39.379 |
39.379(39.379) |
video_top/DVI_TX_Top_inst/rgb2dvi_inst/ |
39.379 |
39.379(0.545) |
video_top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_b/ |
0.182 |
0.182(0.000) |
video_top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_g/ |
0.180 |
0.180(0.000) |
video_top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_r/ |
0.184 |
0.184(0.000) |
video_top/EDID_PROM_Top_inst/ |
0.753 |
0.753(0.753) |
video_top/EDID_PROM_Top_inst/i2c_slave_wrapper_inst/ |
0.753 |
0.753(0.753) |
video_top/EDID_PROM_Top_inst/i2c_slave_wrapper_inst/edid_ram_inst/ |
0.654 |
0.654(0.000) |
video_top/EDID_PROM_Top_inst/i2c_slave_wrapper_inst/u_i2c_slave/ |
0.098 |
0.098(0.000) |
Clock Domain |
Clock Frequency(Mhz) |
Total Dynamic Power(mW) |
I_clk |
50.000 |
0.798 |
rx0_pclk |
74.250 |
40.012 |
I_tmds_clk_p |
74.250 |
38.918 |
NO CLOCK DOMAIN |
0.000 |
0.000 |
DVI_RX_Top_inst/dvi2rgb_inst/rPLL_inst/CLKOUTP.default_gen_clk |
371.250 |
0.025 |
DVI_TX_Top_inst/rgb2dvi_inst/rpll_inst/CLKOUT.default_gen_clk |
371.250 |
0.025 |