Project Settings
Project Name gw_empu Device Name rev_1: GOWIN-GW1NS : GW1NS_2C
Implementation Name rev_1 Top Module [auto]
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 10000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 15 4 0 - 00m:02s - 7/30/19
8:55 AM
(premap)Complete 9 0 0 0m:02s 0m:02s 196MB 7/30/19
8:55 AM
(fpga_mapper)Complete 11 8 0 0m:10s 0m:10s 219MB 7/30/19
8:55 AM
Multi-srs Generator Complete7/30/19
8:55 AM

Area Summary
I/O ports (io_port) 38 Non I/O Register bits (non_io_reg) 440 (33%)
I/O Register bits (total_io_reg) 0 Block Rams (v_ram) 4 (4)
LUTs (total_luts) 652 (37%)

Timing Summary
Clock NameReq FreqEst FreqSlack
GW_CLKDIV_ADC|clkout_inferred_clock242.5 MHz206.1 MHz-0.728
GW_CLKDIV|clkout_inferred_clock106.7 MHz60.6 MHz-3.567
System161.0 MHz136.8 MHz-1.096

Optimizations Summary
Combined Clock Conversion 0 / 2