Selecting top level module tb
@N: CG364 :"D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro\lib\generic\gw1n.v":1800:7:1800:9|Synthesizing module PLL in library work.
Running optimization stage 1 on PLL .......
@N: CG364 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\Gowin_PLL.v":9:7:9:15|Synthesizing module Gowin_PLL in library work.
Running optimization stage 1 on Gowin_PLL .......
@N: CG364 :"D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro\lib\generic\gw1n.v":1864:7:1864:9|Synthesizing module GSR in library work.
Running optimization stage 1 on GSR .......
@N: CG364 :"D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro\lib\generic\gw1n.v":375:7:375:10|Synthesizing module TBUF in library work.
Running optimization stage 1 on TBUF .......
Running optimization stage 1 on INV .......
Running optimization stage 1 on LUT4 .......
Running optimization stage 1 on LUT3 .......
Running optimization stage 1 on LUT2 .......
Running optimization stage 1 on MUX2_LUT5 .......
Running optimization stage 1 on MUX2_LUT6 .......
Running optimization stage 1 on DFFC .......
Running optimization stage 1 on DFFCE .......
Running optimization stage 1 on DFFPE .......
Running optimization stage 1 on ALU .......
Running optimization stage 1 on GND .......
Running optimization stage 1 on VCC .......
Running optimization stage 1 on Flash_ctroller_96K .......
Running optimization stage 1 on FLASH96K .......
Running optimization stage 1 on GW_USER_FLASH_96K .......
Running optimization stage 1 on User_Flash_Ctroller_Top_96K .......
@N: CG364 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\gowin_flash_controller\gowin_flash_controller.v":4374:7:4374:32|Synthesizing module Gowin_Flash_Controller_Top in library work.
Running optimization stage 1 on Gowin_Flash_Controller_Top .......
@N: CG364 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":2:7:2:8|Synthesizing module tb in library work.
@N: CG179 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":154:38:154:44|Removing redundant assignment.
Running optimization stage 1 on tb .......
@W: CL190 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":63:0:63:5|Optimizing register bit reg_page_address[1] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":63:0:63:5|Optimizing register bit reg_page_address[2] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":63:0:63:5|Optimizing register bit reg_page_address[3] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":63:0:63:5|Optimizing register bit reg_page_address[4] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":63:0:63:5|Optimizing register bit reg_page_address[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL279 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":63:0:63:5|Pruning register bits 5 to 1 of reg_page_address[5:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
Running optimization stage 2 on tb .......
@N: CL201 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":63:0:63:5|Trying to extract state machine for register i.
Extracted state machine for register i
State machine has 6 reachable states with original encodings of:
   000000
   000001
   000010
   000011
   000100
   000110
@W: CL156 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":162:14:162:20|*Input clk_10m to expression [instance] has undriven bits; assigning undriven bits to 0.  Simulation mismatch possible. Assign all bits of the input.
@W: CL156 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\tb.v":163:17:163:27|*Input clk_10m_p90 to expression [instance] has undriven bits; assigning undriven bits to 0.  Simulation mismatch possible. Assign all bits of the input.
Running optimization stage 2 on Gowin_Flash_Controller_Top .......
@N: CL159 :"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\src\gowin_flash_controller\gowin_flash_controller.v":4389:6:4389:12|Input clk_sys is unused.
Running optimization stage 2 on User_Flash_Ctroller_Top_96K .......
Running optimization stage 2 on GW_USER_FLASH_96K .......
Running optimization stage 2 on FLASH96K .......
Running optimization stage 2 on Flash_ctroller_96K .......
Running optimization stage 2 on VCC .......
Running optimization stage 2 on GND .......
Running optimization stage 2 on ALU .......
Running optimization stage 2 on DFFPE .......
Running optimization stage 2 on DFFCE .......
Running optimization stage 2 on DFFC .......
Running optimization stage 2 on MUX2_LUT6 .......
Running optimization stage 2 on MUX2_LUT5 .......
Running optimization stage 2 on LUT2 .......
Running optimization stage 2 on LUT3 .......
Running optimization stage 2 on LUT4 .......
Running optimization stage 2 on INV .......
Running optimization stage 2 on TBUF .......
Running optimization stage 2 on GSR .......
Running optimization stage 2 on Gowin_PLL .......
Running optimization stage 2 on PLL .......

For a summary of runtime and memory usage per design unit, please see file:
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@L: C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH96K_REG_IF\project\impl\synthesize\rev_1\synwork\layer0.rt.csv

