//Copyright (C)2014-2019 Gowin Semiconductor Corporation.
//All rights reserved.
//File Title: Post-PnR Simulation Model file
//GOWIN Version: V1.9.2.01Beta
//Created Time: Thu Oct 17 14:49:25 2019

module Gowin_Flash_Controller_Top(
	wb_clk_i,
	wb_rst_i,
	wb_addr_i,
	wb_data_i,
	wb_we_i,
	wb_stb_i,
	wb_cyc_i,
	wb_data_o,
	wb_ack_o
);
input wb_clk_i;
input wb_rst_i;
input [4:0] wb_addr_i;
input [31:0] wb_data_i;
input wb_we_i;
input wb_stb_i;
input wb_cyc_i;
output [31:0] wb_data_o;
output wb_ack_o;
wire GND;
wire VCC;
wire wb_ack_o;
wire [4:0] wb_addr_i;
wire wb_clk_i;
wire wb_cyc_i;
wire [31:0] wb_data_i;
wire [31:0] wb_data_o;
wire wb_rst_i;
wire wb_stb_i;
wire wb_we_i;
wire [31:0] \u_Wishbone_Master_Top_608K/wdata ;
wire [8:0] \u_Wishbone_Master_Top_608K/xaddr ;
wire [5:0] \u_Wishbone_Master_Top_608K/yaddr ;
wire [26:8] \u_Wishbone_Master_Top_608K/rdata ;
wire [7:0] \u_Wishbone_Master_Top_608K/cr ;
wire [0:0] \u_Wishbone_Master_Top_608K/sr ;
wire [7:0] \u_Wishbone_Master_Top_608K/cr_3 ;
wire [31:9] \u_Wishbone_Master_Top_608K/wb_dat_o_9 ;
wire [8:8] \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv_0 ;
wire [7:2] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 ;
wire [4:1] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_1 ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_iv_2 ;
wire [8:0] \u_Wishbone_Master_Top_608K/wb_dat_o_9_0 ;
wire \u_Wishbone_Master_Top_608K/un1_Done_signal_wire ;
wire \u_Wishbone_Master_Top_608K/un1_Done_signal_wire_1 ;
wire \u_Wishbone_Master_Top_608K/un1_Done_signal_wire_2 ;
wire \u_Wishbone_Master_Top_608K/Done_signal_wire ;
wire \u_Wishbone_Master_Top_608K/wb_ack_o_2 ;
wire \u_Wishbone_Master_Top_608K/cr_start_sig ;
wire \u_Wishbone_Master_Top_608K/wb_dat_o20 ;
wire \u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ;
wire \u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ;
wire \u_Wishbone_Master_Top_608K/yaddr_1_sqmuxa ;
wire \u_Wishbone_Master_Top_608K/N_26 ;
wire \u_Wishbone_Master_Top_608K/N_27 ;
wire \u_Wishbone_Master_Top_608K/N_29 ;
wire \u_Wishbone_Master_Top_608K/wb_dat_o20_1 ;
wire \u_Wishbone_Master_Top_608K/N_619 ;
wire [6:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_i ;
wire [31:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata ;
wire [5:2] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0 ;
wire [4:1] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0 ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_0 ;
wire [6:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata_m ;
wire [7:6] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3 ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_1 ;
wire [1:1] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0 ;
wire [5:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr ;
wire [5:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr ;
wire [5:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0_0 ;
wire [6:6] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 ;
wire [31:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din ;
wire [31:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 ;
wire [31:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 ;
wire [5:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 ;
wire [3:3] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_fast ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR ;
wire [31:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN ;
wire [5:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR ;
wire [31:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT ;
wire [5:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr ;
wire [31:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/end_cnt_4 ;
wire [1:1] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/end_cnt ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state ;
wire [7:1] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt ;
wire [3:1] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o26 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o25 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_4_i_o2 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_74 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_72 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy_d0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xe ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_ye ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE_7 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_nvstr ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_nvstr ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR_7 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7_iv_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xe ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_prog ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG_7 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_55_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_busy_d0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xe ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_se ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE_7 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_erase ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE_7 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g1_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_fast ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep1 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep2 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_command ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_command ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_command ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/CO0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_46_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_167_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_148_mux ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_22_0_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_180_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_159_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_41_0_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_180_mux_i_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_161_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_168_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_113_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_117_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_114_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_116_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_94_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_93_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_92_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_91_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_90_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_89_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_88_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_87_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_86_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_85_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_84_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_83_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_82_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_81_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_80_0 ;
wire [22:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s ;
wire [22:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt ;
wire [22:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt ;
wire [12:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 ;
wire [4:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp ;
wire [16:16] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_lofx ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z ;
wire [21:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry ;
wire [22:7] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0_COUT ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry ;
wire [8:8] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s_0_COUT ;
wire [6:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry ;
wire [7:7] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s_0_COUT ;
wire [6:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry ;
wire [7:7] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s_0_COUT ;
wire [6:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry ;
wire [7:7] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s_0_COUT ;
wire [6:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry ;
wire [7:7] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s_0_COUT ;
wire [16:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT ;
wire [16:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_SUM ;
wire [4:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0_COUT ;
wire [4:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0_SUM ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_10 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_11 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_12 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_13 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_14 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_15 ;
wire [9:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state ;
wire [7:5] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm ;
wire [1:1] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt ;
wire [31:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt ;
wire [8:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt_4 ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry ;
wire [8:8] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s_0_COUT ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry ;
wire [8:8] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s_0_COUT ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry ;
wire [8:8] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s_0_COUT ;
wire [7:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry ;
wire [8:8] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s_0_COUT ;
wire [6:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry ;
wire [7:7] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s_0_COUT_0 ;
wire [6:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry ;
wire [7:7] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s_0_COUT ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_26_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_158 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_55_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_161 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_52_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_132_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_162_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_133 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_170_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m143_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_172_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_1 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_11_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_115_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_145 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_167_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_157_mux ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_169_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/CO0_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_169_mux_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_3 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_98_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_109 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_64_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_65_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_66_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_67_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_68_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_69_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_70_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_71_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_72_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_73_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_74_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_75_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_76_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_77_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_78_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m68_e_3 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m68_e_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_3 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_3 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2_3 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_112_0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_152_mux ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_41_0_i_1 ;
wire [1:1] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt ;
wire [4:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z ;
wire [4:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns ;
wire [0:0] \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt_4 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/CO0 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_44_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_45 ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_50_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/as_cnt ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_46_i ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt_1_sqmuxa ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt ;
wire \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt_1_sqmuxa ;
VCC VCC_cZ (
  .V(VCC)
);
GND GND_cZ (
  .G(GND)
);
GSR GSR_INST (
	.GSRI(VCC)
);
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[26]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [26]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [26]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [26])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[26] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[21]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [21]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [21]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [21])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[21] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[20]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [20]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [20]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [20])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[20] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[19]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [19]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [19]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [19])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[19] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[18]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [18]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [18]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [18])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[18] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[17]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [17]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [17]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [17])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[17] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[16]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [16]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [16]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [16])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[16] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[15]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [15]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [15]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [15])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[15] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[14]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [14]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [14]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [14])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[14] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[13]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [13]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [13]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [13])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[13] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[11]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [11]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [11]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [11])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[11] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[10]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [10]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [10]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [10])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[10] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[9]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/rdata [9]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [9]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [9])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv[9] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv_0_cZ[8]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I2(\u_Wishbone_Master_Top_608K/wdata [8]),
	.I3(\u_Wishbone_Master_Top_608K/xaddr [8]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv_0 [8])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv_0_cZ[8] .INIT=16'hDC50;
LUT2 \u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(wb_we_i),
	.F(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa )
);
defparam \u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ .INIT=4'h4;
LUT3 \u_Wishbone_Master_Top_608K/un1_Done_signal_wire_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(\u_Wishbone_Master_Top_608K/N_29 ),
	.I2(wb_we_i),
	.F(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire )
);
defparam \u_Wishbone_Master_Top_608K/un1_Done_signal_wire_cZ .INIT=8'hBA;
LUT3 \u_Wishbone_Master_Top_608K/wb_ack_o_2_cZ  (
	.I0(wb_ack_o),
	.I1(wb_cyc_i),
	.I2(wb_stb_i),
	.F(\u_Wishbone_Master_Top_608K/wb_ack_o_2 )
);
defparam \u_Wishbone_Master_Top_608K/wb_ack_o_2_cZ .INIT=8'h40;
LUT2 \u_Wishbone_Master_Top_608K/cr_3_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(wb_data_i[0]),
	.F(\u_Wishbone_Master_Top_608K/cr_3 [0])
);
defparam \u_Wishbone_Master_Top_608K/cr_3_cZ[0] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/cr_3_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(wb_data_i[1]),
	.F(\u_Wishbone_Master_Top_608K/cr_3 [1])
);
defparam \u_Wishbone_Master_Top_608K/cr_3_cZ[1] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/cr_3_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(wb_data_i[2]),
	.F(\u_Wishbone_Master_Top_608K/cr_3 [2])
);
defparam \u_Wishbone_Master_Top_608K/cr_3_cZ[2] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/cr_3_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(wb_data_i[3]),
	.F(\u_Wishbone_Master_Top_608K/cr_3 [3])
);
defparam \u_Wishbone_Master_Top_608K/cr_3_cZ[3] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/cr_3_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(wb_data_i[4]),
	.F(\u_Wishbone_Master_Top_608K/cr_3 [4])
);
defparam \u_Wishbone_Master_Top_608K/cr_3_cZ[4] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/cr_3_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(wb_data_i[5]),
	.F(\u_Wishbone_Master_Top_608K/cr_3 [5])
);
defparam \u_Wishbone_Master_Top_608K/cr_3_cZ[5] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/cr_3_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(wb_data_i[6]),
	.F(\u_Wishbone_Master_Top_608K/cr_3 [6])
);
defparam \u_Wishbone_Master_Top_608K/cr_3_cZ[6] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/cr_3_cZ[7]  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(wb_data_i[7]),
	.F(\u_Wishbone_Master_Top_608K/cr_3 [7])
);
defparam \u_Wishbone_Master_Top_608K/cr_3_cZ[7] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/wb_dat_o20_1_cZ  (
	.I0(wb_addr_i[0]),
	.I1(wb_addr_i[1]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o20_1 )
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o20_1_cZ .INIT=4'h1;
LUT2 \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv_1[8]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/rdata [8]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [8])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv_1[8] .INIT=4'h4;
DFF \u_Wishbone_Master_Top_608K/wb_ack_o_Z  (
	.D(\u_Wishbone_Master_Top_608K/wb_ack_o_2 ),
	.CLK(wb_clk_i),
	.Q(wb_ack_o)
);
defparam \u_Wishbone_Master_Top_608K/wb_ack_o_Z .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[13]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [13]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[13])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[13] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[12]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [12]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[12])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[12] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[11]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [11]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[11])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[11] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[10]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [10]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[10])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[10] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[9]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [9]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[9])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[9] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[28]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [28]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[28])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[28] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[27]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [27]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[27])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[27] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[26]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [26]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[26])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[26] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[25]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [25]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[25])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[25] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[24]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [24]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[24])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[24] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[23]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [23]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[23])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[23] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[22]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [22]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[22])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[22] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[21]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [21]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[21])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[21] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[20]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [20]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[20])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[20] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[19]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [19]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[19])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[19] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[18]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [18]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[18])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[18] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[17]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [17]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[17])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[17] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[16]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [16]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[16])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[16] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[15]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [15]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[15])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[15] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[14]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [14]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[14])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[14] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[31]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [31]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[31])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[31] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[30]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [30]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[30])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[30] .INIT=1'b0;
DFF \u_Wishbone_Master_Top_608K/wb_dat_o_Z[29]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [29]),
	.CLK(wb_clk_i),
	.Q(wb_data_o[29])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[29] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/yaddr_Z[5]  (
	.D(wb_data_i[5]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/yaddr_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/yaddr [5])
);
defparam \u_Wishbone_Master_Top_608K/yaddr_Z[5] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/yaddr_Z[4]  (
	.D(wb_data_i[4]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/yaddr_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/yaddr [4])
);
defparam \u_Wishbone_Master_Top_608K/yaddr_Z[4] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/yaddr_Z[3]  (
	.D(wb_data_i[3]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/yaddr_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/yaddr [3])
);
defparam \u_Wishbone_Master_Top_608K/yaddr_Z[3] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/yaddr_Z[2]  (
	.D(wb_data_i[2]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/yaddr_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/yaddr [2])
);
defparam \u_Wishbone_Master_Top_608K/yaddr_Z[2] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/yaddr_Z[1]  (
	.D(wb_data_i[1]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/yaddr_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/yaddr [1])
);
defparam \u_Wishbone_Master_Top_608K/yaddr_Z[1] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/yaddr_Z[0]  (
	.D(wb_data_i[0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/yaddr_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/yaddr [0])
);
defparam \u_Wishbone_Master_Top_608K/yaddr_Z[0] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[8]  (
	.D(wb_data_i[8]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [8])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[8] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[7]  (
	.D(wb_data_i[7]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [7])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[7] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[6]  (
	.D(wb_data_i[6]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [6])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[6] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[5]  (
	.D(wb_data_i[5]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [5])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[5] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[4]  (
	.D(wb_data_i[4]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [4])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[4] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[3]  (
	.D(wb_data_i[3]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [3])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[3] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[2]  (
	.D(wb_data_i[2]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [2])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[2] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[1]  (
	.D(wb_data_i[1]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [1])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[1] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/xaddr_Z[0]  (
	.D(wb_data_i[0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/xaddr [0])
);
defparam \u_Wishbone_Master_Top_608K/xaddr_Z[0] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[31]  (
	.D(wb_data_i[31]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [31])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[31] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[30]  (
	.D(wb_data_i[30]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [30])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[30] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[29]  (
	.D(wb_data_i[29]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [29])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[29] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[28]  (
	.D(wb_data_i[28]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [28])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[28] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[27]  (
	.D(wb_data_i[27]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [27])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[27] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[26]  (
	.D(wb_data_i[26]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [26])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[26] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[25]  (
	.D(wb_data_i[25]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [25])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[25] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[24]  (
	.D(wb_data_i[24]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [24])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[24] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[23]  (
	.D(wb_data_i[23]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [23])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[23] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[22]  (
	.D(wb_data_i[22]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [22])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[22] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[21]  (
	.D(wb_data_i[21]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [21])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[21] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[20]  (
	.D(wb_data_i[20]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [20])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[20] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[19]  (
	.D(wb_data_i[19]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [19])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[19] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[18]  (
	.D(wb_data_i[18]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [18])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[18] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[17]  (
	.D(wb_data_i[17]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [17])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[17] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[16]  (
	.D(wb_data_i[16]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [16])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[16] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[15]  (
	.D(wb_data_i[15]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [15])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[15] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[14]  (
	.D(wb_data_i[14]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [14])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[14] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[13]  (
	.D(wb_data_i[13]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [13])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[13] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[12]  (
	.D(wb_data_i[12]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [12])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[12] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[11]  (
	.D(wb_data_i[11]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [11])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[11] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[10]  (
	.D(wb_data_i[10]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [10])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[10] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[9]  (
	.D(wb_data_i[9]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [9])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[9] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[8]  (
	.D(wb_data_i[8]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [8])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[8] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[7]  (
	.D(wb_data_i[7]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [7])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[7] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[6]  (
	.D(wb_data_i[6]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [6])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[6] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[5]  (
	.D(wb_data_i[5]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [5])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[5] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[4]  (
	.D(wb_data_i[4]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [4])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[4] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[3]  (
	.D(wb_data_i[3]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [3])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[3] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[2]  (
	.D(wb_data_i[2]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [2])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[2] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[1]  (
	.D(wb_data_i[1]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [1])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[1] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/wdata_Z[0]  (
	.D(wb_data_i[0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/wdata_1_sqmuxa ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/wdata [0])
);
defparam \u_Wishbone_Master_Top_608K/wdata_Z[0] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [7]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr [7])
);
defparam \u_Wishbone_Master_Top_608K/cr_Z[7] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [6]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr [6])
);
defparam \u_Wishbone_Master_Top_608K/cr_Z[6] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [5]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr [5])
);
defparam \u_Wishbone_Master_Top_608K/cr_Z[5] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [4]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr [4])
);
defparam \u_Wishbone_Master_Top_608K/cr_Z[4] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [3]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr [3])
);
defparam \u_Wishbone_Master_Top_608K/cr_Z[3] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [2]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr [2])
);
defparam \u_Wishbone_Master_Top_608K/cr_Z[2] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [1]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr [1])
);
defparam \u_Wishbone_Master_Top_608K/cr_Z[1] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr [0])
);
defparam \u_Wishbone_Master_Top_608K/cr_Z[0] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/cr_start_sig_Z  (
	.D(\u_Wishbone_Master_Top_608K/cr_3 [0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire_1 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/cr_start_sig )
);
defparam \u_Wishbone_Master_Top_608K/cr_start_sig_Z .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/sr_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire_2 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/sr [0])
);
defparam \u_Wishbone_Master_Top_608K/sr_Z[0] .INIT=1'b0;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [1]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_1 [1]),
	.Q(wb_data_o[1])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[1] .INIT=1'b1;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [0]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_iv_2 [0]),
	.Q(wb_data_o[0])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[0] .INIT=1'b1;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [4]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_1 [4]),
	.Q(wb_data_o[4])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[4] .INIT=1'b1;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [5]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [5]),
	.Q(wb_data_o[5])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[5] .INIT=1'b1;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [3]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [3]),
	.Q(wb_data_o[3])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[3] .INIT=1'b1;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [2]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [2]),
	.Q(wb_data_o[2])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[2] .INIT=1'b1;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [8]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0_iv_0 [8]),
	.Q(wb_data_o[8])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[8] .INIT=1'b1;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [6]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [6]),
	.Q(wb_data_o[6])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[6] .INIT=1'b1;
DFFS \u_Wishbone_Master_Top_608K/wb_dat_o_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [7]),
	.CLK(wb_clk_i),
	.SET(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [7]),
	.Q(wb_data_o[7])
);
defparam \u_Wishbone_Master_Top_608K/wb_dat_o_Z[7] .INIT=1'b1;
INV \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_i_cZ[0]  (
	.I(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [0]),
	.O(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_i [0])
);
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv[31]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [31]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [31]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [31])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv[31] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv[12]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [12]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [12]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv[12] .INIT=16'h7350;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_Done_signal_wire_2  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o26 ),
	.I2(wb_we_i),
	.F(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire_2 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_Done_signal_wire_2 .INIT=8'hEA;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_Done_signal_wire_1  (
	.I0(\u_Wishbone_Master_Top_608K/Done_signal_wire ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o25 ),
	.I2(wb_we_i),
	.F(\u_Wishbone_Master_Top_608K/un1_Done_signal_wire_1 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_Done_signal_wire_1 .INIT=8'hEA;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[30]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [30]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [30]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [30])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[30] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[29]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [29]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [29]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [29])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[29] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[28]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [28]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [28]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [28])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[28] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[27]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [27]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [27]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [27])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[27] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[25]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [25]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [25]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [25])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[25] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[24]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [24]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [24]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [24])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[24] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[23]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [23]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [23]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [23])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[23] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[22]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_27 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [22]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [22]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9 [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0[22] .INIT=16'h7350;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/N_29 ),
	.I2(\u_Wishbone_Master_Top_608K/cr [3]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0_cZ[3] .INIT=16'h7530;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 ),
	.I3(\u_Wishbone_Master_Top_608K/yaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[3] .INIT=16'hF444;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/N_29 ),
	.I2(\u_Wishbone_Master_Top_608K/cr [2]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0_cZ[2] .INIT=16'h7530;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 ),
	.I3(\u_Wishbone_Master_Top_608K/yaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[2] .INIT=16'hF444;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I2(\u_Wishbone_Master_Top_608K/wdata [4]),
	.I3(\u_Wishbone_Master_Top_608K/xaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_cZ[4] .INIT=16'hDC50;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_1[4]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_29 ),
	.I2(\u_Wishbone_Master_Top_608K/cr [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_1 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_1[4] .INIT=16'h7530;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_0_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/N_29 ),
	.I1(\u_Wishbone_Master_Top_608K/cr [0]),
	.I2(\u_Wishbone_Master_Top_608K/cr_start_sig ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o25 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_0 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_0_cZ[0] .INIT=16'hF444;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_2[0]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/sr [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o26 ),
	.I3(\u_Wishbone_Master_Top_608K/wdata [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_iv_2 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_2[0] .INIT=16'hD5C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/N_29 ),
	.I2(\u_Wishbone_Master_Top_608K/cr [5]),
	.I3(\u_Wishbone_Master_Top_608K/wdata [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0_cZ[5] .INIT=16'h7530;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 ),
	.I3(\u_Wishbone_Master_Top_608K/yaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[5] .INIT=16'hF444;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I2(\u_Wishbone_Master_Top_608K/wdata [1]),
	.I3(\u_Wishbone_Master_Top_608K/xaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_cZ[1] .INIT=16'hDC50;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_1[1]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/N_29 ),
	.I2(\u_Wishbone_Master_Top_608K/cr [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_1 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_1[1] .INIT=16'h7530;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_4_i_o2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_74 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[4] .INIT=16'hFF09;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_4_i_o2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_72 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[2] .INIT=16'hFF02;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata_m_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata_m [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata_m_cZ[0] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3_cZ[7]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3_cZ[7] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/N_26 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3_cZ[6] .INIT=4'h4;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/N_29 ),
	.I1(\u_Wishbone_Master_Top_608K/cr [6]),
	.I2(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I3(\u_Wishbone_Master_Top_608K/xaddr [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[6] .INIT=16'hF444;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[7]  (
	.I0(\u_Wishbone_Master_Top_608K/N_29 ),
	.I1(\u_Wishbone_Master_Top_608K/cr [7]),
	.I2(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I3(\u_Wishbone_Master_Top_608K/xaddr [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K.wb_dat_o_9_0_iv_0_1 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_1_cZ[7] .INIT=16'hF444;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_1_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 ),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [0]),
	.I3(\u_Wishbone_Master_Top_608K/yaddr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_1 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_1_cZ[0] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0 [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy_d0 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[1] .INIT=16'hEFAA;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[0] .INIT=16'hC5C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[1] .INIT=16'hC5C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[2] .INIT=16'hC5C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[3] .INIT=16'hC5C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[4] .INIT=16'hC5C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6_cZ[5] .INIT=16'hC5C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE_7_0_iv  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xe ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_ye ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE_7 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE_7_0_iv .INIT=16'hD5C0;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/yaddr_1_sqmuxa  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 ),
	.I1(wb_we_i),
	.F(\u_Wishbone_Master_Top_608K/yaddr_1_sqmuxa )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/yaddr_1_sqmuxa .INIT=4'h8;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xaddr_0_sqmuxa  (
	.I0(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I1(wb_we_i),
	.F(\u_Wishbone_Master_Top_608K/xaddr_0_sqmuxa )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xaddr_0_sqmuxa .INIT=4'h8;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR_7_0_iv  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_nvstr ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_nvstr ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR_7 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR_7_0_iv .INIT=16'hD5C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0_0 [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[0] .INIT=16'h2220;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o26_cZ  (
	.I0(wb_addr_i[2]),
	.I1(wb_addr_i[3]),
	.I2(wb_addr_i[4]),
	.I3(\u_Wishbone_Master_Top_608K/wb_dat_o20_1 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o26 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o26_cZ .INIT=16'h4000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o25_cZ  (
	.I0(wb_addr_i[2]),
	.I1(wb_addr_i[3]),
	.I2(wb_addr_i[4]),
	.I3(\u_Wishbone_Master_Top_608K/wb_dat_o20_1 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o25 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o25_cZ .INIT=16'h2000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o22_i_o3  (
	.I0(wb_addr_i[2]),
	.I1(wb_addr_i[3]),
	.I2(wb_addr_i[4]),
	.I3(\u_Wishbone_Master_Top_608K/wb_dat_o20_1 ),
	.F(\u_Wishbone_Master_Top_608K/N_26 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o22_i_o3 .INIT=16'hFBFF;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3  (
	.I0(wb_addr_i[2]),
	.I1(wb_addr_i[3]),
	.I2(wb_addr_i[4]),
	.I3(\u_Wishbone_Master_Top_608K/wb_dat_o20_1 ),
	.F(\u_Wishbone_Master_Top_608K/N_27 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3 .INIT=16'hF7FF;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[1] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[0] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7_iv  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7_iv_0 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xe ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7_iv .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[8] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[5] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[4] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[7] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[6] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[2] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv[3] .INIT=16'hFECC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[31]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [31]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [31])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[31] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[30]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [30]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [30])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[30] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[29]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [29]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [29])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[29] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[28]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [28]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [28])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[28] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[27]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [27]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [27])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[27] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[26]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [26]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [26])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[26] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[25]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [25]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [25])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[25] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[24]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [24]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [24])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[24] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[23]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [23]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [23])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[23] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[22]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [22]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[22] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[21]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [21]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[21] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[20]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [20]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[20] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[19]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [19]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[19] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[18]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [18]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[18] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[17]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [17]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[17] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[16]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [16]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[16] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[15]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [15]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[15] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[14]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [14]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[14] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[13]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [13]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[13] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[12]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [12]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[12] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[11]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [11]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[11] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[10]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [10]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[10] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[9]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [9]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[9] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[8] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[7] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[6] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[5] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[4] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[3] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[2] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[1] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6_cZ[0] .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG_7_0  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_prog ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG_7 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG_7_0 .INIT=16'hFE00;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_55_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_55_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_55_i_cZ .INIT=4'h8;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_cZ .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/cr_start_sig ),
	.I1(\u_Wishbone_Master_Top_608K/sr [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i_cZ .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_4_i_o2 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0_cZ[1] .INIT=8'h04;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o20_0_a2  (
	.I0(wb_addr_i[2]),
	.I1(wb_addr_i[3]),
	.I2(wb_addr_i[4]),
	.I3(\u_Wishbone_Master_Top_608K/wb_dat_o20_1 ),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o20 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o20_0_a2 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o24_i_o3  (
	.I0(wb_addr_i[2]),
	.I1(wb_addr_i[3]),
	.I2(wb_addr_i[4]),
	.I3(\u_Wishbone_Master_Top_608K/wb_dat_o20_1 ),
	.F(\u_Wishbone_Master_Top_608K/N_29 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o24_i_o3 .INIT=16'hEFFF;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21_0_a2  (
	.I0(wb_addr_i[2]),
	.I1(wb_addr_i[3]),
	.I2(wb_addr_i[4]),
	.I3(\u_Wishbone_Master_Top_608K/wb_dat_o20_1 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21_0_a2 .INIT=16'h0200;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_4_i_o2_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/cr_start_sig ),
	.I1(\u_Wishbone_Master_Top_608K/sr [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_4_i_o2 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_4_i_o2_cZ .INIT=8'hDF;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[0] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[2] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[3] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[4] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[5] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[6] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[7]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[7] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[8]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[8] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[9]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [9]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[9] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[10]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [10]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[10] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[11]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [11]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[11] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[12]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [12]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[12] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[13]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [13]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[13] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[14]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [14]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[14] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[15]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [15]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[15] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[16]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [16]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[16] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[17]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [17]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[17] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[18]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [18]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[18] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[19]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [19]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[19] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[20]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [20]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[20] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[21]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [21]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[21] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[22]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [22]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[22] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[23]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [23]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [23])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[23] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[24]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [24]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [24])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[24] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[25]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [25]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [25])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[25] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[26]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [26]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [26])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[26] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[27]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [27]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [27])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[27] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[28]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [28]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [28])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[28] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[29]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [29]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [29])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[29] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[30]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [30]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [30])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[30] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[0] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[2] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[3] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[4] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[5] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[6] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[7]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[7] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[8]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[8] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/yaddr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[0] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/yaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[2] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/yaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[3] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/yaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[4] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/yaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[5] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/yaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5_cZ[1] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5_cZ[1] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[31]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [31]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [31])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[31] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/cr [0]),
	.I1(\u_Wishbone_Master_Top_608K/cr [1]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5_cZ[1] .INIT=8'hB0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_busy_d0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xe ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_74 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2[4] .INIT=8'hD0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_72 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2[2] .INIT=8'h8A;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_fast [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/un1_state_UFM_1_i_a3_cZ .INIT=8'h01;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0_0_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/cr_start_sig ),
	.I1(\u_Wishbone_Master_Top_608K/sr [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0_0 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_a2_0_0_cZ[0] .INIT=8'h0D;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[3] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[4] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[5] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[6] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[7] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[0] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[1] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[8] .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7_iv_0_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xe ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xe ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7_iv_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7_iv_0_cZ .INIT=16'hECA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7_iv_0_cZ[2] .INIT=16'hECA0;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_fast [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3_cZ[6] .INIT=4'hE;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE_7_0  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_se ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE_7 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE_7_0 .INIT=4'h8;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE_7_0  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_erase ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE_7 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE_7_0 .INIT=4'h8;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_busy_d0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xe ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28_cZ .INIT=4'h2;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g0_0  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy_d0 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g0_0 .INIT=16'hBAAA;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g0_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_o3 [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g1_0 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g0_cZ .INIT=16'hFFBA;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g1_0_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy_d0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g1_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g1_0_cZ .INIT=4'h8;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_fast_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_fast )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_fast_cZ .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep1_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep1 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep1_cZ .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep2_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep2 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep2_cZ .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_2[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0 [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 ),
	.I2(\u_Wishbone_Master_Top_608K/yaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_2[1] .INIT=8'hEA;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_3[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata_m [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_0 [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_1 [0]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_iv_3[0] .INIT=8'hFE;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_2[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0 [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o21 ),
	.I2(\u_Wishbone_Master_Top_608K/yaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_2[4] .INIT=8'hEA;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_2[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0 [5]),
	.I1(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_2[5] .INIT=8'hEA;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_2[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0 [3]),
	.I1(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_2[3] .INIT=8'hEA;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_2[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0 [2]),
	.I1(\u_Wishbone_Master_Top_608K/wb_dat_o20 ),
	.I2(\u_Wishbone_Master_Top_608K/xaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_2[2] .INIT=8'hEA;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3 [6]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [6]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0[6] .INIT=8'hDC;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/N_27 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_a3 [7]),
	.I2(\u_Wishbone_Master_Top_608K/wdata [7]),
	.F(\u_Wishbone_Master_Top_608K/wb_dat_o_9_0 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_0[7] .INIT=8'hDC;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep2 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep2_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_rep1 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_3_rep1_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_fast_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i_fast ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_fast [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_fast_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy_d0_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_command_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_command )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_command_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_busy_d0_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xe ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_busy_d0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_busy_d0_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_command_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_command )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_command_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy_d0_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy_d0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy_d0_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_52_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[1] .INIT=1'b0;
DFFP \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [0]),
	.CLK(wb_clk_i),
	.PRESET(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[0] .INIT=1'b1;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE_7 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_7 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE_7 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG_7 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR_7 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE_7 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_command_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_command )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_command_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_55_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_6 [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_7 [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[16]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [16]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[16] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[15]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [15]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[15] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[14]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [14]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[14] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[13]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [13]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[13] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[12]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [12]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[12] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[11]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [11]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[11] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[10]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [10]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[10] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[9]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [9]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[9] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[31]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [31]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [31])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[31] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[30]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [30]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [30])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[30] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[29]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [29]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [29])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[29] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[28]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [28]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [28])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[28] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[27]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [27]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [27])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[27] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[26]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [26]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [26])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[26] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[25]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [25]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [25])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[25] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[24]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [24]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [24])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[24] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[23]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [23]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [23])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[23] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[22]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [22]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[22] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[21]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [21]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[21] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[20]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [20]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[20] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[19]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [19]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[19] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[18]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [18]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[18] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[17]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_6 [17]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN_Z[17] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[31]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [31]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [31])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[31] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[30]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [30]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [30])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[30] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[29]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [29]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [29])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[29] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[28]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [28]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [28])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[28] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[27]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [27]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [27])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[27] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[26]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [26]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [26])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[26] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[25]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [25]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [25])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[25] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[24]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [24]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [24])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[24] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[23]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [23]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [23])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[23] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[22]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [22]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[22] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[21]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [21]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[21] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[20]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [20]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[20] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[19]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [19]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[19] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[18]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [18]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[18] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[17]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [17]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[17] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[16]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [16]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[16] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[15]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [15]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[15] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[14]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [14]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[14] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[13]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [13]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[13] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[12]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [12]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[12] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[11]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [11]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[11] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[10]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [10]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[10] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[9]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [9]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[9] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [8]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/rdata [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[8] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [7]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[7] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [6]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[6] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [5]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[5] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [4]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[4] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [3]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[3] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [2]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[2] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [1]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[1] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM28 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/rdata [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/comp_data[0] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [5]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[5] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [4]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[4] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [3]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[3] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [2]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[2] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [1]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[1] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_5 [0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr_Z[0] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [8]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[8] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [7]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[7] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [6]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[6] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [5]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[5] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [4]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[4] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [3]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[3] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [2]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[2] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [1]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[1] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_5 [0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr_Z[0] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[31]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [31]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [31])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[31] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[30]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [30]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [30])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[30] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[29]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [29]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [29])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[29] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[28]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [28]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [28])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[28] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[27]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [27]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [27])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[27] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[26]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [26]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [26])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[26] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[25]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [25]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [25])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[25] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[24]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [24]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [24])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[24] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[23]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [23]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [23])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[23] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[22]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [22]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[22] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[21]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [21]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[21] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[20]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [20]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[20] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[19]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [19]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[19] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[18]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [18]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[18] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[17]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [17]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[17] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[16]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [16]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[16] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[15]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [15]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[15] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[14]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [14]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[14] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[13]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [13]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[13] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[12]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [12]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[12] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[11]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [11]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[11] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[10]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [10]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[10] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[9]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [9]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[9] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [8]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[8] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [7]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[7] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [6]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[6] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [5]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[5] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [4]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[4] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [3]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[3] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [2]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[2] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [1]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[1] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_5 [0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_64_i ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_Z[0] .INIT=1'b0;
DFFCE \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/Done_signal_reg  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_i [0]),
	.CLK(wb_clk_i),
	.CE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/g0 ),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/Done_signal_wire )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/Done_signal_reg .INIT=1'b0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[0] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[1] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[2] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[3] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[4] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[5] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[6] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[7] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[8] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[9]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [9]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[9] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[10]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [10]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[10] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[11]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [11]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[11] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[12]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [12]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[12] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[13]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [13]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[13] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[14]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [14]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[14] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[15]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [15]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[15] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[16]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [16]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[16] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[17]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [17]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[17] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[18]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [18]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[18] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[19]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [19]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[19] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[20]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [20]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[20] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[21]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [21]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[21] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[22]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [22]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm_0[22] .INIT=16'h7000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[0] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[1] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[2] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[3] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[4] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[5] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[6] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[7] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm_0[8] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[0] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[1] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[2] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[3] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[4] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[5] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[6] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm_0[7] .INIT=16'hA800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[0] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[1] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[2] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[3] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[4] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[5] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[6] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm_0[7] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[0] .INIT=16'h0888;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[1] .INIT=16'h0888;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[2] .INIT=16'h0888;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[3] .INIT=16'h0888;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[4] .INIT=16'h0888;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[5] .INIT=16'h0888;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[6] .INIT=16'h0888;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm_0[7] .INIT=16'h0888;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[0] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[1] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[2] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[3] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[4] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[5] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[6] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm_0[7] .INIT=16'h2A00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_19  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_10 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_11 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_12 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_19 .INIT=16'h8000;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_1_sqmuxa_i_0_a2_3  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_1_sqmuxa_i_0_a2_3 .INIT=8'h80;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_1_sqmuxa_i_0_a2_4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_1_sqmuxa_i_0_a2_4 .INIT=16'h2000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_ns_8_0_.m100_i_o2_4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [7]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_ns_8_0_.m100_i_o2_4 .INIT=16'h7FFF;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_ns_8_0_.m100_i_o2_5  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_ns_8_0_.m100_i_o2_5 .INIT=16'hFBFF;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_1_sqmuxa_3_i_i_o2_4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_1_sqmuxa_3_i_i_o2_4 .INIT=16'hFFFD;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_1_sqmuxa_3_i_i_o2_5  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_1_sqmuxa_3_i_i_o2_5 .INIT=16'hFFFE;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state11_4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state11_4 .INIT=16'h0002;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state11_5  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state11_5 .INIT=16'h0001;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_11_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [10]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_11 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_11_cZ .INIT=16'h0800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_12_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [7]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_12 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_12_cZ .INIT=16'h0001;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_13_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [19]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [21]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_13 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_13_cZ .INIT=16'h0001;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_14_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [16]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [17]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [18]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_14 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_14_cZ .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_15_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [15]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [20]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [22]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_15 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_15_cZ .INIT=8'h80;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_10_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [11]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [13]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_10 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_10_cZ .INIT=4'h8;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_18  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_14 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_15 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [12]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [14]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state23_18 .INIT=16'h0800;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cZ[12]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [12]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [13]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [14]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [15]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cZ[12] .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cZ[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [9]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [10]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [11]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cZ[8] .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp_cZ[4] .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp_cZ[0] .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cZ[4] .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cZ[0] .INIT=16'h8000;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_lofx_cZ[16]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [16]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [17]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [18]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_lofx [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_lofx_cZ[16] .INIT=8'h80;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[22]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [22]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[22] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[21]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [21]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[21] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[20]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [20]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[20] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[19]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [19]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[19] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[18]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [18]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[18] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[17]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [17]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[17] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[16]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [16]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[16] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[15]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [15]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[15] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[14]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [14]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[14] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[13]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [13]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[13] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[12]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [12]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[12] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[11]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [11]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[11] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[10]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [10]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[10] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[9]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [9]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[9] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xe_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_116_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xe )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xe_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvstr_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_114_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_nvstr )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvstr_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_117_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_erase )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_busy_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_113_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_busy )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_busy_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_168_mux_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_161_mux_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_180_mux_i_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_41_0_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_159_mux_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_180_mux_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_22_0_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_148_mux ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[1] .INIT=1'b0;
DFFP \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_167_mux_i ),
	.CLK(wb_clk_i),
	.PRESET(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[0] .INIT=1'b1;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/end_cnt[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_46_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/end_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/end_cnt[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/end_cnt[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/end_cnt_4 [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/CO0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/end_cnt[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_xadr [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/xadr_tmp[5] .INIT=1'b0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0_COUT [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [7]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s_0_COUT [8]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s_0[8] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/rcv_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s_0_COUT [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/whd_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s_0_COUT [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nvs_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s_0_COUT [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_Z [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/nhv_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s_0_COUT [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/cps_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0[18]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [18]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [17]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0_COUT [18]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0[18] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[17]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [17]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [16]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [17]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[17] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[16]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [16]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [15]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [16]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[16] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[15]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [15]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [14]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [15]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[15] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[14]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [14]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [13]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [14]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[14] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[13]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [13]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [12]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [13]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[13] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[12]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [12]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [11]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [12]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[12] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[11]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [11]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [10]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [11]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[11] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[10]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [10]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [9]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [10]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[10] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[9]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [8]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [9]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[9] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [8]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[8] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_SUM [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_SUM [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0[22]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [22]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [21]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0_COUT [22]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s_0[22] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[21]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [21]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [20]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [21]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[21] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[20]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [20]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [19]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [20]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[20] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[19]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt [19]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [16]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry [19]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_s [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_cry_0[19] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[16]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_lofx [16]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [12]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [16]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_SUM [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[16] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[12]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 [12]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [8]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [12]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_SUM [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[12] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0 [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0_COUT [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_COUT [8]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1_SUM [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_1[8] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0_COUT [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0_COUT [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0_SUM [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_0_cp [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0_COUT [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0_SUM [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/erase_cnt_qxu_par_cp_0[0] .ALU_MODE=0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_159_mux_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_26_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_159_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_159_mux_i .INIT=16'hBFAA;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_22_0_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [1]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_22_0_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_22_0_i .INIT=16'hF7F0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_180_mux_i_0  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_158 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_180_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_180_mux_i_0 .INIT=16'hAEEE;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_180_mux_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_55_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_180_mux_i_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_180_mux_i .INIT=16'hEEEA;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_161_mux_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_161 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_161_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_161_mux_i .INIT=16'hEEEA;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_168_mux_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_52_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_4 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m100_i_o2_5 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_168_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_168_mux_i .INIT=16'h555D;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_132_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_132_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_132_i_cZ .INIT=8'hDC;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_162_mux_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_162_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_162_mux_i_cZ .INIT=16'h88F8;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_170_mux_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_133 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_170_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_170_mux_i_cZ .INIT=8'hD5;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_172_mux_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m143_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_172_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_172_mux_i_cZ .INIT=16'hF7F5;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_11_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_1 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_11_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_11_i_cZ .INIT=16'hFBF3;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m114  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_115_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m114 .INIT=16'h05C0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m116  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m116 .INIT=16'h0CA0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m120  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m120 .INIT=16'h0A30;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m124  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m124 .INIT=16'h0350;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[0] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[1] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[2] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[3] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[4] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[5] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[6] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[7] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm_0[8] .INIT=8'h08;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[0] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[1] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[2] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[3] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[4] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[5] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[6] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[7] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm_0[8] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[0] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[1] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[2] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[3] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[4] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[5] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[6] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[7] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm_0[8] .INIT=8'h40;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [0]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[0] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[1] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[2] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[3] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [4]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[4] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[5] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[6] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[7] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm_0[8] .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[0] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[1] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[2] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[3] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[4] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[5] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[6] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm_0[7] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[0] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[1] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[2] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[3] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[4] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[5] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[6] .INIT=8'h20;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [7]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm_0[7] .INIT=8'h20;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m144  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_145 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m144 .INIT=16'h0105;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_167_mux_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_167_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/CO0 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/end_cnt [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_167_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_167_mux_i .INIT=16'hEAAA;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_113_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_157_mux ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_113_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_113_i .INIT=16'hFFFD;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_116_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_157_mux ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_116_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_116_i .INIT=4'hD;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_169_mux_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_169_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/CO0_0 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_169_mux_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_169_mux_i_cZ .INIT=16'hEAAA;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_98_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_1 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [2]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_98_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_98_i_cZ .INIT=16'hFFF7;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m25  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_i_0_a2_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_26_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m25 .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m54  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_55_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m54 .INIT=8'h80;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m108  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_109 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m108 .INIT=4'h8;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m24_e  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_4 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state11_5 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_158 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m24_e .INIT=8'h80;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m62_e  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [6]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state_1_sqmuxa_3_i_i_o2_5 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_161 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m62_e .INIT=8'h02;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[0] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[1] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[2] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[3] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[4] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[5] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[6] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[7] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[8] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[9]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [9]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[9] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[10]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [10]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[10] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[11]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [11]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[11] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[12]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [12]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[12] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[13]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [13]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[13] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[14]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [14]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[14] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[15]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [15]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[15] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[16]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [16]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[16] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[17]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [17]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[17] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[18]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [18]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[18] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[19]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [19]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[19] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[20]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [20]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[20] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[21]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [21]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[21] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[22]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [22]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[22] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[23]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [23]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [23])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[23] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[24]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [24]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [24])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[24] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[25]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [25]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [25])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[25] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[26]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [26]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [26])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[26] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[27]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [27]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [27])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[27] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[28]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [28]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [28])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[28] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[29]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [29]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [29])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[29] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[30]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [30]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [30])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[30] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[31]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wdata_0 [31]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [31])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9_cZ[31] .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m63  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_64_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m63 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m64  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_65_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m64 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m65  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_66_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m65 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m66  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_67_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m66 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m67  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_68_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m67 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m68  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_69_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m68 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m69  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_70_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m69 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m70  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_71_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m70 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m71  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_72_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m71 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m72  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_73_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m72 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m73  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_74_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m73 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m74  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_75_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m74 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m75  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_76_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m75 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m76  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_77_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m76 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m77  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_78_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m77 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m79  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_80_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m79 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m80  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_81_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m80 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m81  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_82_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m81 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m82  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_83_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m82 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m83  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_84_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m83 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m84  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_85_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m84 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m85  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_86_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m85 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m86  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_87_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m86 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m87  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_88_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m87 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m88  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_89_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m88 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m89  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_90_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m89 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m90  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_91_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m90 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m91  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_92_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m91 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m92  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_93_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m92 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m93  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wyaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_94_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m93 .INIT=16'hFE00;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m96  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m96 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m97  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m97 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m98  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m98 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m99  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m99 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m100  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m100 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m101  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m101 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m102  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m102 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m103  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m103 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m104  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [7]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wxaddr [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/xadr_tmp_8 [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m104 .INIT=16'h0100;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m68_e  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m68_e_3 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m68_e_4 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [7]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp13 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m68_e .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12_cZ .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12_cZ .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_97 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2 .INIT=16'h8000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_cZ .INIT=16'hFFF7;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m38_0_o2  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2_3 ),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m38_0_o2 .INIT=16'hFFF7;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m45  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/CO0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/end_cnt [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_46_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m45 .INIT=8'h48;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m51  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/CO0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/end_cnt [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_52_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m51 .INIT=8'hB3;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m111  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/CO0_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_112_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m111 .INIT=8'h48;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m132  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/CO0_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_133 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m132 .INIT=8'hB3;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_117_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_117_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_117_i .INIT=4'hE;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_114_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_114_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_114_i .INIT=4'hE;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m14  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_157_mux )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m14 .INIT=16'h0001;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m68_e_4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m68_e_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m68_e_4 .INIT=16'h0400;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12_4_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state12_4_cZ .INIT=16'h4000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_4_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [7]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_4_cZ .INIT=16'h1000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_4_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_4_cZ .INIT=16'hBFFF;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12_4_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp12_4_cZ .INIT=16'h4000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m38_0_o2_4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m38_0_o2_4 .INIT=16'hBFFF;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m36_e_3  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [3]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m36_e_3 .INIT=8'h80;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m36_e_4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [5]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [6]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/nhv_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m36_e_4 .INIT=16'h4000;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_3_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_3 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_3_cZ .INIT=16'h0001;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m43  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/CO0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [8]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/end_cnt_4 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m43 .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m109  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/CO0_0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt_4 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m109 .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m47_e  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_command ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_148_mux )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m47_e .INIT=4'h8;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m126_e  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_command ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_152_mux )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m126_e .INIT=4'h8;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m50_e  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_command ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [0]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_167_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m50_e .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m129_e  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_command ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_169_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m129_e .INIT=4'h2;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_1_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_1 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m10_1_cZ .INIT=4'h1;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m68_e_3  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m68_e_3 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m68_e_3 .INIT=4'h8;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_3_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [2]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_3 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_1_sqmuxa_2_i_a2_3_cZ .INIT=4'h8;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_3_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_3 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp_3_0_a5_i_o2_3_cZ .INIT=4'hB;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m38_0_o2_3  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [3]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [7]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m38_0_o2_3 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns_9_0_.m38_0_o2_3 .INIT=4'hB;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m143_0_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m143_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m143_0_cZ .INIT=4'h1;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_41_0_i_1_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [5]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_3 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/m36_e_4 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_41_0_i_1 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_41_0_i_1_cZ .INIT=8'h2A;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_41_0_i  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_18 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state23_19 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/e_state [4]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_41_0_i_1 ),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_41_0_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_41_0_i .INIT=16'hFF80;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_lm [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_Z[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_11_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_prog )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_172_mux_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_nvstr )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvstr_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/ye_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_109 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_ye )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/ye_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_busy_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_98_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_busy )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_busy_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_145 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xe )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xe_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[9]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_170_mux_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[9] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_162_mux_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_ns [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_115_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_132_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_152_mux ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[1] .INIT=1'b0;
DFFP \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_169_mux_i ),
	.CLK(wb_clk_i),
	.PRESET(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[0] .INIT=1'b1;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_65_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_64_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_78_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_77_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_76_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_75_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_74_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_73_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_yadr [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/yadr_tmp[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [7]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [6]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [5]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_72_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_71_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_70_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[6] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_69_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_68_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_67_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_66_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_xadr [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/xadr_tmp[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[22]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [22]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [22])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[22] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[21]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [21]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [21])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[21] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[20]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [20]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [20])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[20] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[19]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [19]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [19])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[19] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[18]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [18]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [18])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[18] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[17]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [17]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [17])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[17] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[16]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [16]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [16])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[16] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[15]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [15]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [15])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[15] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[14]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [14]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [14])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[14] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[13]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [13]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [13])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[13] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[12]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [12]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [12])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[12] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[11]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [11]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [11])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[11] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[10]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [10]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [10])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[10] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[9]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [9]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [9])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[9] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [8]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_112_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt_4 [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/CO0_0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[31]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [31]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [31])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[31] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[30]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [30]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [30])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[30] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[29]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [29]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [29])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[29] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[28]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [28]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [28])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[28] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[27]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [27]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [27])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[27] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[26]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [26]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [26])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[26] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[25]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [25]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [25])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[25] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[24]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [24]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [24])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[24] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[23]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp_9 [23]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/w_din [23])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/din_tmp[23] .INIT=1'b0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [7]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s_0_COUT [8]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s_0[8] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/whd_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [7]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s_0_COUT [8]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s_0[8] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/prog_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [7]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s_0_COUT [8]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s_0[8] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgs_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s_0[8]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [7]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s_0_COUT [8]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s_0[8] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/pgh_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s_0_COUT_0 [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvs_cnt_cry_0[0] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s_0[7]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [6]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s_0_COUT [7]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s_0[7] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[6]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [5]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [6]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[6] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[5]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [4]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [5]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[5] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [3]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [4]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[4] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [2]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [3]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[3] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [1]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [2]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[2] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [0]),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [1]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[1] .ALU_MODE=0;
ALU \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt [0]),
	.I1(GND),
	.I3(GND),
	.CIN(VCC),
	.COUT(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry [0]),
	.SUM(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_s [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/nvh_cnt_cry_0[0] .ALU_MODE=0;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_44_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/CO0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt [1]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_44_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_44_i_cZ .INIT=8'h60;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_45 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[4] .INIT=16'hEAC0;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_command ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_45 ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z [0]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[0] .INIT=16'h7350;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_50_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_50_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_50_i_cZ .INIT=8'hFE;
LUT4 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_i_m4[1]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_command ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/as_cnt ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z [0]),
	.I3(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_i_m4[1] .INIT=16'hA3A0;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_46_i_cZ  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/as_cnt ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_46_i )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_46_i_cZ .INIT=4'h4;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[3]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt_1_sqmuxa ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[3] .INIT=8'hEA;
LUT3 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[2]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/as_cnt ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt_1_sqmuxa ),
	.I2(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[2] .INIT=8'hEC;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_o4[4]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/CO0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt [1]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_45 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_o4[4] .INIT=4'h7;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt_4_a4[0]  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/CO0 ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z [4]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt_4 [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt_4_a4[0] .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt_1_sqmuxa_0_a4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt_1_sqmuxa )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt_1_sqmuxa_0_a4 .INIT=4'h4;
LUT2 \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt_1_sqmuxa_0_a4  (
	.I0(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt ),
	.I1(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3]),
	.F(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt_1_sqmuxa )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt_1_sqmuxa_0_a4 .INIT=4'h4;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [4]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [3]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [1]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z[1] .INIT=1'b0;
DFFP \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns [0]),
	.CLK(wb_clk_i),
	.PRESET(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_Z [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state[0] .INIT=1'b1;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xe_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_50_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xe )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xe_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt_1_sqmuxa ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/pws_cnt_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/as_cnt_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_46_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/as_cnt )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/as_cnt_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt_Z  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt_1_sqmuxa ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/ah_cnt_Z .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/se_tmp  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_state [2]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_se )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/se_tmp .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_85_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_84_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_83_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_82_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_81_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_80_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[5]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_94_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [5])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[5] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[4]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_93_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [4])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[4] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[3]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_92_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [3])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[3] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[2]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_91_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [2])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[2] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_90_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_89_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_yadr [0])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/yadr_tmp[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt_Z[1]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/N_44_i ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt [1])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt_Z[1] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt[0]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt_4 [0]),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/CO0 )
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/end_cnt[0] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[8]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_88_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [8])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[8] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[7]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_87_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [7])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[7] .INIT=1'b0;
DFFC \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[6]  (
	.D(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/N_86_0 ),
	.CLK(wb_clk_i),
	.CLEAR(wb_rst_i),
	.Q(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/r_xadr [6])
);
defparam \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/xadr_tmp[6] .INIT=1'b0;
FLASH608K \u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_GW_USER_FLASH_608K/flash_inst  (
	.XE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XE ),
	.YE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YE ),
	.SE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/SE ),
	.PROG(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/PROG ),
	.ERASE(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/ERASE ),
	.NVSTR(\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/NVSTR ),
	.XADR({\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/XADR [8:0]}),
	.YADR({\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/YADR [5:0]}),
	.DIN({\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DIN [31:0]}),
	.DOUT({\u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/DOUT [31:0]})
);
endmodule
