@W: MT529 :"c:\users\qinfei\desktop\gowin_flash_controller\flash96k_reg_if\project\src\tb.v":147:0:147:5|Found inferred clock tb|clk_sys which controls 8 sequential elements including rst_cnt[7:0]. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance. 
