`

    #Build: Synplify Pro (R) P-2019.03G, Build 307R, Sep 25 2019
    #install: D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro
    #OS: Windows 7 6.1
    #Hostname: GW-SW-059

    # Tue Oct 22 17:12:50 2019

    #Implementation: rev_1

    Copyright (C) 1994-2019 Synopsys, Inc.
    This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
    and may only be used pursuant to the terms and conditions of a written license agreement
    with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
    Synopsys software or the associated documentation is strictly prohibited.
    Tool: Synplify Pro (R)
    Build: P-2019.03G
    Install: D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro
    OS: Windows 6.1

    Hostname: GW-SW-059

    Implementation : rev_1
    Synopsys HDL Compiler, Version comp2019q1p1, Build 307R, Built Sep 25 2019 09:21:26

    @N: :  | Running in 64-bit mode
    ###########################################################[

    Copyright (C) 1994-2019 Synopsys, Inc.
    This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
    and may only be used pursuant to the terms and conditions of a written license agreement
    with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
    Synopsys software or the associated documentation is strictly prohibited.
    Tool: Synplify Pro (R)
    Build: P-2019.03G
    Install: D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro
    OS: Windows 6.1

    Hostname: GW-SW-059

    Implementation : rev_1
    Synopsys Verilog Compiler, Version comp2019q1p1, Build 307R, Built Sep 25 2019 09:21:26

    @N: :  | Running in 64-bit mode
    @N:CG1349 :  | Running Verilog Compiler in System Verilog mode

    @N:CG1350 :  | Running Verilog Compiler in Multiple File Compilation Unit mode

    @I::"D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro\lib\generic\gw1n.v" (library work)
    @I::"D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro\lib\vlog\hypermods.v" (library __hyper__lib__)
    @I::"D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro\lib\vlog\umr_capim.v" (library snps_haps)
    @I::"D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro\lib\vlog\scemi_objects.v" (library snps_haps)
    @I::"D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro\lib\vlog\scemi_pipes.svh" (library snps_haps)
    @I::"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH608K_REG_IF\project\src\tb.v" (library work)
    @W:CG289 : tb.v(12) | Specified digits overflow the number's size
    @I::"C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH608K_REG_IF\project\src\gowin_flash_controller\gowin_flash_controller.v" (library work)
    Verilog syntax check successful!
    Selecting top level module tb
    @N:CG364 : gw1n.v(1864) | Synthesizing module GSR in library work.
    Running optimization stage 1 on GSR .......
    Running optimization stage 1 on INV .......
    Running optimization stage 1 on LUT4 .......
    Running optimization stage 1 on LUT3 .......
    Running optimization stage 1 on LUT2 .......
    Running optimization stage 1 on DFFC .......
    Running optimization stage 1 on DFFP .......
    Running optimization stage 1 on DFFCE .......
    Running optimization stage 1 on ALU .......
    Running optimization stage 1 on GND .......
    Running optimization stage 1 on VCC .......
    Running optimization stage 1 on ER_UFM_608K .......
    Running optimization stage 1 on WR_UFM_608K .......
    Running optimization stage 1 on RD_UFM_608K .......
    Running optimization stage 1 on FLASH608K .......
    Running optimization stage 1 on GW_USER_FLASH_608K .......
    Running optimization stage 1 on Flash_Ctroller_608K .......
    @N:CG364 : gowin_flash_controller.v(8280) | Synthesizing module Gowin_Flash_Controller_Top in library work.
    Running optimization stage 1 on Gowin_Flash_Controller_Top .......
    @W:CL168 : gowin_flash_controller.v(8327) | Removing instance GND_cZ because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive.
    @N:CG364 : tb.v(3) | Synthesizing module tb in library work.
    Running optimization stage 1 on tb .......
    @A:CL282 : tb.v(55) | Feedback mux created for signal rdata_reg[31:0]. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value.
    @A:CL282 : tb.v(55) | Feedback mux created for signal erase_reg. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value.
    @W:CL190 : tb.v(55) | Optimizing register bit wdata[1] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wdata[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wdata[8] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wdata[9] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wdata[12] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wdata[13] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wdata[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[0] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[1] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[2] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[3] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[4] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[5] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[6] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[7] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wxaddr[8] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wyaddr[0] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wyaddr[1] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wyaddr[2] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wyaddr[3] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wyaddr[4] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL190 : tb.v(55) | Optimizing register bit wyaddr[5] to a constant 1. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:CL169 : tb.v(55) | Pruning unused register wyaddr[5:0]. Make sure that there are no unused intermediate registers.
    @W:CL169 : tb.v(55) | Pruning unused register wxaddr[8:0]. Make sure that there are no unused intermediate registers.
    @W:CL260 : tb.v(55) | Pruning register bit 18 of wdata[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level.
    @W:CL279 : tb.v(55) | Pruning register bits 13 to 12 of wdata[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
    @W:CL279 : tb.v(55) | Pruning register bits 9 to 8 of wdata[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
    @W:CL260 : tb.v(55) | Pruning register bit 5 of wdata[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level.
    @W:CL260 : tb.v(55) | Pruning register bit 1 of wdata[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level.
    Running optimization stage 2 on tb .......
    @N:CL201 : tb.v(55) | Trying to extract state machine for register i.
    Extracted state machine for register i
    State machine has 11 reachable states with original encodings of:
       00000
       00001
       00010
       00011
       00100
       00101
       00110
       00111
       01000
       01001
       01010
    @W:CL279 : tb.v(55) | Pruning register bits 31 to 20 of wdata[31:19]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
    @W:CL279 : tb.v(55) | Pruning register bits 17 to 15 of wdata[17:14]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
    @W:CL260 : tb.v(55) | Pruning register bit 11 of wdata[11:10]. If this is not the intended behavior, drive the input with valid values, or an input from the top level.
    @W:CL260 : tb.v(55) | Pruning register bit 7 of wdata[7:6]. If this is not the intended behavior, drive the input with valid values, or an input from the top level.
    @W:CL279 : tb.v(55) | Pruning register bits 4 to 3 of wdata[4:2]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
    Running optimization stage 2 on Gowin_Flash_Controller_Top .......
    Running optimization stage 2 on Flash_Ctroller_608K .......
    Running optimization stage 2 on GW_USER_FLASH_608K .......
    Running optimization stage 2 on FLASH608K .......
    Running optimization stage 2 on RD_UFM_608K .......
    Running optimization stage 2 on WR_UFM_608K .......
    Running optimization stage 2 on ER_UFM_608K .......
    Running optimization stage 2 on VCC .......
    Running optimization stage 2 on GND .......
    Running optimization stage 2 on ALU .......
    Running optimization stage 2 on DFFCE .......
    Running optimization stage 2 on DFFP .......
    Running optimization stage 2 on DFFC .......
    Running optimization stage 2 on LUT2 .......
    Running optimization stage 2 on LUT3 .......
    Running optimization stage 2 on LUT4 .......
    Running optimization stage 2 on INV .......
    Running optimization stage 2 on GSR .......

    For a summary of runtime and memory usage per design unit, please see file:
    ==========================================================
    Linked File:  layer0.rt.csv

    At c_ver Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 96MB peak: 96MB)

    Process took 0h:00m:01s realtime, 0h:00m:01s cputime

    Process completed successfully.
    # Tue Oct 22 17:12:52 2019

    ###########################################################]
    ###########################################################[

    Copyright (C) 1994-2019 Synopsys, Inc.
    This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
    and may only be used pursuant to the terms and conditions of a written license agreement
    with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
    Synopsys software or the associated documentation is strictly prohibited.
    Tool: Synplify Pro (R)
    Build: P-2019.03G
    Install: D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro
    OS: Windows 6.1

    Hostname: GW-SW-059

    Implementation : rev_1
    Synopsys Synopsys Netlist Linker, Version comp2019q1p1, Build 307R, Built Sep 25 2019 09:21:26

    @N: :  | Running in 64-bit mode

    At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 89MB peak: 89MB)

    Process took 0h:00m:01s realtime, 0h:00m:01s cputime

    Process completed successfully.
    # Tue Oct 22 17:12:52 2019

    ###########################################################]

    For a summary of runtime and memory usage for all design units, please see file:
    ==========================================================
    Linked File:  FLASH608K_REG_IF_comp.rt.csv

    @END

    At c_hdl Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 19MB peak: 19MB)

    Process took 0h:00m:01s realtime, 0h:00m:01s cputime

    Process completed successfully.
    # Tue Oct 22 17:12:52 2019

    ###########################################################]

`
`

    ###########################################################[

    Copyright (C) 1994-2019 Synopsys, Inc.
    This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
    and may only be used pursuant to the terms and conditions of a written license agreement
    with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
    Synopsys software or the associated documentation is strictly prohibited.
    Tool: Synplify Pro (R)
    Build: P-2019.03G
    Install: D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro
    OS: Windows 6.1

    Hostname: GW-SW-059

    Implementation : rev_1
    Synopsys Synopsys Netlist Linker, Version comp2019q1p1, Build 307R, Built Sep 25 2019 09:21:26

    @N: :  | Running in 64-bit mode

    At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 90MB peak: 90MB)

    Process took 0h:00m:01s realtime, 0h:00m:01s cputime

    Process completed successfully.
    # Tue Oct 22 17:12:53 2019

    ###########################################################]

`
`

    Premap Report

`
`

    # Tue Oct 22 17:12:53 2019

    Copyright (C) 1994-2019 Synopsys, Inc.
    This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
    and may only be used pursuant to the terms and conditions of a written license agreement
    with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
    Synopsys software or the associated documentation is strictly prohibited.
    Tool: Synplify Pro (R)
    Build: P-2019.03G
    Install: D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro
    OS: Windows 6.1

    Hostname: GW-SW-059

    Implementation : rev_1
    Synopsys Generic Technology Pre-mapping, Version mapgw, Build 1450R, Built Sep 25 2019 09:35:08

    Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 117MB peak: 117MB)

    @A:MF827 :  | No constraint file specified.
    Linked File:  FLASH608K_REG_IF_scck.rpt
    Printing clock  summary report in "C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH608K_REG_IF\project\impl\synthesize\rev_1\FLASH608K_REG_IF_scck.rpt" file
    @N:MF916 :  | Option synthesis_strategy=base is enabled.
    @N:MF248 :  | Running in 64-bit mode.
    @N:MF666 :  | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)

    Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 128MB peak: 128MB)

    Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 128MB peak: 128MB)

    Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 129MB peak: 129MB)

    Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 141MB peak: 142MB)

    @W:BN132 : tb.v(55) | Removing sequential instance wdata[19] because it is equivalent to instance wdata[14]. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:BN132 : tb.v(55) | Removing sequential instance wdata[14] because it is equivalent to instance wdata[10]. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:BN132 : tb.v(55) | Removing sequential instance wdata[6] because it is equivalent to instance wdata[10]. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:BN132 : tb.v(55) | Removing sequential instance wdata[2] because it is equivalent to instance wdata[10]. To keep the instance, apply constraint syn_preserve=1 on the instance.
    @W:BN132 : tb.v(55) | Removing sequential instance wdata[10] because it is equivalent to instance wdata[0]. To keep the instance, apply constraint syn_preserve=1 on the instance.
    Encoding state machine i[10:0] (in view: work.tb(verilog))
    original code -> new code
       00000 -> 00000000001
       00001 -> 00000000010
       00010 -> 00000000100
       00011 -> 00000001000
       00100 -> 00000010000
       00101 -> 00000100000
       00110 -> 00001000000
       00111 -> 00010000000
       01000 -> 00100000000
       01001 -> 01000000000
       01010 -> 10000000000

    Starting clock optimization phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)

    Finished clock optimization phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)

    Starting clock optimization report phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)

    Finished clock optimization report phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)

    Finished netlist restructuring (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 224MB)

    Clock Summary
    ******************

              Start      Requested     Requested     Clock        Clock                     Clock
    Level     Clock      Frequency     Period        Type         Group                     Load
    ---------------------------------------------------------------------------------------------
    0 -       System     100.0 MHz     10.000        system       system_clkgroup           0

    0 -       tb|clk     100.0 MHz     10.000        inferred     Autoconstr_clkgroup_0     432
    =============================================================================================

    Clock Load Summary
    ***********************

               Clock     Source        Clock Pin        Non-clock Pin     Non-clock Pin
    Clock      Load      Pin           Seq Example      Seq Example       Comb Example
    -----------------------------------------------------------------------------------
    System     0         -             -                -                 -

    tb|clk     432       clk(port)     key1_temp1.C     -                 -
    ===================================================================================

    ICG Latch Removal Summary:
    Number of ICG latches removed: 0
    Number of ICG latches not removed:	0

    @S |Clock Optimization Summary

    #### START OF PREMAP CLOCK OPTIMIZATION REPORT #####[

    1 non-gated/non-generated clock tree(s) driving 432 clock pin(s) of sequential element(s)
    0 gated/generated clock tree(s) driving 0 clock pin(s) of sequential element(s)
    0 instances converted, 0 sequential instances remain driven by gated/generated clocks

    =========================== Non-Gated/Non-Generated Clocks ============================
    Clock Tree ID     Driving Element     Drive Element Type     Fanout     Sample Instance
    ---------------------------------------------------------------------------------------
    ClockId_0_0       clk                 port                   432        i[10]
    =======================================================================================

    ##### END OF CLOCK OPTIMIZATION REPORT ######

    @N:FX1143 :  | Skipping assigning INTERNAL_VREF to iobanks, because the table of mapping from pin to iobank is not initialized.
    Finished Pre Mapping Phase.
    @N:BN225 :  | Writing default property annotation file C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH608K_REG_IF\project\impl\synthesize\rev_1\FLASH608K_REG_IF.sap.

    Starting constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 225MB peak: 225MB)

    Finished constraint checker preprocessing (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 225MB peak: 225MB)

    Finished constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 225MB peak: 225MB)

    Pre-mapping successful!

    At Mapper Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 145MB peak: 225MB)

    Process took 0h:00m:02s realtime, 0h:00m:02s cputime
    # Tue Oct 22 17:12:56 2019

    ###########################################################]

`
`

    Map & Optimize Report

`
`

    # Tue Oct 22 17:12:57 2019

    Copyright (C) 1994-2019 Synopsys, Inc.
    This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
    and may only be used pursuant to the terms and conditions of a written license agreement
    with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
    Synopsys software or the associated documentation is strictly prohibited.
    Tool: Synplify Pro (R)
    Build: P-2019.03G
    Install: D:\SWGowin\Gowin_V1.9.2.01Beta_35214_20191015\SynplifyPro
    OS: Windows 6.1

    Hostname: GW-SW-059

    Implementation : rev_1
    Synopsys Generic Technology Mapper, Version mapgw, Build 1450R, Built Sep 25 2019 09:35:08

    Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 117MB peak: 117MB)

    @N:MF916 :  | Option synthesis_strategy=base is enabled.
    @N:MF248 :  | Running in 64-bit mode.
    @N:MF666 :  | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)

    Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 120MB peak: 120MB)

    Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 120MB peak: 120MB)

    Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 122MB peak: 122MB)

    Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 135MB peak: 137MB)

    Starting Optimization and Mapping (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 218MB peak: 218MB)

    Available hyper_sources - for debug and ip models
    	None Found

    @N:MT206 :  | Auto Constrain mode is enabled

    Finished RTL optimizations (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 222MB peak: 222MB)

    Starting factoring (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)

    Finished factoring (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)

    Finished generic timing optimizations - Pass 1 (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 224MB peak: 224MB)

    Starting Early Timing Optimization (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 224MB peak: 224MB)

    Finished Early Timing Optimization (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 224MB peak: 224MB)

    Finished generic timing optimizations - Pass 2 (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 224MB peak: 224MB)

    Finished preparing to map (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 224MB peak: 224MB)

    Finished technology mapping (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 225MB peak: 225MB)

    Pass		 CPU time		Worst Slack		Luts / Registers
    ------------------------------------------------------------
       1		0h:00m:01s		    -2.60ns		 446 /        51
       2		0h:00m:01s		    -2.60ns		 446 /        51

       3		0h:00m:01s		    -2.60ns		 446 /        51

       4		0h:00m:01s		    -2.60ns		 446 /        51

    Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 225MB peak: 225MB)

    @N:FX164 :  | The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute.
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to output port. Because it's a pure output port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port
    @W: :  | Converting bidirection inout port to inpure port. Because it's a pure input port

    Finished restoring hierarchy (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 225MB peak: 225MB)

    Start Writing Netlists (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 152MB peak: 226MB)

    Writing Analyst data base C:\Users\qinfei\Desktop\Gowin_Flash_Controller\FLASH608K_REG_IF\project\impl\synthesize\rev_1\synwork\FLASH608K_REG_IF_m.srm

    Finished Writing Netlist Databases (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 227MB peak: 227MB)

    Writing Verilog Simulation files

    Writing scf file... (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 227MB peak: 227MB)

    @N:BW103 :  | The default time unit for the Synopsys Constraint File (SDC or FDC) is 1ns.
    @N:BW107 :  | Synopsys Constraint File capacitance units using default value of 1pF

    Finished Writing Verilog Simulation files (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 228MB peak: 228MB)

    Start final timing analysis (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 225MB peak: 228MB)

    @W:MT246 : gowin_flash_controller.v(6207) | Blackbox FLASH608K is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results)
    @W:MT420 :  | Found inferred clock tb|clk with period 6.32ns. Please declare a user-defined clock on port clk.

    ##### START OF TIMING REPORT #####[
    # Timing report written on Tue Oct 22 17:13:01 2019
    #

    Top view:               tb
    Requested Frequency:    158.2 MHz
    Wire load mode:         top
    Paths requested:        5
    Constraint File(s):
    @N:MT320 :  | This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report.

    @N:MT322 :  | Clock constraints include only register-to-register paths associated with each individual clock.

    Performance Summary
    *******************

    Worst slack in design: -1.115

                       Requested     Estimated     Requested     Estimated                Clock        Clock
    Starting Clock     Frequency     Frequency     Period        Period        Slack      Type         Group
    ------------------------------------------------------------------------------------------------------------------------
    tb|clk             158.2 MHz     134.5 MHz     6.321         7.436         -1.115     inferred     Autoconstr_clkgroup_0
    System             100.0 MHz     204.3 MHz     10.000        4.894         5.106      system       system_clkgroup
    ========================================================================================================================

    Clock Relationships
    *******************

    Clocks            |    rise  to  rise    |    fall  to  fall   |    rise  to  fall   |    fall  to  rise
    ---------------------------------------------------------------------------------------------------------
    Starting  Ending  |  constraint  slack   |  constraint  slack  |  constraint  slack  |  constraint  slack
    ---------------------------------------------------------------------------------------------------------
    System    tb|clk  |  6.321       5.106   |  No paths    -      |  No paths    -      |  No paths    -
    tb|clk    System  |  6.321       4.750   |  No paths    -      |  No paths    -      |  No paths    -
    tb|clk    tb|clk  |  6.321       -1.115  |  No paths    -      |  No paths    -      |  No paths    -
    =========================================================================================================
     Note: 'No paths' indicates there are no paths in the design for that pair of clock edges.
           'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups.

    Interface Information
    *********************

    No IO constraint found

    ====================================
    Detailed Report for Clock: tb|clk
    ====================================

    Starting Points with Worst Slack
    ********************************

                                                                                           Starting                                         Arrival
    Instance                                                                               Reference     Type     Pin     Net               Time        Slack
                                                                                           Clock
    ----------------------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[1\]      tb|clk        DFFC     Q       erase_cnt[1]      0.367       -1.115
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[5\]      tb|clk        DFFC     Q       erase_cnt[5]      0.367       -1.058
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[0\]      tb|clk        DFFC     Q       erase_cnt[0]      0.367       -1.048
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[4\]      tb|clk        DFFC     Q       erase_cnt[4]      0.367       -0.991
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[2\]      tb|clk        DFFC     Q       erase_cnt[2]      0.367       -0.838
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[6\]      tb|clk        DFFC     Q       erase_cnt[6]      0.367       -0.781
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[9\]      tb|clk        DFFC     Q       erase_cnt[9]      0.367       -0.773
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[13\]     tb|clk        DFFC     Q       erase_cnt[13]     0.367       -0.716
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[8\]      tb|clk        DFFC     Q       erase_cnt[8]      0.367       -0.706
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[17\]     tb|clk        DFFC     Q       erase_cnt[17]     0.367       -0.659
    ==========================================================================================================================================================

    Ending Points with Worst Slack
    ******************************

                                                                                           Starting                                            Required
    Instance                                                                               Reference     Type     Pin     Net                  Time         Slack
                                                                                           Clock
    --------------------------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[18\]     tb|clk        DFFC     D       erase_cnt_lm[18]     6.188        -1.115
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[17\]     tb|clk        DFFC     D       erase_cnt_lm[17]     6.188        -1.058
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[16\]     tb|clk        DFFC     D       erase_cnt_lm[16]     6.188        -1.001
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[15\]     tb|clk        DFFC     D       erase_cnt_lm[15]     6.188        -0.944
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[14\]     tb|clk        DFFC     D       erase_cnt_lm[14]     6.188        -0.887
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[22\]     tb|clk        DFFC     D       erase_cnt_lm[22]     6.188        -0.887
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[13\]     tb|clk        DFFC     D       erase_cnt_lm[13]     6.188        -0.830
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[21\]     tb|clk        DFFC     D       erase_cnt_lm[21]     6.188        -0.830
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[12\]     tb|clk        DFFC     D       erase_cnt_lm[12]     6.188        -0.773
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[20\]     tb|clk        DFFC     D       erase_cnt_lm[20]     6.188        -0.773
    ==============================================================================================================================================================

    Worst Path Information
    View Worst Path in Analyst
    ***********************

    Path information for path number 1:
          Requested Period:                      6.321
        - Setup time:                            0.133
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         6.188

        - Propagation time:                      7.303
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (critical) :                     -1.115

        Number of logic level(s):                15
        Starting point:                          Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[1\] / Q
        Ending point:                            Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[18\] / D
        The start point is clocked by            tb|clk [rising] on pin CLK
        The end   point is clocked by            tb|clk [rising] on pin CLK

    Instance / Net                                                                                            Pin      Pin               Arrival     No. of
    Name                                                                                             Type     Name     Dir     Delay     Time        Fan Out(s)
    -----------------------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[1\]                DFFC     Q        Out     0.367     0.367       -
    erase_cnt[1]                                                                                     Net      -        -       1.021     -           4
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[0\]     LUT4     I1       In      -         1.388       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[0\]     LUT4     F        Out     1.099     2.487       -
    erase_cnt_qxu_par_0[0]                                                                           Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[0\]        ALU      I0       In      -         3.508       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[0\]        ALU      COUT     Out     0.958     4.466       -
    erase_cnt_qxu_par_1_COUT[0]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      CIN      In      -         4.466       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      COUT     Out     0.057     4.523       -
    erase_cnt_qxu_par_1_COUT[4]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      CIN      In      -         4.523       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      COUT     Out     0.057     4.580       -
    erase_cnt_cry[8]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      CIN      In      -         4.580       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      COUT     Out     0.057     4.637       -
    erase_cnt_cry[9]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      CIN      In      -         4.637       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      COUT     Out     0.057     4.694       -
    erase_cnt_cry[10]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      CIN      In      -         4.694       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      COUT     Out     0.057     4.751       -
    erase_cnt_cry[11]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      CIN      In      -         4.751       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      COUT     Out     0.057     4.808       -
    erase_cnt_cry[12]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      CIN      In      -         4.808       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      COUT     Out     0.057     4.865       -
    erase_cnt_cry[13]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      CIN      In      -         4.865       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      COUT     Out     0.057     4.922       -
    erase_cnt_cry[14]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      CIN      In      -         4.922       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      COUT     Out     0.057     4.979       -
    erase_cnt_cry[15]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      CIN      In      -         4.979       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      COUT     Out     0.057     5.036       -
    erase_cnt_cry[16]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[17\]           ALU      CIN      In      -         5.036       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[17\]           ALU      COUT     Out     0.057     5.093       -
    erase_cnt_cry[17]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_s_0\[18\]             ALU      CIN      In      -         5.093       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_s_0\[18\]             ALU      SUM      Out     0.563     5.656       -
    erase_cnt_s[18]                                                                                  Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[18\]            LUT4     I3       In      -         6.677       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[18\]            LUT4     F        Out     0.626     7.303       -
    erase_cnt_lm[18]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[18\]               DFFC     D        In      -         7.303       -
    ===========================================================================================================================================================
    Total path delay (propagation time + setup) of 7.436 is 4.373(58.8%) logic and 3.063(41.2%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 2:
          Requested Period:                      6.321
        - Setup time:                            0.133
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         6.188

        - Propagation time:                      7.246
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -1.058

        Number of logic level(s):                14
        Starting point:                          Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[5\] / Q
        Ending point:                            Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[18\] / D
        The start point is clocked by            tb|clk [rising] on pin CLK
        The end   point is clocked by            tb|clk [rising] on pin CLK

    Instance / Net                                                                                            Pin      Pin               Arrival     No. of
    Name                                                                                             Type     Name     Dir     Delay     Time        Fan Out(s)
    -----------------------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[5\]                DFFC     Q        Out     0.367     0.367       -
    erase_cnt[5]                                                                                     Net      -        -       1.021     -           4
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[4\]     LUT4     I1       In      -         1.388       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[4\]     LUT4     F        Out     1.099     2.487       -
    erase_cnt_qxu_par_0[4]                                                                           Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      I0       In      -         3.508       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      COUT     Out     0.958     4.466       -
    erase_cnt_qxu_par_1_COUT[4]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      CIN      In      -         4.466       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      COUT     Out     0.057     4.523       -
    erase_cnt_cry[8]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      CIN      In      -         4.523       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      COUT     Out     0.057     4.580       -
    erase_cnt_cry[9]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      CIN      In      -         4.580       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      COUT     Out     0.057     4.637       -
    erase_cnt_cry[10]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      CIN      In      -         4.637       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      COUT     Out     0.057     4.694       -
    erase_cnt_cry[11]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      CIN      In      -         4.694       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      COUT     Out     0.057     4.751       -
    erase_cnt_cry[12]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      CIN      In      -         4.751       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      COUT     Out     0.057     4.808       -
    erase_cnt_cry[13]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      CIN      In      -         4.808       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      COUT     Out     0.057     4.865       -
    erase_cnt_cry[14]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      CIN      In      -         4.865       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      COUT     Out     0.057     4.922       -
    erase_cnt_cry[15]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      CIN      In      -         4.922       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      COUT     Out     0.057     4.979       -
    erase_cnt_cry[16]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[17\]           ALU      CIN      In      -         4.979       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[17\]           ALU      COUT     Out     0.057     5.036       -
    erase_cnt_cry[17]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_s_0\[18\]             ALU      CIN      In      -         5.036       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_s_0\[18\]             ALU      SUM      Out     0.563     5.599       -
    erase_cnt_s[18]                                                                                  Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[18\]            LUT4     I3       In      -         6.620       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[18\]            LUT4     F        Out     0.626     7.246       -
    erase_cnt_lm[18]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[18\]               DFFC     D        In      -         7.246       -
    ===========================================================================================================================================================
    Total path delay (propagation time + setup) of 7.379 is 4.316(58.5%) logic and 3.063(41.5%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 3:
          Requested Period:                      6.321
        - Setup time:                            0.133
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         6.188

        - Propagation time:                      7.246
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -1.058

        Number of logic level(s):                14
        Starting point:                          Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[1\] / Q
        Ending point:                            Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[17\] / D
        The start point is clocked by            tb|clk [rising] on pin CLK
        The end   point is clocked by            tb|clk [rising] on pin CLK

    Instance / Net                                                                                            Pin      Pin               Arrival     No. of
    Name                                                                                             Type     Name     Dir     Delay     Time        Fan Out(s)
    -----------------------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[1\]                DFFC     Q        Out     0.367     0.367       -
    erase_cnt[1]                                                                                     Net      -        -       1.021     -           4
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[0\]     LUT4     I1       In      -         1.388       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[0\]     LUT4     F        Out     1.099     2.487       -
    erase_cnt_qxu_par_0[0]                                                                           Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[0\]        ALU      I0       In      -         3.508       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[0\]        ALU      COUT     Out     0.958     4.466       -
    erase_cnt_qxu_par_1_COUT[0]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      CIN      In      -         4.466       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      COUT     Out     0.057     4.523       -
    erase_cnt_qxu_par_1_COUT[4]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      CIN      In      -         4.523       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      COUT     Out     0.057     4.580       -
    erase_cnt_cry[8]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      CIN      In      -         4.580       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      COUT     Out     0.057     4.637       -
    erase_cnt_cry[9]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      CIN      In      -         4.637       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      COUT     Out     0.057     4.694       -
    erase_cnt_cry[10]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      CIN      In      -         4.694       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      COUT     Out     0.057     4.751       -
    erase_cnt_cry[11]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      CIN      In      -         4.751       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      COUT     Out     0.057     4.808       -
    erase_cnt_cry[12]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      CIN      In      -         4.808       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      COUT     Out     0.057     4.865       -
    erase_cnt_cry[13]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      CIN      In      -         4.865       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      COUT     Out     0.057     4.922       -
    erase_cnt_cry[14]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      CIN      In      -         4.922       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      COUT     Out     0.057     4.979       -
    erase_cnt_cry[15]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      CIN      In      -         4.979       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      COUT     Out     0.057     5.036       -
    erase_cnt_cry[16]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[17\]           ALU      CIN      In      -         5.036       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[17\]           ALU      SUM      Out     0.563     5.599       -
    erase_cnt_s[17]                                                                                  Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[17\]            LUT4     I3       In      -         6.620       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[17\]            LUT4     F        Out     0.626     7.246       -
    erase_cnt_lm[17]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[17\]               DFFC     D        In      -         7.246       -
    ===========================================================================================================================================================
    Total path delay (propagation time + setup) of 7.379 is 4.316(58.5%) logic and 3.063(41.5%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 4:
          Requested Period:                      6.321
        - Setup time:                            0.133
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         6.188

        - Propagation time:                      7.236
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -1.048

        Number of logic level(s):                15
        Starting point:                          Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[0\] / Q
        Ending point:                            Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[18\] / D
        The start point is clocked by            tb|clk [rising] on pin CLK
        The end   point is clocked by            tb|clk [rising] on pin CLK

    Instance / Net                                                                                            Pin      Pin               Arrival     No. of
    Name                                                                                             Type     Name     Dir     Delay     Time        Fan Out(s)
    -----------------------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[0\]                DFFC     Q        Out     0.367     0.367       -
    erase_cnt[0]                                                                                     Net      -        -       1.021     -           3
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[0\]     LUT4     I0       In      -         1.388       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[0\]     LUT4     F        Out     1.032     2.420       -
    erase_cnt_qxu_par_0[0]                                                                           Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[0\]        ALU      I0       In      -         3.441       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[0\]        ALU      COUT     Out     0.958     4.399       -
    erase_cnt_qxu_par_1_COUT[0]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      CIN      In      -         4.399       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      COUT     Out     0.057     4.456       -
    erase_cnt_qxu_par_1_COUT[4]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      CIN      In      -         4.456       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      COUT     Out     0.057     4.513       -
    erase_cnt_cry[8]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      CIN      In      -         4.513       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      COUT     Out     0.057     4.570       -
    erase_cnt_cry[9]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      CIN      In      -         4.570       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      COUT     Out     0.057     4.627       -
    erase_cnt_cry[10]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      CIN      In      -         4.627       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      COUT     Out     0.057     4.684       -
    erase_cnt_cry[11]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      CIN      In      -         4.684       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      COUT     Out     0.057     4.741       -
    erase_cnt_cry[12]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      CIN      In      -         4.741       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      COUT     Out     0.057     4.798       -
    erase_cnt_cry[13]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      CIN      In      -         4.798       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      COUT     Out     0.057     4.855       -
    erase_cnt_cry[14]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      CIN      In      -         4.855       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      COUT     Out     0.057     4.912       -
    erase_cnt_cry[15]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      CIN      In      -         4.912       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      COUT     Out     0.057     4.969       -
    erase_cnt_cry[16]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[17\]           ALU      CIN      In      -         4.969       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[17\]           ALU      COUT     Out     0.057     5.026       -
    erase_cnt_cry[17]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_s_0\[18\]             ALU      CIN      In      -         5.026       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_s_0\[18\]             ALU      SUM      Out     0.563     5.589       -
    erase_cnt_s[18]                                                                                  Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[18\]            LUT4     I3       In      -         6.610       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[18\]            LUT4     F        Out     0.626     7.236       -
    erase_cnt_lm[18]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[18\]               DFFC     D        In      -         7.236       -
    ===========================================================================================================================================================
    Total path delay (propagation time + setup) of 7.369 is 4.306(58.4%) logic and 3.063(41.6%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    Path information for path number 5:
          Requested Period:                      6.321
        - Setup time:                            0.133
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         6.188

        - Propagation time:                      7.189
        - Clock delay at starting point:         0.000 (ideal)
        = Slack (non-critical) :                 -1.001

        Number of logic level(s):                13
        Starting point:                          Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[1\] / Q
        Ending point:                            Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[16\] / D
        The start point is clocked by            tb|clk [rising] on pin CLK
        The end   point is clocked by            tb|clk [rising] on pin CLK

    Instance / Net                                                                                            Pin      Pin               Arrival     No. of
    Name                                                                                             Type     Name     Dir     Delay     Time        Fan Out(s)
    -----------------------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[1\]                DFFC     Q        Out     0.367     0.367       -
    erase_cnt[1]                                                                                     Net      -        -       1.021     -           4
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[0\]     LUT4     I1       In      -         1.388       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_0_cZ\[0\]     LUT4     F        Out     1.099     2.487       -
    erase_cnt_qxu_par_0[0]                                                                           Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[0\]        ALU      I0       In      -         3.508       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[0\]        ALU      COUT     Out     0.958     4.466       -
    erase_cnt_qxu_par_1_COUT[0]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      CIN      In      -         4.466       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_qxu_par_1\[4\]        ALU      COUT     Out     0.057     4.523       -
    erase_cnt_qxu_par_1_COUT[4]                                                                      Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      CIN      In      -         4.523       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[8\]            ALU      COUT     Out     0.057     4.580       -
    erase_cnt_cry[8]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      CIN      In      -         4.580       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[9\]            ALU      COUT     Out     0.057     4.637       -
    erase_cnt_cry[9]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      CIN      In      -         4.637       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[10\]           ALU      COUT     Out     0.057     4.694       -
    erase_cnt_cry[10]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      CIN      In      -         4.694       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[11\]           ALU      COUT     Out     0.057     4.751       -
    erase_cnt_cry[11]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      CIN      In      -         4.751       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[12\]           ALU      COUT     Out     0.057     4.808       -
    erase_cnt_cry[12]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      CIN      In      -         4.808       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[13\]           ALU      COUT     Out     0.057     4.865       -
    erase_cnt_cry[13]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      CIN      In      -         4.865       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[14\]           ALU      COUT     Out     0.057     4.922       -
    erase_cnt_cry[14]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      CIN      In      -         4.922       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[15\]           ALU      COUT     Out     0.057     4.979       -
    erase_cnt_cry[15]                                                                                Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      CIN      In      -         4.979       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_cry_0\[16\]           ALU      SUM      Out     0.563     5.542       -
    erase_cnt_s[16]                                                                                  Net      -        -       1.021     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[16\]            LUT4     I3       In      -         6.563       -
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_lm_0\[16\]            LUT4     F        Out     0.626     7.189       -
    erase_cnt_lm[16]                                                                                 Net      -        -       0.000     -           1
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_ER_UFM.\\erase_cnt_Z\[16\]               DFFC     D        In      -         7.189       -
    ===========================================================================================================================================================
    Total path delay (propagation time + setup) of 7.322 is 4.259(58.2%) logic and 3.063(41.8%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    ====================================
    Detailed Report for Clock: System
    ====================================

    Starting Points with Worst Slack
    ********************************

                                                                                              Starting                                                   Arrival
    Instance                                                                                  Reference     Type          Pin         Net                Time        Slack
                                                                                              Clock
    ----------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_5_cZ\[0\]                  System        INV           O           wxaddr_5[0]        0.000       5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\state_UFM_i_cZ\[0\]               System        INV           O           state_UFM_i[0]     0.000       5.167
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_GW_USER_FLASH_608K.flash_inst     System        FLASH608K     DOUT[0]     DOUT[0]            0.000       5.167
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_GW_USER_FLASH_608K.flash_inst     System        FLASH608K     DOUT[1]     DOUT[1]            0.000       5.167
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_GW_USER_FLASH_608K.flash_inst     System        FLASH608K     DOUT[2]     DOUT[2]            0.000       5.167
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_GW_USER_FLASH_608K.flash_inst     System        FLASH608K     DOUT[3]     DOUT[3]            0.000       5.167
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_GW_USER_FLASH_608K.flash_inst     System        FLASH608K     DOUT[4]     DOUT[4]            0.000       5.167
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_GW_USER_FLASH_608K.flash_inst     System        FLASH608K     DOUT[5]     DOUT[5]            0.000       5.167
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_GW_USER_FLASH_608K.flash_inst     System        FLASH608K     DOUT[6]     DOUT[6]            0.000       5.167
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.u_GW_USER_FLASH_608K.flash_inst     System        FLASH608K     DOUT[7]     DOUT[7]            0.000       5.167
    ======================================================================================================================================================================

    Ending Points with Worst Slack
    ******************************

                                                                              Starting                                        Required
    Instance                                                                  Reference     Type      Pin     Net             Time         Slack
                                                                              Clock
    --------------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[0\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[1\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[2\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[3\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[4\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[5\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[6\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[7\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[8\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wyaddr_Z\[0\]     System        DFFCE     D       wxaddr_5[0]     6.188        5.106
    ============================================================================================================================================

    Worst Path Information
    View Worst Path in Analyst
    ***********************

    Path information for path number 1:
          Requested Period:                      6.321
        - Setup time:                            0.133
        + Clock delay at ending point:           0.000 (ideal)
        = Required time:                         6.188

        - Propagation time:                      1.082
        - Clock delay at starting point:         0.000 (ideal)
        - Estimated clock delay at start point:  -0.000
        = Slack (non-critical) :                 5.106

        Number of logic level(s):                0
        Starting point:                          Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_5_cZ\[0\] / O
        Ending point:                            Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[0\] / D
        The start point is clocked by            System [rising]
        The end   point is clocked by            tb|clk [rising] on pin CLK

    Instance / Net                                                                         Pin      Pin               Arrival     No. of
    Name                                                                         Type      Name     Dir     Delay     Time        Fan Out(s)
    ----------------------------------------------------------------------------------------------------------------------------------------
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_5_cZ\[0\]     INV       O        Out     0.000     0.000       -
    wxaddr_5[0]                                                                  Net       -        -       1.082     -           15
    Gowin_Flash_Controller_template.u_Flash_Ctroller_608K.\\wxaddr_Z\[0\]        DFFCE     D        In      -         1.082       -
    ========================================================================================================================================
    Total path delay (propagation time + setup) of 1.215 is 0.133(10.9%) logic and 1.082(89.1%) route.
    Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value

    ##### END OF TIMING REPORT #####]

    Timing exceptions that could not be applied

    Finished final timing analysis (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 226MB peak: 228MB)

    Finished timing report (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 226MB peak: 228MB)

    ---------------------------------------
    Resource Usage Report for tb

    Mapping to part: gw1n_9lqfp144-6
    Cell usage:
    ALU             123 uses
    DFFC            311 uses
    DFFCE           83 uses
    DFFE            33 uses
    DFFP            5 uses
    FLASH608K       1 use
    GSR             1 use
    INV             4 uses
    LUT2            71 uses
    LUT3            92 uses
    LUT4            267 uses

    I/O ports: 36
    I/O primitives: 36
    IBUF           4 uses
    OBUF           32 uses

    I/O Register bits:                  0
    Register bits not including I/Os:   432 of 6480 (6%)
    Total load per clock:
       tb|clk: 432

    @S |Mapping Summary:
    Total  LUTs: 430 (4%)

    Mapper successful!

    At Mapper Exit (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 74MB peak: 228MB)

    Process took 0h:00m:04s realtime, 0h:00m:04s cputime
    # Tue Oct 22 17:13:01 2019

    ###########################################################]

`