=====
SETUP
0.198
13.881
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[7]
13.881
=====
SETUP
0.198
13.881
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[5]
13.881
=====
SETUP
0.201
13.878
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[19]
13.878
=====
SETUP
0.201
13.878
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[25]
13.878
=====
SETUP
0.201
13.878
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[12]
13.878
=====
SETUP
0.201
13.878
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[20]
13.878
=====
SETUP
0.201
13.878
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[4]
13.878
=====
SETUP
0.551
13.171
13.722
clk_ibuf
0.000
0.982
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wb_dat_o_Z[23]
4.322
4.780
i_ns_i_a2_1_21_cZ[8]
5.918
7.017
i_ns_i_a2_1_29_cZ[8]
8.791
9.613
i_ns_a2[27]
12.072
13.171
i_Z[27]
13.171
=====
SETUP
0.551
13.171
13.722
clk_ibuf
0.000
0.982
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wb_dat_o_Z[23]
4.322
4.780
i_ns_i_a2_1_21_cZ[8]
5.918
7.017
i_ns_i_a2_1_29_cZ[8]
8.791
9.613
i_ns_a2[9]
12.072
13.171
i_Z[9]
13.171
=====
SETUP
0.568
13.510
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[16]
13.510
=====
SETUP
0.573
13.506
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[24]
13.506
=====
SETUP
0.573
13.506
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[0]
13.506
=====
SETUP
0.629
13.093
13.722
clk_ibuf
0.000
0.982
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wb_dat_o_Z[23]
4.322
4.780
i_ns_i_a2_1_21_cZ[8]
5.918
7.017
i_ns_i_a2_1_29_cZ[8]
8.791
9.613
N_272_i_cZ
12.061
13.093
i_Z[26]
13.093
=====
SETUP
0.735
13.344
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[26]
13.344
=====
SETUP
0.735
13.344
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[21]
13.344
=====
SETUP
0.735
13.344
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[3]
13.344
=====
SETUP
0.754
12.967
13.722
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_0_cZ[4]
9.825
10.647
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o_9_0_iv_2[4]
11.935
12.967
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wb_dat_o_Z[4]
12.967
=====
SETUP
0.933
13.145
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[31]
13.145
=====
SETUP
0.933
13.145
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[30]
13.145
=====
SETUP
0.933
13.145
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[23]
13.145
=====
SETUP
0.933
13.145
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[22]
13.145
=====
SETUP
0.933
13.145
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[10]
13.145
=====
SETUP
0.933
13.145
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[27]
13.145
=====
SETUP
0.933
13.145
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[8]
13.145
=====
SETUP
0.941
13.138
14.079
clk_ibuf
0.000
0.982
wb_reg_adr_i_Z[3]
4.322
4.780
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/wb_dat_o23_i_o3
6.903
8.002
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_1_sqmuxa_cZ
10.030
11.091
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/wdata_Z[29]
13.138
=====
HOLD
0.571
3.911
3.340
clk_ibuf
0.000
0.844
i_Z[20]
3.340
3.674
i_Z[21]
3.911
=====
HOLD
0.576
3.916
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[1]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[2]
3.916
=====
HOLD
0.576
3.916
3.340
clk_ibuf
0.000
0.844
i_Z[16]
3.340
3.674
i_Z[17]
3.916
=====
HOLD
0.576
3.916
3.340
clk_ibuf
0.000
0.844
i_Z[22]
3.340
3.674
i_Z[23]
3.916
=====
HOLD
0.582
3.922
3.340
clk_ibuf
0.000
0.844
i_Z[23]
3.340
3.674
i_Z[24]
3.922
=====
HOLD
0.582
3.922
3.340
clk_ibuf
0.000
0.844
i_Z[1]
3.340
3.674
i_Z[2]
3.922
=====
HOLD
0.590
3.930
3.340
clk_ibuf
0.000
0.844
i_Z[17]
3.340
3.674
i_Z[18]
3.930
=====
HOLD
0.708
4.048
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state[0]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[0]
3.676
4.048
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state[0]
4.048
=====
HOLD
0.708
4.048
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt_Z[1]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m111
3.676
4.048
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/wait_cnt_Z[1]
4.048
=====
HOLD
0.708
4.048
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/end_cnt[1]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m45
3.676
4.048
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/end_cnt[1]
4.048
=====
HOLD
0.709
4.049
3.340
clk_ibuf
0.000
0.844
wb_reg_adr_i_Z[2]
3.340
3.674
wb_reg_adr_ie[2]
3.677
4.049
wb_reg_adr_i_Z[2]
4.049
=====
HOLD
0.709
4.049
3.340
clk_ibuf
0.000
0.844
i_Z[19]
3.340
3.674
N_260_i_cZ
3.677
4.049
i_Z[19]
4.049
=====
HOLD
0.710
4.050
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[7]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m124
3.678
4.050
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[7]
4.050
=====
HOLD
0.711
4.052
3.340
clk_ibuf
0.000
0.844
wb_reg_dat_i[10]
3.340
3.674
g0
3.680
4.052
wb_reg_dat_i[10]
4.052
=====
HOLD
0.711
4.052
3.340
clk_ibuf
0.000
0.844
wr_reg_enable_i_Z
3.340
3.674
wr_reg_enable_ie
3.680
4.052
wr_reg_enable_i_Z
4.052
=====
HOLD
0.711
4.052
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[7]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_161_mux_i
3.680
4.052
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[7]
4.052
=====
HOLD
0.712
4.053
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[1]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_ns_cZ[1]
3.681
4.053
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/state_UFM_Z[1]
4.053
=====
HOLD
0.720
4.060
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[8]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_162_mux_i_cZ
3.688
4.060
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[8]
4.060
=====
HOLD
0.836
4.176
3.340
clk_ibuf
0.000
0.844
i_Z[24]
3.340
3.674
i_Z[25]
4.176
=====
HOLD
0.894
4.234
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state[4]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state_ns_cZ[4]
3.678
4.234
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_RD_UFM/r_state[4]
4.234
=====
HOLD
0.895
4.236
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[6]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/N_180_mux_i
3.680
4.236
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_ER_UFM/e_state_Z[6]
4.236
=====
HOLD
0.896
4.237
3.340
clk_ibuf
0.000
0.844
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[6]
3.340
3.674
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/m120
3.681
4.237
Gowin_Flash_Controller_template/u_Wishbone_Master_Top_608K/u_Flash_Ctroller_608K/u_WR_UFM/w_state_Z[6]
4.237
=====
HOLD
0.906
4.246
3.340
clk_ibuf
0.000
0.844
i_Z[5]
3.340
3.674
i_Z[6]
4.246
=====
HOLD
0.908
4.248
3.340
clk_ibuf
0.000
0.844
i_Z[10]
3.340
3.674
i_Z[11]
4.248
=====
HOLD
0.910
4.250
3.340
clk_ibuf
0.000
0.844
i_Z[4]
3.340
3.674
i_Z[5]
4.250
