#Build: Synplify Pro (R) M-2017.03G-SP1, Build 128R, Sep 1 2017 #install: /gwsw/gui_proj/sw_test/Gowin/1.7/SynplifyPro #OS: Linux #Hostname: jinan9110.sdgowin.com # Tue Sep 26 09:03:26 2017 #Implementation: rev_1 Synopsys HDL Compiler, version comp2017q2p1, Build 237R, built Sep 5 2017 @N: : | Running in 64-bit mode Copyright (C) 1994-2017 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Synopsys Verilog Compiler, version comp2017q2p1, Build 237R, built Sep 5 2017 @N: : | Running in 64-bit mode Copyright (C) 1994-2017 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Running on host :jinan9110.sdgowin.com @N: : | : Running Verilog Compiler in System Verilog mode @N: : | : Running Verilog Compiler in Multiple File Compilation Unit mode @I::"/gwsw/gui_proj/sw_test/Gowin/1.7/SynplifyPro/lib/generic/gw2a.v" (library work) @I::"/gwsw/gui_proj/sw_test/Gowin/1.7/SynplifyPro/lib/vlog/hypermods.v" (library __hyper__lib__) @I::"/gwsw/gui_proj/sw_test/Gowin/1.7/SynplifyPro/lib/vlog/umr_capim.v" (library snps_haps) @I::"/gwsw/gui_proj/sw_test/Gowin/1.7/SynplifyPro/lib/vlog/scemi_objects.v" (library snps_haps) @I::"/gwsw/gui_proj/sw_test/Gowin/1.7/SynplifyPro/lib/vlog/scemi_pipes.svh" (library snps_haps) @I::"/home/liulie/ref_design/i2c_slave/project/src/i2c_slave_top/i2c_slave_top.v" (library work) Verilog syntax check successful! Selecting top level module i2c_slave_top @N:CG364 : gw2a.v(1597) | Synthesizing module GSR in library work. @N:CG364 : gw2a.v(360) | Synthesizing module INV in library work. @N:CG364 : gw2a.v(380) | Synthesizing module IOBUF in library work. @N:CG364 : i2c_slave_top.v(3244) | Synthesizing module i2c_slave_top in library work. At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 71MB peak: 72MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Tue Sep 26 09:03:27 2017 ###########################################################] Synopsys Netlist Linker, version comp2017q2p1, Build 237R, built Sep 5 2017 @N: : | Running in 64-bit mode At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Tue Sep 26 09:03:27 2017 ###########################################################] @END At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 3MB peak: 4MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Tue Sep 26 09:03:27 2017 ###########################################################]