Project Settings
Project Name i2c_slave Device Name rev_1: GOWIN-GW2A : GW2A_55
Implementation Name rev_1 Top Module i2c_slave_top
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 10000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 9 0 0 - 00m:01s - 9/26/17
9:03 AM
(premap)Complete 3 0 0 0m:01s 0m:01s 190MB 9/26/17
9:03 AM
(fpga_mapper)Complete 8 5 0 0m:04s 0m:04s 190MB 9/26/17
9:03 AM
Multi-srs Generator Complete9/26/17
9:03 AM

Area Summary
I/O ports (io_port) 5 Non I/O Register bits (non_io_reg) 92 (0%)
I/O Register bits (total_io_reg) 0 Block Rams (v_ram) 1 (140)
Block Multipliers (dsp_used) 0 (20) LUTs (total_luts) 210 (0%)

Timing Summary
Clock NameReq FreqEst FreqSlack
_\~i2c_slave_i2c_slave_top_\ |un1_in_reg11_1_inferred_clock150.0 MHzNANA
_\~i2c_slave_i2c_slave_top_\ |un1_in_reg11_2_inferred_clock150.0 MHzNANA
_\~i2c_slave_i2c_slave_top_\ |un1_in_reg11_3_inferred_clock150.0 MHzNANA
_\~i2c_slave_i2c_slave_top_\ |un1_in_reg11_inferred_clock150.0 MHzNANA
i2c_slave_top|clk150.0 MHz127.0 MHz-1.209
System150.0 MHz656.4 MHz5.143

Optimizations Summary
Combined Clock Conversion 1 / 4