Project Settings
Project Name I3C_HDR Device Name rev_1: GOWIN-GW1N : GW1N_9ES
Implementation Name rev_1 Top Module [auto]
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 10000
Disable I/O Insertion 1 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 8 0 0 - 00m:03s - 2018/9/6
15:44:17
(premap)Complete 8 0 0 0m:01s 0m:02s 194MB 2018/9/6
15:44:21
(fpga_mapper)Complete 9 3 0 0m:33s 0m:33s 306MB 2018/9/6
15:44:54
Multi-srs Generator Complete00m:01s2018/9/6
15:44:18

Area Summary
Non I/O Register bits (non_io_reg) 340 (5%) I/O Register bits (total_io_reg) 0
Block Rams (v_ram) 2 (24) Block Multipliers (dsp_used) 0 (10)
LUTs (total_luts) 1236 (14%)

Timing Summary
Clock NameReq FreqEst FreqSlack
I3C_HDR|scl_i37.9 MHz18.1 MHz-14.470
I3C_HDR|sda_i146.6 MHz81.6 MHz-2.715
I3C_HDR|sysClk_i35.3 MHz30.0 MHz-5.003
System40.3 MHz34.2 MHz-4.383