#Build: Synplify Pro (R) N-2018.03G-1, Build 224R, Jul 26 2018 #install: C:\Gowin\1.8\SynplifyPro #OS: Windows 7 6.1 #Hostname: GW-SW-BJB01-7 # Thu Sep 6 15:44:16 2018 #Implementation: rev_1 Copyright (C) 1994-2018 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: N-2018.03G-1 Install: C:\Gowin\1.8\SynplifyPro OS: Windows 6.1 Hostname: GW-SW-BJB01-7 Implementation : rev_1 Synopsys HDL Compiler, Version comp2018q1p1, Build 224R, Built Jul 26 2018 09:18:13 @N: : | Running in 64-bit mode Copyright (C) 1994-2018 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: N-2018.03G-1 Install: C:\Gowin\1.8\SynplifyPro OS: Windows 6.1 Hostname: GW-SW-BJB01-7 Implementation : rev_1 Synopsys Verilog Compiler, Version comp2018q1p1, Build 224R, Built Jul 26 2018 09:18:13 @N: : | Running in 64-bit mode @N: : | : Running Verilog Compiler in System Verilog mode @N: : | : Running Verilog Compiler in Multiple File Compilation Unit mode @I::"C:\Gowin\1.8\SynplifyPro\lib\generic\gw1n.v" (library work) @I::"C:\Gowin\1.8\SynplifyPro\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\Gowin\1.8\SynplifyPro\lib\vlog\umr_capim.v" (library snps_haps) @I::"C:\Gowin\1.8\SynplifyPro\lib\vlog\scemi_objects.v" (library snps_haps) @I::"C:\Gowin\1.8\SynplifyPro\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"C:\Gowin\1.8\IDE\ipcore\I3C_HDR\data\i3c_wrap.sv" (library work) @I:"C:\Gowin\1.8\IDE\ipcore\I3C_HDR\data\i3c_wrap.sv":"E:\i3c\I3C_SDR_DDR\ddr_write\slave\src\i3c_hdr\temp\I3C_HDR\define.v" (library work) @I::"C:\Gowin\1.8\IDE\ipcore\I3C_HDR\data\i3c_hdr.sv" (library work) @I:"C:\Gowin\1.8\IDE\ipcore\I3C_HDR\data\i3c_hdr.sv":"E:\i3c\I3C_SDR_DDR\ddr_write\slave\src\i3c_hdr\temp\I3C_HDR\parameter.v" (library work) Verilog syntax check successful! Selecting top level module I3C_HDR @N:CG364 : i3c_wrap.sv(3) | Synthesizing module I3C_HDR in library work. At c_ver Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 85MB peak: 95MB) Process took 0h:00m:02s realtime, 0h:00m:02s cputime Process completed successfully. # Thu Sep 6 15:44:18 2018 ###########################################################] Copyright (C) 1994-2018 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: N-2018.03G-1 Install: C:\Gowin\1.8\SynplifyPro OS: Windows 6.1 Hostname: GW-SW-BJB01-7 Implementation : rev_1 Synopsys Synopsys Netlist Linker, Version comp2018q1p1, Build 224R, Built Jul 26 2018 09:18:13 @N: : | Running in 64-bit mode @N:NF107 : i3c_wrap.sv(3) | Selected library: work cell: I3C_HDR view verilog as top level @N:NF107 : i3c_wrap.sv(3) | Selected library: work cell: I3C_HDR view verilog as top level At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 69MB peak: 70MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Thu Sep 6 15:44:19 2018 ###########################################################] @END At c_hdl Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 3MB peak: 4MB) Process took 0h:00m:02s realtime, 0h:00m:02s cputime Process completed successfully. # Thu Sep 6 15:44:19 2018 ###########################################################]