Project Settings
Project Name ao_0 Device Name rev_1: GOWIN-GW2A : GW2A_55
Implementation Name rev_1 Top Module [auto]
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 10000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 6 28 0 - 00m:01s - 2019/3/4
15:08:38
(premap)Complete 10 0 0 0m:01s 0m:01s 193MB 2019/3/4
15:08:42
(fpga_mapper)Complete 11 2 0 0m:06s 0m:06s 219MB 2019/3/4
15:08:49
Multi-srs Generator Complete00m:01s2019/3/4
15:08:40

Area Summary
I/O ports (io_port) 75 Non I/O Register bits (non_io_reg) 367 (0%)
I/O Register bits (total_io_reg) 0 Block Rams (v_ram) 2 (140)
Block Multipliers (dsp_used) 0 (20) LUTs (total_luts) 453 (0%)

Timing Summary
Clock NameReq FreqEst FreqSlack
ao_top_0|clk_i229.5 MHz195.0 MHz-0.769
ao_top_0|control[0]161.5 MHz137.3 MHz-1.092
System150.0 MHz224.7 MHz2.216

Optimizations Summary
Combined Clock Conversion 2 / 0