library verilog;
use verilog.vl_types.all;
entity NLMS_Adaptive_Filter_Top is
    port(
        clk             : in     vl_logic;
        ini             : in     vl_logic;
        rst_n           : in     vl_logic;
        wr_en           : in     vl_logic;
        i_data          : in     vl_logic_vector(17 downto 0);
        i_desire        : in     vl_logic_vector(17 downto 0);
        o_err           : out    vl_logic_vector(17 downto 0);
        out_sig         : out    vl_logic;
        input_rdy       : out    vl_logic
    );
end NLMS_Adaptive_Filter_Top;
