One matching license found for this product: synplifypro_gowin
NOTE:  This version of the software is not a production release. No warranty is made as to the general availability of features and functionality included in this version or described in the accompanying documentation. The final contents of a production release and its timing remain at the sole discretion of Synopsys.

Starting:    C:\Gowin\Gowin_V1.9.1Beta\SynplifyPro\bin64\mbin\synbatch.exe
Install:     C:\Gowin\Gowin_V1.9.1Beta\SynplifyPro
Hostname:    GW-SW-063
Date:        Mon Dec  9 16:05:59 2019
Version:     P-2019.03G-Beta4

Arguments:   -product synplify_pro -batch E:/W-File/PDM2PCM/RefDesign/project/Ref_design/impl/synthesize/Ref_design.prj
ProductType: synplify_pro

License checkout: synplifypro_gowin
License: synplifypro_gowin from server 192.168.31.246 
Licensed Vendor: gowin

Running in Vendor Mode

Copied E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\Ref_design.srr to E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\backup\Ref_design.srr
log file: "E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\Ref_design.srr"
Running: rev_1 in foreground

Running Ref_design|rev_1

Running Flow: compile (Compile) on Ref_design|rev_1
# Mon Dec  9 16:06:00 2019

Running Flow: compile_flow (Compile Process) on Ref_design|rev_1
# Mon Dec  9 16:06:00 2019

Running: compiler (Compile Input) on Ref_design|rev_1
# Mon Dec  9 16:06:00 2019
Copied E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\synwork\Ref_design_comp.srs to E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\Ref_design.srs

compiler completed
# Mon Dec  9 16:06:09 2019

Return Code: 0
Run Time:00h:00m:09s

Running: multi_srs_gen (Multi-srs Generator) on Ref_design|rev_1
# Mon Dec  9 16:06:09 2019

multi_srs_gen completed
# Mon Dec  9 16:06:10 2019

Return Code: 0
Run Time:00h:00m:01s
Copied E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\synwork\Ref_design_mult.srs to E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\Ref_design.srs
Complete: Compile Process on Ref_design|rev_1

Running: premap (Premap) on Ref_design|rev_1
# Mon Dec  9 16:06:10 2019

premap completed
# Mon Dec  9 16:06:17 2019

Return Code: 0
Run Time:00h:00m:07s
Complete: Compile on Ref_design|rev_1

Running Flow: map (Map) on Ref_design|rev_1
# Mon Dec  9 16:06:17 2019

Running: fpga_mapper (Map & Optimize) on Ref_design|rev_1
# Mon Dec  9 16:06:17 2019
Copied E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\synwork\Ref_design_m.srm to E:\W-File\PDM2PCM\RefDesign\project\Ref_design\impl\synthesize\rev_1\Ref_design.srm

fpga_mapper completed with warnings
# Mon Dec  9 16:07:14 2019

Return Code: 1
Run Time:00h:00m:57s
Complete: Map on Ref_design|rev_1
Complete: Logic Synthesis on Ref_design|rev_1
exit status=0
exit status=0
License checkin: synplifypro_gowin
