Selecting top level module ALU54D
@N: CG364 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":859:7:859:12|Synthesizing module ALU54D in library work.
@W: CG532 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":890:4:890:10|Within an initial block, only Verilog force statements and memory $readmemh/$readmemb initialization statements are recognized, and all other content is ignored.
Running optimization stage 1 on ALU54D .......
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1188:4:1188:9|Pruning unused register dout_reg_sync[54:0]. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1175:4:1175:9|Pruning unused register dout_reg_async[54:0]. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1086:4:1086:9|Pruning unused register accload0_reg_sync. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1072:4:1072:9|Pruning unused register accload0_reg_async. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1047:4:1047:9|Pruning unused register bsign0_reg0_sync. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1033:4:1033:9|Pruning unused register bsign0_reg0_async. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1008:4:1008:9|Pruning unused register asign0_reg0_sync. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":994:4:994:9|Pruning unused register asign0_reg0_async. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":970:4:970:9|Pruning unused register inb0_reg_sync[53:0]. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":932:4:932:9|Pruning unused register ina0_reg_sync[53:0]. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":918:4:918:9|Pruning unused register ina0_reg_async[53:0]. Make sure that there are no unused intermediate registers.
Running optimization stage 2 on ALU54D .......
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[54]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[53]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[52]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[51]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[50]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[49]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[48]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[47]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[46]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[45]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[44]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[43]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[42]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[41]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[40]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[39]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[38]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[37]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[36]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[35]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[34]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[33]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[32]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[31]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[30]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[29]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[28]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[27]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[26]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[25]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[24]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[23]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[22]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[21]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[20]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[19]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[18]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[17]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[16]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[15]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[14]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[13]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[12]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[11]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[10]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[9]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[8]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[7]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[6]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[5]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[4]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[3]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[2]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[1]
@W: CL179 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":1135:23:1135:45|Found combinational loop at acc_load[0]
@N: CL159 :"C:\Users\Noa\Desktop\Myworkplace\Program\FPGAProgram\Ref_design\src\pdm2pcm\temp\pdm2pcm\rev_1\syntmp\ALU54D.v":863:13:863:16|Input CASI is unused.
