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This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
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Tool: Synplify Pro (R)
Build: O-2018.09G-Beta1
Install: D:\Gowin\1.8\SynplifyPro
OS: Windows 6.1

Hostname: GW-SW-042

Implementation : rev_1

# Written on Wed Sep 19 08:39:54 2018

##### DESIGN INFO #######################################################

Top View:                "ao_top_0"
Constraint File(s):      (none)




##### SUMMARY ############################################################

Found 0 issues in 0 out of 0 constraints


##### DETAILS ############################################################



Clock Relationships
*******************

Starting                Ending                  |     rise to rise     |     fall to fall     |     rise to fall     |     fall to rise                     
-----------------------------------------------------------------------------------------------------------------------------------------------------------
ao_top_0|clk_i          ao_top_0|clk_i          |     4.207            |     4.207            |     No paths         |     2.103                            
ao_top_0|clk_i          ao_top_0|control[0]     |     Diff grp         |     No paths         |     No paths         |     Diff grp                         
ao_top_0|control[0]     ao_top_0|clk_i          |     Diff grp         |     No paths         |     No paths         |     No paths                         
ao_top_0|control[0]     ao_top_0|control[0]     |     5.362            |     No paths         |     No paths         |     No paths                         
===========================================================================================================================================================
 Note: 'No paths' indicates there are no paths in the design for that pair of clock edges.
       'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups.


Unconstrained Start/End Points
******************************

p:control[1]
p:control[2]
p:control[3]
p:control[4]
p:control[5]
p:control[6]
p:control[7]
p:control[8]
p:control[9]
p:data_i[0]
p:data_i[1]
p:data_i[2]
p:data_i[3]
p:data_i[4]
p:data_i[5]
p:data_i[6]
p:data_i[7]
p:data_i[8]
p:data_i[9]
p:data_i[10]
p:data_i[11]
p:data_i[12]
p:data_i[13]
p:data_i[14]
p:data_i[15]
p:trig0_i[0]
p:trig0_i[1]
p:trig0_i[2]
p:trig0_i[3]
p:trig0_i[4]
p:trig0_i[5]
p:trig0_i[6]
p:trig0_i[7]


Inapplicable constraints
************************

(none)


Applicable constraints with issues
**********************************

(none)


Constraints with matching wildcard expressions
**********************************************

(none)


Library Report
**************


# End of Constraint Checker Report
