#OPTIONS:"|-layerid|0|-orig_srs|D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register\\rev_1\\synwork\\RAM_based_shift_reg_top_comp.srs|-prodtype|synplify_pro|-primux|-fixsmult|-sdff_counter|-nram|-divnmod|-nostructver|-infer_seqShift|-I|D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register|-I|C:\\Gowin\\1.8\\IDE\\ipcore\\RAMBasedShiftRegister\\data|-I|D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register\\|-I|C:\\Gowin\\1.8\\SynplifyPro\\lib|-sysv|-devicelib|C:\\Gowin\\1.8\\SynplifyPro\\lib\\generic\\gw2a.v|-encrypt|-pro|-ui|-fid2|-ram|-sharing|on|-ll|2000|-autosm|-D_MULTIPLE_FILE_COMPILATION_UNIT_|-lib|work|-lib|work"
#CUR:"C:\\Gowin\\1.8\\SynplifyPro\\bin64\\c_ver.exe":1526401174
#CUR:"C:\\Gowin\\1.8\\SynplifyPro\\lib\\generic\\gw2a.v":1526403274
#CUR:"C:\\Gowin\\1.8\\SynplifyPro\\lib\\vlog\\hypermods.v":1526400512
#CUR:"C:\\Gowin\\1.8\\SynplifyPro\\lib\\vlog\\umr_capim.v":1526400512
#CUR:"C:\\Gowin\\1.8\\SynplifyPro\\lib\\vlog\\scemi_objects.v":1526400512
#CUR:"C:\\Gowin\\1.8\\SynplifyPro\\lib\\vlog\\scemi_pipes.svh":1526400512
#CUR:"C:\\Gowin\\1.8\\IDE\\ipcore\\RAMBasedShiftRegister\\data\\RAM_based_shift_reg_top.v":1515133663
#CUR:"D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register\\shift_reg_name.v":1531883211
#CUR:"D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register\\shift_reg_define.v":1531883211
#CUR:"D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register\\shift_reg_parameter.v":1531883211
#CUR:"C:\\Gowin\\1.8\\IDE\\ipcore\\RAMBasedShiftRegister\\data\\RAM_based_shift_reg.v":1516869185
#CUR:"D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register\\shift_reg_define.v":1531883211
#CUR:"D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register\\shift_reg_name.v":1531883211
#CUR:"D:\\ex\\Lossy_ex\\src\\RAM_based_shift_reg_top\\temp\\RAM_Based_Shift_Register\\shift_reg_parameter.v":1531883211
#numinternalfiles:5
#defaultlanguage:verilog
0			"C:\Gowin\1.8\IDE\ipcore\RAMBasedShiftRegister\data\RAM_based_shift_reg_top.v" verilog
1		*	"D:\ex\Lossy_ex\src\RAM_based_shift_reg_top\temp\RAM_Based_Shift_Register\shift_reg_name.v" verilog
2		*	"D:\ex\Lossy_ex\src\RAM_based_shift_reg_top\temp\RAM_Based_Shift_Register\shift_reg_define.v" verilog
3		*	"D:\ex\Lossy_ex\src\RAM_based_shift_reg_top\temp\RAM_Based_Shift_Register\shift_reg_parameter.v" verilog
4			"C:\Gowin\1.8\IDE\ipcore\RAMBasedShiftRegister\data\RAM_based_shift_reg.v" verilog
#Dependency Lists(Uses List)
0 1 2 3 4
1 2 3
2 1 3
3 1 2
4 2 1 3
#Dependency Lists(Users Of)
0 -1
1 0 2 3 4
2 0 1 3 4
3 0 1 2 4
4 0
#Design Unit to File Association
module work \~RAM_based_shift_reg.RAM_based_shift_reg_top 4
module work RAM_based_shift_reg_top 0
