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This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
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Tool: Synplify Pro (R)
Build: N-2018.03G-Beta6
Install: C:\Gowin\1.8\SynplifyPro
OS: Windows 6.1

Hostname: GW-SW-047

Database state : D:\ex\Lossy_ex\src\RAM_based_shift_reg_top\temp\RAM_Based_Shift_Register\rev_1\synwork\|rev_1
Synopsys Synopsys Netlist Linker, Version comp2018q1p1, Build 118R, Built May 15 2018 09:18:11

@N|Running in 64-bit mode
File D:\ex\lossy_ex\src\RAM_based_shift_reg_top\temp\RAM_Based_Shift_Register\rev_1\synwork\RAM_based_shift_reg_top_comp.srs changed - recompiling
@N: NF107 :"C:\Gowin\1.8\IDE\ipcore\RAMBasedShiftRegister\data\RAM_based_shift_reg_top.v":6:30:6:30|Selected library: work cell: RAM_based_shift_reg_top view verilog as top level
@N: NF107 :"C:\Gowin\1.8\IDE\ipcore\RAMBasedShiftRegister\data\RAM_based_shift_reg_top.v":6:30:6:30|Selected library: work cell: RAM_based_shift_reg_top view verilog as top level

At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Wed Jul 18 11:07:07 2018

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