
Copyright (C) 1994-2018 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: O-2018.09G-Beta1
Install: D:\Gowin\1.8\SynplifyPro
OS: Windows 6.1

Hostname: GW-SW-042

Implementation : rev_1
Synopsys HDL compiler and linker, Version comp2018q3p1, Build 019R, Built Sep  3 2018 10:06:59

Modified Files: 8
FID:  path (prevtimestamp, timestamp)
0        D:\Gowin\1.8\IDE\data\ipcores\GAO\GW_CON\gw_con_top.v (N/A, 2018-08-10 18:01:49)
1        D:\Gowin\1.8\SynplifyPro\lib\generic\gw2a.v (N/A, 2018-09-04 01:31:40)
2        D:\Gowin\1.8\SynplifyPro\lib\vlog\hypermods.v (N/A, 2018-09-04 01:02:54)
3        D:\Gowin\1.8\SynplifyPro\lib\vlog\scemi_objects.v (N/A, 2018-09-04 01:02:54)
4        D:\Gowin\1.8\SynplifyPro\lib\vlog\scemi_pipes.svh (N/A, 2018-09-04 01:02:54)
5        D:\Gowin\1.8\SynplifyPro\lib\vlog\umr_capim.v (N/A, 2018-09-04 01:02:54)
6        E:\ide\IP_TEST_GOLDEN\gwip_ref_design\gwip_ref_design\Gowin_RAM_Based_Shift_Register_IP_RefDesign\Lossless_ex\project\impl\temp\gao\ao_control\gw_con_parameter.v (N/A, 2018-09-19 08:45:47)
7        E:\ide\IP_TEST_GOLDEN\gwip_ref_design\gwip_ref_design\Gowin_RAM_Based_Shift_Register_IP_RefDesign\Lossless_ex\project\impl\temp\gao\ao_control\gw_con_top_define.v (N/A, 2018-09-19 08:45:47)

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Modules that may have changed as a result of file changes: 1
MID:  lib.cell.view
0        work.gw_con_top.verilog may have changed because the following files changed:
                        D:\Gowin\1.8\IDE\data\ipcores\GAO\GW_CON\gw_con_top.v (N/A, 2018-08-10 18:01:49) <-- (module definition)

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Unmodified files: 0
FID:  path (timestamp)

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Unchanged modules: 0
MID:  lib.cell.view
