Synthesis Messages
Report Title | GowinSynthesis Report |
Design File | D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\ahb_def_slave.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\ahb_s_mux.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\ahb_to_sram.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\BusMatrix.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_bus_matrix.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_cdc_capt_sync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_cdc_connect.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_cdc_random.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_clk_gate.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_code_mux.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_mst.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_slv.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_sync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_16bit_dec.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_32bit_dec.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu_bshift.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu_ctl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu_dp.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu_srtdiv.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_br_dec.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_dec.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_etmintf.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_exec.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_fetch.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_fetch_ahbintf.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_fetch_ctl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_lsu.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_lsu_ahbintf.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_lsu_ctl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_regbank.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_regfile.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_status.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_apb_if.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_comp.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_packet_gen.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_packet_state.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_apb_if.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_clk_gate.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_control_reg.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_event_gen.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_fifo.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_gen.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_res_control.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_sync_count.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trace.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trace_out.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trc_en.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trig_gen.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trigger.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_example_pmu.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_flash_mux.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_fpb.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_fpb_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_fpb_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_htm_port.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_arb.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_emit.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_fifo.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_fifo_byte.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_if.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_ts.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_lic_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_ahb_ctl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_align.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_comp.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_default.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_full.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_maskgen.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_ppb_intf.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_region.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_regions.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_bit_master.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_decode_dap.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_decode_dcore.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_decode_icore.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_input_stage_dap.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_input_stage_dcore.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_input_stage_icore.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_output_stage_dcode.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_output_stage_icode.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_output_stage_ppb.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_output_stage_sys.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_cell.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_int_state.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_main.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_ppb_intf.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_preempt.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_reg.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_tree.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_ppb_ahb_to_apb.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_ppb_decoder.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_rom_table.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_sync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_apb_if.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_atb_fifo.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_atb_sync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_formatter.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_trace_clk.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_trace_fifo.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_trace_out.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_trace_sync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_undefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_wic.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\CM3ETM.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_miim_wrapper.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_rx_buffer_to_ahb.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_rx_to_buffer.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_rx_wrapper.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_sdp_wrapper_32bit.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_top.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_tx_wrapper.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_wrapper.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_gpio.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_ahbif_ctrl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_arbiter.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_async_fifo_clr.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_config.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_const.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_ctrl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_eilmif_ctrl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_fifo.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_gck.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_pad_lib.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_reg.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_regif.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_regif_ctrl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_spiif.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_sync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_sync_l2l.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_sync_p2p.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_to_iop.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_spi.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_timer.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_uart.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_watchdog.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_watchdog_defs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_watchdog_frc.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_iop_gpio.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\CORTEXM3.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\CORTEXM3INTEGRATION.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpApbDefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpApbIfClamp.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpApbSync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpClamp0.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpEnSync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpIMux.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpSync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPJtagDpDefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPJtagDpProtocol.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwDpApbIf.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwDpDefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwDpProtocol.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwDpSync.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSWJDP.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwjDpDefs.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwjWatcher.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\ddr3_1_4code.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DDR3_define.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\ddr3_name.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\ddr3_to_ahb_top.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\DDR3_TOP.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\dtcm.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\Gowin_EMPU_M3_top.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\GowinAhbExt.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\GowinCM3AhbExt.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\GowinCM3AhbExtWrapper.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\gw_apb_i2c.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\gw_apb_int_wrapper.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\gw_apb_sd.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\gw_gpio.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\InputStage.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\itcm.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\m3_top.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\MatrixDecodeS0.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\MatrixDecodeS1.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\MatrixDecodeS2.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\OutputArb1.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\OutputArb2.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\OutputArb3.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\OutputStage1.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\OutputStage2.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\OutputStage3.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\p_sse050_interconnect_f0_ahb_to_apb.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\p_sse050_interconnect_f0_apb_slave_mux.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\Rtc.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\RtcApbif.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\RtcControl.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\RtcCounter.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\RtcInterrupt.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\RtcParams.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\RtcRevAnd.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\RtcSynctoPCLK.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\RtcUpdate.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\sse050_int_apb_decoder.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\sse050_integration_peripherals.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\sync_p2p.v D:\Gowin\Gowin_V1.9.8.08\IDE\ipcore\GOWIN_EMPU_M3\data\triple_speed_mac_name.v C:\Users\liukai\Desktop\gowin_empu_m3\src\gowin_empu_m3\temp\gw_empu_m3\cm3_option_defs.v C:\Users\liukai\Desktop\gowin_empu_m3\src\gowin_empu_m3\temp\gw_empu_m3\ahb_option_defs.v C:\Users\liukai\Desktop\gowin_empu_m3\src\gowin_empu_m3\temp\gw_empu_m3\triple_speed_mac_param.v C:\Users\liukai\Desktop\gowin_empu_m3\src\gowin_empu_m3\temp\gw_empu_m3\triple_speed_mac_define.v |
GowinSynthesis Constraints File | --- |
Version | GowinSynthesis V1.9.8.08 |
Part Number | GW2A-LV55PG484C8/I7 |
Device | GW2A-55C |
Created Time | Wed Oct 19 14:13:14 2022 |
Legal Announcement | Copyright (C)2014-2022 Gowin Semiconductor Corporation. ALL rights reserved. |
Synthesis Details
Top Level Module | Gowin_EMPU_M3_Top |
Synthesis Process | Running parser: CPU time = 0h 0m 10s, Elapsed time = 0h 0m 10s, Peak memory usage = 319.289MB Running netlist conversion: CPU time = 0h 0m 0.859s, Elapsed time = 0h 0m 0.869s, Peak memory usage = 319.289MB Running device independent optimization: Optimizing Phase 0: CPU time = 0h 0m 7s, Elapsed time = 0h 0m 7s, Peak memory usage = 319.289MB Optimizing Phase 1: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s, Peak memory usage = 319.289MB Optimizing Phase 2: CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s, Peak memory usage = 319.289MB Running inference: Inferring Phase 0: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s, Peak memory usage = 319.289MB Inferring Phase 1: CPU time = 0h 0m 0.218s, Elapsed time = 0h 0m 0.215s, Peak memory usage = 319.289MB Inferring Phase 2: CPU time = 0h 0m 0.265s, Elapsed time = 0h 0m 0.265s, Peak memory usage = 319.289MB Inferring Phase 3: CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.071s, Peak memory usage = 319.289MB Running technical mapping: Tech-Mapping Phase 0: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s, Peak memory usage = 319.289MB Tech-Mapping Phase 1: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s, Peak memory usage = 319.289MB Tech-Mapping Phase 2: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s, Peak memory usage = 319.289MB Tech-Mapping Phase 3: CPU time = 0h 2m 22s, Elapsed time = 0h 2m 22s, Peak memory usage = 319.289MB Tech-Mapping Phase 4: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s, Peak memory usage = 319.289MB Generate output files: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s, Peak memory usage = 319.289MB |
Total Time and Memory Usage | CPU time = 0h 3m 2s, Elapsed time = 0h 3m 2s, Peak memory usage = 319.289MB |
Resource
Resource Usage Summary
Resource | Usage |
I/O Port | 44 |
I/O Buf | 44 |
    IBUF | 6 |
    OBUF | 15 |
    IOBUF | 23 |
Register | 5514 |
    DFF | 7 |
    DFFE | 74 |
    DFFR | 3 |
    DFFP | 33 |
    DFFPE | 159 |
    DFFC | 309 |
    DFFCE | 4914 |
    DFFNPE | 7 |
    DFFNC | 2 |
    DFFNCE | 4 |
    DL | 1 |
    DLN | 1 |
LUT | 23153 |
    LUT2 | 1740 |
    LUT3 | 5992 |
    LUT4 | 15421 |
ALU | 1330 |
    ALU | 1330 |
SSRAM | 20 |
    RAM16S4 | 4 |
    RAM16SDP4 | 16 |
INV | 49 |
    INV | 49 |
DSP | 1 |
    MULT36X36 | 1 |
BSRAM | 64 |
    SP | 32 |
    SDPB | 32 |
Resource Utilization Summary
Resource | Usage | Utilization |
Logic | 24652(23202 LUTs, 1330 ALUs, 20 SSRAMs) / 54720 | 45% |
Register | 5514 / 41997 | 13% |
  --Register as Latch | 2 / 41997 | 1% |
  --Register as FF | 5512 / 41997 | 13% |
BSRAM | 64 / 140 | 46% |
Timing
Clock Summary:
Clock Name | Type | Period | Frequency(MHz) | Rise | Fall | Source | Master | Object |
---|---|---|---|---|---|---|---|---|
HCLK | Base | 10.000 | 100.0 | 0.000 | 5.000 | HCLK_ibuf/I | ||
JTAG_9 | Base | 10.000 | 100.0 | 0.000 | 5.000 | JTAG_9_ibuf/I | ||
n344_6 | Base | 10.000 | 100.0 | 0.000 | 5.000 | u_GowinCM3AhbExtWrapper/u_GowinCM3AhbExt/u_spi1/u_spi_spiif/n344_s2/F |
Max Frequency Summary:
No. | Clock Name | Constraint | Actual Fmax | Logic Level | Entity |
---|---|---|---|---|---|
1 | HCLK | 100.0(MHz) | 45.7(MHz) | 30 | TOP |
2 | JTAG_9 | 100.0(MHz) | 112.2(MHz) | 13 | TOP |
Detail Timing Paths Information
Path 1
Path Summary:Slack | -11.903 |
Data Arrival Time | 22.731 |
Data Required Time | 10.828 |
From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/dbg_halt_req_reg_s1 |
Launch Clk | HCLK[R] |
Latch Clk | HCLK[R] |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
0.000 | 0.000 | HCLK | |||
0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
0.683 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
2.724 | 0.470 | tINS | FF | 27 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/SUM |
2.961 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/I1 |
3.516 | 0.555 | tINS | FF | 15 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/F |
3.753 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/I1 |
4.308 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/F |
4.545 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/I0 |
5.062 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/F |
5.299 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/I2 |
5.752 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/F |
5.989 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/I3 |
6.360 | 0.371 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/F |
6.597 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/I2 |
7.050 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/F |
7.287 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/I2 |
7.740 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/F |
7.977 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/I1 |
8.532 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/F |
8.769 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/I1 |
9.324 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/F |
9.561 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/I0 |
10.078 | 0.517 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/F |
10.315 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/S0 |
10.566 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/O |
10.803 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/I0 |
10.906 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/O |
11.143 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/I1 |
11.698 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/F |
11.935 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/I1 |
12.490 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/F |
12.727 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/I1 |
13.282 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/F |
13.519 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/I0 |
14.036 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/F |
14.273 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/I2 |
14.726 | 0.453 | tINS | FF | 5 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/F |
14.963 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/I1 |
15.518 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/F |
15.755 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/I0 |
16.272 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/F |
16.509 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/I0 |
17.026 | 0.517 | tINS | FF | 59 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/F |
17.263 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dpu_retire_s1/I1 |
17.818 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dpu_retire_s1/F |
18.055 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dpu_retire_s/I1 |
18.610 | 0.555 | tINS | FF | 7 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dpu_retire_s/F |
18.847 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/dhcs_c_halt_we_s1/I1 |
19.402 | 0.555 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/dhcs_c_halt_we_s1/F |
19.639 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/nxt_dbg_halt_req_s3/I1 |
20.194 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/nxt_dbg_halt_req_s3/F |
20.431 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/nxt_dbg_halt_req_s1/I1 |
20.986 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/nxt_dbg_halt_req_s1/F |
21.223 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/nxt_dbg_halt_req_s8/I0 |
21.740 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/nxt_dbg_halt_req_s8/F |
21.977 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/nxt_dbg_halt_req_s6/I0 |
22.494 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/nxt_dbg_halt_req_s6/F |
22.731 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/dbg_halt_req_reg_s1/D |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
10.000 | 0.000 | HCLK | |||
10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
10.682 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/dbg_halt_req_reg_s1/CLK |
10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_nvic/u_cm3_nvic_reg/dbg_halt_req_reg_s1 |
Clock Skew: | 0.000 |
Setup Relationship: | 10.000 |
Logic Level: | 30 |
Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Arrival Data Path Delay: | cell: 14.763, 67.510%; route: 6.873, 31.429%; tC2Q: 0.232, 1.061% |
Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Path 2
Path Summary:Slack | -11.689 |
Data Arrival Time | 22.517 |
Data Required Time | 10.828 |
From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_4_s0 |
Launch Clk | HCLK[R] |
Latch Clk | HCLK[R] |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
0.000 | 0.000 | HCLK | |||
0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
0.683 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
2.724 | 0.470 | tINS | FF | 27 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/SUM |
2.961 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/I1 |
3.516 | 0.555 | tINS | FF | 15 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/F |
3.753 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/I1 |
4.308 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/F |
4.545 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/I0 |
5.062 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/F |
5.299 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/I2 |
5.752 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/F |
5.989 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/I3 |
6.360 | 0.371 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/F |
6.597 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/I2 |
7.050 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/F |
7.287 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/I2 |
7.740 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/F |
7.977 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/I1 |
8.532 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/F |
8.769 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/I1 |
9.324 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/F |
9.561 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/I0 |
10.078 | 0.517 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/F |
10.315 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/S0 |
10.566 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/O |
10.803 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/I0 |
10.906 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/O |
11.143 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/I1 |
11.698 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/F |
11.935 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/I1 |
12.490 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/F |
12.727 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/I1 |
13.282 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/F |
13.519 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/I0 |
14.036 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/F |
14.273 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/I2 |
14.726 | 0.453 | tINS | FF | 5 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/F |
14.963 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/I1 |
15.518 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/F |
15.755 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/I0 |
16.272 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/F |
16.509 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/I0 |
17.026 | 0.517 | tINS | FF | 59 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/F |
17.263 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s/I1 |
17.818 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s/F |
18.055 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s132/I0 |
18.572 | 0.517 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s132/F |
18.809 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s117/I0 |
19.326 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s117/F |
19.563 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s107/I2 |
20.016 | 0.453 | tINS | FF | 7 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s107/F |
20.253 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s112/I1 |
20.808 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s112/F |
21.045 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s142/I1 |
21.600 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s142/F |
21.837 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s139/I0 |
21.940 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s139/O |
22.177 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s100/I1 |
22.280 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_4_s100/O |
22.517 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_4_s0/D |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
10.000 | 0.000 | HCLK | |||
10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
10.682 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_4_s0/CLK |
10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_4_s0 |
Clock Skew: | 0.000 |
Setup Relationship: | 10.000 |
Logic Level: | 30 |
Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Arrival Data Path Delay: | cell: 14.312, 66.094%; route: 7.110, 32.835%; tC2Q: 0.232, 1.071% |
Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Path 3
Path Summary:Slack | -11.685 |
Data Arrival Time | 22.512 |
Data Required Time | 10.828 |
From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_31_s0 |
Launch Clk | HCLK[R] |
Latch Clk | HCLK[R] |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
0.000 | 0.000 | HCLK | |||
0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
0.683 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
2.724 | 0.470 | tINS | FF | 27 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/SUM |
2.961 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/I1 |
3.516 | 0.555 | tINS | FF | 15 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/F |
3.753 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/I1 |
4.308 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/F |
4.545 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/I0 |
5.062 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/F |
5.299 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/I2 |
5.752 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/F |
5.989 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/I3 |
6.360 | 0.371 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/F |
6.597 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/I2 |
7.050 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/F |
7.287 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/I2 |
7.740 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/F |
7.977 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/I1 |
8.532 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/F |
8.769 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/I1 |
9.324 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/F |
9.561 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/I0 |
10.078 | 0.517 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/F |
10.315 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/S0 |
10.566 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/O |
10.803 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/I0 |
10.906 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/O |
11.143 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/I1 |
11.698 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/F |
11.935 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/I1 |
12.490 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/F |
12.727 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/I1 |
13.282 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/F |
13.519 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/I0 |
14.036 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/F |
14.273 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/I2 |
14.726 | 0.453 | tINS | FF | 5 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/F |
14.963 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/I1 |
15.518 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/F |
15.755 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/I0 |
16.272 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/F |
16.509 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/I0 |
17.026 | 0.517 | tINS | FF | 59 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/F |
17.263 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s40/I0 |
17.780 | 0.517 | tINS | FF | 59 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s40/F |
18.017 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_itfold_de_Z_s/I2 |
18.470 | 0.453 | tINS | FF | 11 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_itfold_de_Z_s/F |
18.707 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_used_word_de_s3/I0 |
19.224 | 0.517 | tINS | FF | 7 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_used_word_de_s3/F |
19.461 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_1_s1/I1 |
20.031 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_1_s1/COUT |
20.031 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_2_s/CIN |
20.066 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_2_s/COUT |
20.066 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_3_s/CIN |
20.101 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_3_s/COUT |
20.101 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_4_s/CIN |
20.136 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_4_s/COUT |
20.136 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_5_s/CIN |
20.171 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_5_s/COUT |
20.171 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_6_s/CIN |
20.207 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_6_s/COUT |
20.207 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_7_s/CIN |
20.242 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_7_s/COUT |
20.242 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_8_s/CIN |
20.277 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_8_s/COUT |
20.277 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_9_s/CIN |
20.312 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_9_s/COUT |
20.312 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_10_s/CIN |
20.347 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_10_s/COUT |
20.347 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_11_s/CIN |
20.383 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_11_s/COUT |
20.383 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_12_s/CIN |
20.418 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_12_s/COUT |
20.418 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_13_s/CIN |
20.453 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_13_s/COUT |
20.453 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_14_s/CIN |
20.488 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_14_s/COUT |
20.488 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_15_s/CIN |
20.523 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_15_s/COUT |
20.523 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_16_s/CIN |
20.559 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_16_s/COUT |
20.559 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_17_s/CIN |
20.594 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_17_s/COUT |
20.594 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_18_s/CIN |
20.629 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_18_s/COUT |
20.629 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_19_s/CIN |
20.664 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_19_s/COUT |
20.664 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_20_s/CIN |
20.699 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_20_s/COUT |
20.699 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_21_s/CIN |
20.735 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_21_s/COUT |
20.735 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_22_s/CIN |
20.770 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_22_s/COUT |
20.770 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_23_s/CIN |
20.805 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_23_s/COUT |
20.805 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_24_s/CIN |
20.840 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_24_s/COUT |
20.840 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_25_s/CIN |
20.875 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_25_s/COUT |
20.875 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_26_s/CIN |
20.911 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_26_s/COUT |
20.911 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_27_s/CIN |
20.946 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_27_s/COUT |
20.946 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_28_s/CIN |
20.981 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_28_s/COUT |
20.981 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_29_s/CIN |
21.016 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_29_s/COUT |
21.016 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_30_s/CIN |
21.051 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_30_s/COUT |
21.051 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_31_s/CIN |
21.521 | 0.470 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_31_s/SUM |
21.758 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/nxt_rf_pc_fwd_ex_31_s0/I0 |
22.275 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/nxt_rf_pc_fwd_ex_31_s0/F |
22.512 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_31_s0/D |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
10.000 | 0.000 | HCLK | |||
10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
10.682 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_31_s0/CLK |
10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_31_s0 |
Clock Skew: | 0.000 |
Setup Relationship: | 10.000 |
Logic Level: | 32 |
Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Arrival Data Path Delay: | cell: 15.019, 69.371%; route: 6.399, 29.557%; tC2Q: 0.232, 1.072% |
Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Path 4
Path Summary:Slack | -11.650 |
Data Arrival Time | 22.477 |
Data Required Time | 10.828 |
From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_30_s0 |
Launch Clk | HCLK[R] |
Latch Clk | HCLK[R] |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
0.000 | 0.000 | HCLK | |||
0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
0.683 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
2.724 | 0.470 | tINS | FF | 27 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/SUM |
2.961 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/I1 |
3.516 | 0.555 | tINS | FF | 15 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/F |
3.753 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/I1 |
4.308 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/F |
4.545 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/I0 |
5.062 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/F |
5.299 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/I2 |
5.752 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/F |
5.989 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/I3 |
6.360 | 0.371 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/F |
6.597 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/I2 |
7.050 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/F |
7.287 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/I2 |
7.740 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/F |
7.977 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/I1 |
8.532 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/F |
8.769 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/I1 |
9.324 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/F |
9.561 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/I0 |
10.078 | 0.517 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/F |
10.315 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/S0 |
10.566 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/O |
10.803 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/I0 |
10.906 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/O |
11.143 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/I1 |
11.698 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/F |
11.935 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/I1 |
12.490 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/F |
12.727 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/I1 |
13.282 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/F |
13.519 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/I0 |
14.036 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/F |
14.273 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/I2 |
14.726 | 0.453 | tINS | FF | 5 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/F |
14.963 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/I1 |
15.518 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/F |
15.755 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/I0 |
16.272 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/F |
16.509 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/I0 |
17.026 | 0.517 | tINS | FF | 59 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/F |
17.263 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s40/I0 |
17.780 | 0.517 | tINS | FF | 59 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s40/F |
18.017 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_itfold_de_Z_s/I2 |
18.470 | 0.453 | tINS | FF | 11 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_itfold_de_Z_s/F |
18.707 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_used_word_de_s3/I0 |
19.224 | 0.517 | tINS | FF | 7 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_used_word_de_s3/F |
19.461 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_1_s1/I1 |
20.031 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_1_s1/COUT |
20.031 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_2_s/CIN |
20.066 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_2_s/COUT |
20.066 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_3_s/CIN |
20.101 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_3_s/COUT |
20.101 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_4_s/CIN |
20.136 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_4_s/COUT |
20.136 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_5_s/CIN |
20.171 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_5_s/COUT |
20.171 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_6_s/CIN |
20.207 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_6_s/COUT |
20.207 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_7_s/CIN |
20.242 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_7_s/COUT |
20.242 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_8_s/CIN |
20.277 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_8_s/COUT |
20.277 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_9_s/CIN |
20.312 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_9_s/COUT |
20.312 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_10_s/CIN |
20.347 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_10_s/COUT |
20.347 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_11_s/CIN |
20.383 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_11_s/COUT |
20.383 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_12_s/CIN |
20.418 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_12_s/COUT |
20.418 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_13_s/CIN |
20.453 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_13_s/COUT |
20.453 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_14_s/CIN |
20.488 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_14_s/COUT |
20.488 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_15_s/CIN |
20.523 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_15_s/COUT |
20.523 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_16_s/CIN |
20.559 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_16_s/COUT |
20.559 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_17_s/CIN |
20.594 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_17_s/COUT |
20.594 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_18_s/CIN |
20.629 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_18_s/COUT |
20.629 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_19_s/CIN |
20.664 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_19_s/COUT |
20.664 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_20_s/CIN |
20.699 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_20_s/COUT |
20.699 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_21_s/CIN |
20.735 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_21_s/COUT |
20.735 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_22_s/CIN |
20.770 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_22_s/COUT |
20.770 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_23_s/CIN |
20.805 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_23_s/COUT |
20.805 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_24_s/CIN |
20.840 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_24_s/COUT |
20.840 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_25_s/CIN |
20.875 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_25_s/COUT |
20.875 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_26_s/CIN |
20.911 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_26_s/COUT |
20.911 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_27_s/CIN |
20.946 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_27_s/COUT |
20.946 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_28_s/CIN |
20.981 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_28_s/COUT |
20.981 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_29_s/CIN |
21.016 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_29_s/COUT |
21.016 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_30_s/CIN |
21.486 | 0.470 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_30_s/SUM |
21.723 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/nxt_rf_pc_fwd_ex_30_s0/I0 |
22.240 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/nxt_rf_pc_fwd_ex_30_s0/F |
22.477 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_30_s0/D |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
10.000 | 0.000 | HCLK | |||
10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
10.682 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_30_s0/CLK |
10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_30_s0 |
Clock Skew: | 0.000 |
Setup Relationship: | 10.000 |
Logic Level: | 32 |
Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Arrival Data Path Delay: | cell: 14.984, 69.322%; route: 6.399, 29.605%; tC2Q: 0.232, 1.073% |
Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Path 5
Path Summary:Slack | -11.614 |
Data Arrival Time | 22.442 |
Data Required Time | 10.828 |
From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_29_s0 |
Launch Clk | HCLK[R] |
Latch Clk | HCLK[R] |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
0.000 | 0.000 | HCLK | |||
0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
0.683 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
2.724 | 0.470 | tINS | FF | 27 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/SUM |
2.961 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/I1 |
3.516 | 0.555 | tINS | FF | 15 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s43/F |
3.753 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/I1 |
4.308 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s83/F |
4.545 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/I0 |
5.062 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s81/F |
5.299 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/I2 |
5.752 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s72/F |
5.989 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/I3 |
6.360 | 0.371 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s45/F |
6.597 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/I2 |
7.050 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s18/F |
7.287 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/I2 |
7.740 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s9/F |
7.977 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/I1 |
8.532 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s2/F |
8.769 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/I1 |
9.324 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_3/u_cm3_mpu_dcomp/region_hit_s0/F |
9.561 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/I0 |
10.078 | 0.517 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n449_s1/F |
10.315 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/S0 |
10.566 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s1/O |
10.803 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/I0 |
10.906 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_1_s0/O |
11.143 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/I1 |
11.698 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s10/F |
11.935 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/I1 |
12.490 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s6/F |
12.727 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/I1 |
13.282 | 0.555 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s2/F |
13.519 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/I0 |
14.036 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s4/F |
14.273 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/I2 |
14.726 | 0.453 | tINS | FF | 5 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s2/F |
14.963 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/I1 |
15.518 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s7/F |
15.755 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/I0 |
16.272 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s2/F |
16.509 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/I0 |
17.026 | 0.517 | tINS | FF | 59 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s0/F |
17.263 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s40/I0 |
17.780 | 0.517 | tINS | FF | 59 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s40/F |
18.017 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_itfold_de_Z_s/I2 |
18.470 | 0.453 | tINS | FF | 11 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_itfold_de_Z_s/F |
18.707 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_used_word_de_s3/I0 |
19.224 | 0.517 | tINS | FF | 7 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/instr_used_word_de_s3/F |
19.461 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_1_s1/I1 |
20.031 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_1_s1/COUT |
20.031 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_2_s/CIN |
20.066 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_2_s/COUT |
20.066 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_3_s/CIN |
20.101 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_3_s/COUT |
20.101 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_4_s/CIN |
20.136 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_4_s/COUT |
20.136 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_5_s/CIN |
20.171 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_5_s/COUT |
20.171 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_6_s/CIN |
20.207 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_6_s/COUT |
20.207 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_7_s/CIN |
20.242 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_7_s/COUT |
20.242 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_8_s/CIN |
20.277 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_8_s/COUT |
20.277 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_9_s/CIN |
20.312 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_9_s/COUT |
20.312 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_10_s/CIN |
20.347 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_10_s/COUT |
20.347 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_11_s/CIN |
20.383 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_11_s/COUT |
20.383 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_12_s/CIN |
20.418 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_12_s/COUT |
20.418 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_13_s/CIN |
20.453 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_13_s/COUT |
20.453 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_14_s/CIN |
20.488 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_14_s/COUT |
20.488 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_15_s/CIN |
20.523 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_15_s/COUT |
20.523 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_16_s/CIN |
20.559 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_16_s/COUT |
20.559 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_17_s/CIN |
20.594 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_17_s/COUT |
20.594 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_18_s/CIN |
20.629 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_18_s/COUT |
20.629 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_19_s/CIN |
20.664 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_19_s/COUT |
20.664 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_20_s/CIN |
20.699 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_20_s/COUT |
20.699 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_21_s/CIN |
20.735 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_21_s/COUT |
20.735 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_22_s/CIN |
20.770 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_22_s/COUT |
20.770 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_23_s/CIN |
20.805 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_23_s/COUT |
20.805 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_24_s/CIN |
20.840 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_24_s/COUT |
20.840 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_25_s/CIN |
20.875 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_25_s/COUT |
20.875 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_26_s/CIN |
20.911 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_26_s/COUT |
20.911 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_27_s/CIN |
20.946 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_27_s/COUT |
20.946 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_28_s/CIN |
20.981 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_28_s/COUT |
20.981 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_29_s/CIN |
21.451 | 0.470 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/seq_adder_res_ex_29_s/SUM |
21.688 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/nxt_rf_pc_fwd_ex_29_s0/I0 |
22.205 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/nxt_rf_pc_fwd_ex_29_s0/F |
22.442 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_29_s0/D |
AT | DELAY | TYPE | RF | FANOUT | NODE |
---|---|---|---|---|---|
10.000 | 0.000 | HCLK | |||
10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
10.682 | 0.683 | tINS | RR | 5294 | HCLK_ibuf/O |
10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_29_s0/CLK |
10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_regbank/rf_pc_fwd_ex_29_s0 |
Clock Skew: | 0.000 |
Setup Relationship: | 10.000 |
Logic Level: | 32 |
Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Arrival Data Path Delay: | cell: 14.948, 69.272%; route: 6.399, 29.653%; tC2Q: 0.232, 1.075% |
Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |