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         Gowin_AE250 参考设计阅读指南
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目标器件：GW2A-LV18PG256C8/I7
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文件列表
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.
| -- docs
|    `-- readme.txt				    -->	自述文件
| -- project
|    `-- Ref_Design.gprj			-->	参考设计工程
|    |-- Ref_Design.gprj.user		
|    |-- impl
|    |-- src
|       `-- riscv_ae250
|        	`-- riscv_ae250.v
|        	|-- riscv_ae250.vo		-->	仿真使用vo文件
|        	|-- demo.v		        -->	工程顶层示例模块
|        	|-- demo.cst	        -->	工程约束示例文件
|        	|-- temp
|        	    `-- Riscvae250
|       |-- data
|        	`-- ae250_refD.cfg
|        	|-- demo-V5-uart.bin
|       |-- gao.v
|       |-- Ref_Design.gao
| -- simulation
|        `-- Modelsim
|            `-- cmd.do				-->	modelsim仿真脚本
|        |-- VCS_sim
|            `-- Makefile			-->	VCS仿真脚本
| -- tb
|    `-- tb.v					    -->	VCS仿真testbench
|    |-- tb_mod.v					-->	modelsim仿真testbench
|    |-- prim_sim.v				    -->	仿真原语库

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使用说明：
	1、IP生成：在IP生成时点击Import CFG按钮，选择src/data/ae250_refD.cfg，可加载预存的配置文件。勾选DemoTop、DemoCst，可加载示例约束文件。点击Local Memory 重新选择ILM初始化文件demo-V5-uart.bin为本地路径。
	2、板测：使用云源软件打开上述文件中Ref_Design.gprj，设置工程顶层模块，连接管脚与端口，将Riscvae250设置为加载路径，综合；根据所使用器件设置约束和gao.v后布局布线后下载测试。使用GAO抓取数据。
	3、modelsim仿真：仿真脚本存放于Modelsim文件夹中
	4、VCS仿真：仿真脚本存放于VCS_sim文件夹中
	注：tb文件夹下prim_sim.v仅供参考，建议用户根据情况在仿真时使用最新版替换。

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        Example Gowin_AE250 Design Readme
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Object device:GW2A-LV18PG256C8/I7
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File List:
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.
| -- docs
|    `-- readme.txt				    -->	Read Me file (this file)
| -- project
|    |-- Ref_design				
|    	`--Ref_design.gprj			-->	GowinYunYuan Project File for Example Design
|       |-- Ref_Design.gprj.user		
|    |-- impl
|    |-- src
|       `-- riscv_ae250
|        	`-- riscv_ae250.v
|        	|-- riscv_ae250.vo		-->	Verilog simulation File for tb
|        	|-- demo.v      		-->	Example File for GowinYunYuan Project
|        	|-- demo.cst	
|        	|-- temp
|        	    `-- Riscvae250
|       |-- data
|        	`-- ae250_refD.cfg
|        	|-- demo-V5-uart.bin
|       |-- gao.v
|       |-- Ref_Design.gao
| -- simulation
|        `-- Modelsim
|            `-- cmd.do				-->	modelsim simulation script
|        |-- VCS_sim
|            `-- Makefile			-->	VCS  simulation script
| -- tb
|     `-- tb.v					    -->	TestBench for VCS simulation
|     |-- tb_mod.v					-->	TestBench for modelsim simulation
|     |-- prim_sim.v				-->	Verilog functional simulation library


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Instructions:
	1. IP generation: Click the Import CFG button during IP generation and select src/data/ae250_refD.cfg to load the pre-stored configuration file. Check DemoTop and DemoCst to load sample constraint files. Click Local Memory and select the ILM initialization file demo-V5-uart.bin as the local path.
	2. Onboard test:Launch GowinYunYuan and select "File -> Open -> Project", connect pins and ports,set Top Module and Include Path. After Sythesize, cofigure Physical Constraints  and GAO Config Files.
	3. modelsim simulation:Use script in Modelsim folder.
	4. VCS simulation:Use script in VCS_sim folder.

	Note: The prim_sim.v under the tb folder is for reference only. It is recommended that users replace it with the latest version during simulation.
