Project Settings |
---|
Project Name | sdio_test | Device Name | rev_1: GOWIN-GW2A : GW2A_18 |
Implementation Name | rev_1 | Top Module | [auto] |
Pipelining | 1 | Retiming | 0 |
Resource Sharing | 1 | Fanout Guide | 10000 |
Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
Clock Conversion | 1 | FSM Compiler | 1 |
Run Status |
Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
(compiler) | Complete |
46 |
66 |
0 |
- |
00m:06s |
- |
2019/11/12 10:07:51 |
(premap) | Complete |
16 |
5 |
0 |
0m:03s |
0m:04s |
238MB |
2019/11/12 10:07:57 |
(fpga_mapper) | Complete |
18 |
826 |
0 |
0m:14s |
0m:15s |
255MB |
2019/11/12 10:08:13 |
Multi-srs Generator |
Complete | | | | 00m:01s | | | 2019/11/12 10:07:53 |
Area Summary |
|
I/O ports
(io_port) | 127 |
Non I/O Register bits
(non_io_reg) | 1825 (11%) |
I/O Register bits
(total_io_reg) | 0 |
Ultra Rams | 0 |
Block Rams
(v_ram) | 0 (46) |
Block Multipliers
(dsp_used) | 0 (24) |
LUTs
(total_luts) | 3309 (15%) |
| |
Timing Summary |
|
Clock Name | Req Freq | Est Freq | Slack |
top|clk | 173.5 MHz | 147.5 MHz | -1.017 |
top|cpu_clk | 174.6 MHz | 148.4 MHz | -1.011 |
System | 150.0 MHz | 330.0 MHz | 3.636 |
Optimizations Summary |
Combined Clock Conversion | 2 / 0 |
| |
|