Project Settings
Project Name ao_control Device Name rev_1: GOWIN-GW2A : GW2A_18
Implementation Name rev_1 Top Module [auto]
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 10000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 6 2 0 - 00m:02s - 2019/11/12
10:08:51
(premap)Complete 6 0 0 0m:02s 0m:02s 221MB 2019/11/12
10:08:55
(fpga_mapper)Complete 9 1 0 0m:04s 0m:04s 224MB 2019/11/12
10:08:59
Multi-srs Generator Complete2019/11/12
10:08:52

Area Summary
I/O ports (io_port) 17 Non I/O Register bits (non_io_reg) 14 (0%)
I/O Register bits (total_io_reg) 0 Ultra Rams 0
Block Rams (v_ram) 0 (46) Block Multipliers (dsp_used) 0 (24)
LUTs (total_luts) 13 (0%)

Timing Summary
Clock NameReq FreqEst FreqSlack
gw_con_top|tck_i605.2 MHz257.2 MHz-1.118
System150.0 MHzNANA

Optimizations Summary
Combined Clock Conversion 0 / 1