#### START OF AREA REPORT #####[
Part:			GW2A_18PBGA256-8 (GoWin)

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SDIO_Slave_Controller_Top

Üþsdio_slave_ctrl®SDIO_Slave_Controller_Top_ 

Üþsdio_if®SDIO_Slave_Controller_Top_ 

Üþcmd_dec®SDIO_Slave_Controller_Top_ 

Üþsdio_biu®SDIO_Slave_Controller_Top_ 

Üþcard_fixed_regs®SDIO_Slave_Controller_Top__16744448_0_1_2_3_4_5 

Üþcrc7_chk®SDIO_Slave_Controller_Top_ 

Üþresp_gen®SDIO_Slave_Controller_Top__Z1 

Üþresp_conv®SDIO_Slave_Controller_Top_ 

Üþfn0_reg®SDIO_Slave_Controller_Top_ 

Üþslv_cpu_if®SDIO_Slave_Controller_Top__3_5_4 

Üþcmd53_ctrl®SDIO_Slave_Controller_Top_ 

Üþcmd53_tx_rx®SDIO_Slave_Controller_Top_ 

Üþcrc16_gen®SDIO_Slave_Controller_Top_ 

Üþcrc16_gen®SDIO_Slave_Controller_Top__3 

Üþcrc16_gen®SDIO_Slave_Controller_Top__4 

Üþcrc16_gen®SDIO_Slave_Controller_Top__5 

Üþcis_fnx_if®SDIO_Slave_Controller_Top_ 

Üþirq_gen®SDIO_Slave_Controller_Top_ 

Üþcmd19_tx®SDIO_Slave_Controller_Top_ 

user_sdio_cmd53_if_xmr0

user_tuning_pattern

deUstb

deUstb_1

user_cpu_slave_reg_if

user_sdio_cmd52_if_xmr1

------------------------------------------------------------------- ######## Utilization report for Top level view: top ######## =================================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 1825 100 % ====================================================== Total SEQUENTIAL ELEMENTS in the block top: 1825 (30.73 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------------ LUTS 3309 100 % MUX2_LUT5 163 100 % MUX2_LUT6 53 100 % MUX2_LUT7 16 100 % ALU 403 100 % ====================================================== Total COMBINATIONAL LOGIC in the block top: 3944 (66.42 % Utilization)
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------------------------------------------------------------------------------- ######## Utilization report for cell: SDIO_Slave_Controller_Top ######## Instance path: top.SDIO_Slave_Controller_Top =============================================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 1557 85.3 % ====================================================== Total SEQUENTIAL ELEMENTS in the block top.SDIO_Slave_Controller_Top: 1557 (26.22 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------------ LUTS 3012 91 % MUX2_LUT5 160 98.2 % MUX2_LUT6 53 100 % MUX2_LUT7 16 100 % ALU 275 68.2 % ====================================================== Total COMBINATIONAL LOGIC in the block top.SDIO_Slave_Controller_Top: 3516 (59.21 % Utilization)
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------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ ######## Instance path: SDIO_Slave_Controller_Top.\\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ ======================================================================================================= SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 1557 85.3 % ====================================================== Total SEQUENTIAL ELEMENTS in the block SDIO_Slave_Controller_Top.\\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ : 1557 (26.22 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------------ LUTS 3012 91 % MUX2_LUT5 160 98.2 % MUX2_LUT6 53 100 % MUX2_LUT7 16 100 % ALU 275 68.2 % ====================================================== Total COMBINATIONAL LOGIC in the block SDIO_Slave_Controller_Top.\\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ : 3516 (59.21 % Utilization)
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----------------------------------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~card_fixed_regs\.SDIO_Slave_Controller_Top__16744448_0_1_2_3_4_5\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~card_fixed_regs\.SDIO_Slave_Controller_Top__16744448_0_1_2_3_4_5\ ========================================================================================================================================= SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 22 1.21 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~card_fixed_regs\.SDIO_Slave_Controller_Top__16744448_0_1_2_3_4_5\ : 22 (0.37 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 29 0.8760 % ALU 16 3.97 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~card_fixed_regs\.SDIO_Slave_Controller_Top__16744448_0_1_2_3_4_5\ : 45 (0.76 % Utilization)
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--------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~cis_fnx_if\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cis_fnx_if\.SDIO_Slave_Controller_Top_\ =============================================================================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 25 1.37 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cis_fnx_if\.SDIO_Slave_Controller_Top_\ : 25 (0.42 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 34 1.03 % ALU 34 8.44 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cis_fnx_if\.SDIO_Slave_Controller_Top_\ : 68 (1.15 % Utilization)
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------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~cmd19_tx\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd19_tx\.SDIO_Slave_Controller_Top_\ ============================================================================================================= SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 14 0.7670 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd19_tx\.SDIO_Slave_Controller_Top_\ : 14 (0.24 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 16 0.4840 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd19_tx\.SDIO_Slave_Controller_Top_\ : 16 (0.27 % Utilization)
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--------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~cmd53_ctrl\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd53_ctrl\.SDIO_Slave_Controller_Top_\ =============================================================================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 129 7.07 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd53_ctrl\.SDIO_Slave_Controller_Top_\ : 129 (2.17 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 242 7.31 % ALU 39 9.68 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd53_ctrl\.SDIO_Slave_Controller_Top_\ : 281 (4.73 % Utilization)
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---------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ ================================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 212 11.6 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ : 212 (3.57 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 367 11.1 % ALU 42 10.4 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ : 409 (6.89 % Utilization)
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------------------------------------------------------------------------------------------------------------ ######## Utilization report for cell: \\\~crc16_gen\.SDIO_Slave_Controller_Top__3\ ######## Instance path: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__3\ ============================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 16 0.8770 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__3\ : 16 (0.27 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 17 0.5140 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__3\ : 17 (0.29 % Utilization)
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------------------------------------------------------------------------------------------------------------ ######## Utilization report for cell: \\\~crc16_gen\.SDIO_Slave_Controller_Top__4\ ######## Instance path: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__4\ ============================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 16 0.8770 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__4\ : 16 (0.27 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 17 0.5140 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__4\ : 17 (0.29 % Utilization)
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------------------------------------------------------------------------------------------------------------ ######## Utilization report for cell: \\\~crc16_gen\.SDIO_Slave_Controller_Top__5\ ######## Instance path: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__5\ ============================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 16 0.8770 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__5\ : 16 (0.27 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 17 0.5140 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top__5\ : 17 (0.29 % Utilization)
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---------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~crc16_gen\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top_\ ========================================================================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 16 0.8770 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top_\ : 16 (0.27 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 20 0.6040 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top_\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top_\ : 20 (0.34 % Utilization)
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------------------------------------------------------------------------------------------------------------ ######## Utilization report for cell: \\\~cmd_dec\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd_dec\.SDIO_Slave_Controller_Top_\ ============================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 233 12.8 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd_dec\.SDIO_Slave_Controller_Top_\ : 233 (3.92 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 247 7.46 % ALU 58 14.4 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~cmd_dec\.SDIO_Slave_Controller_Top_\ : 305 (5.14 % Utilization)
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------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~crc7_chk\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~crc7_chk\.SDIO_Slave_Controller_Top_\ ============================================================================================================= SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 7 0.3840 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~crc7_chk\.SDIO_Slave_Controller_Top_\ : 7 (0.12 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 14 0.4230 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~crc7_chk\.SDIO_Slave_Controller_Top_\ : 14 (0.24 % Utilization)
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------------------------------------------------------------------------------------------------------------ ######## Utilization report for cell: \\\~fn0_reg\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~fn0_reg\.SDIO_Slave_Controller_Top_\ ============================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 549 30.1 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~fn0_reg\.SDIO_Slave_Controller_Top_\ : 549 (9.25 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------------ LUTS 1398 42.2 % MUX2_LUT5 143 87.7 % MUX2_LUT6 52 98.1 % MUX2_LUT7 16 100 % ALU 47 11.7 % ====================================================== Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~fn0_reg\.SDIO_Slave_Controller_Top_\ : 1656 (27.89 % Utilization)
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------------------------------------------------------------------------------------------------------------ ######## Utilization report for cell: \\\~irq_gen\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~irq_gen\.SDIO_Slave_Controller_Top_\ ============================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 24 1.32 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~irq_gen\.SDIO_Slave_Controller_Top_\ : 24 (0.40 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 37 1.12 % ALU 7 1.74 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~irq_gen\.SDIO_Slave_Controller_Top_\ : 44 (0.74 % Utilization)
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-------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~resp_conv\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~resp_conv\.SDIO_Slave_Controller_Top_\ ============================================================================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 20 1.1 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~resp_conv\.SDIO_Slave_Controller_Top_\ : 20 (0.34 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 33 0.9970 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~resp_conv\.SDIO_Slave_Controller_Top_\ : 33 (0.56 % Utilization)
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---------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~resp_gen\.SDIO_Slave_Controller_Top__Z1\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~resp_gen\.SDIO_Slave_Controller_Top__Z1\ ================================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 104 5.7 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~resp_gen\.SDIO_Slave_Controller_Top__Z1\ : 104 (1.75 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------------ LUTS 228 6.89 % MUX2_LUT5 15 9.2 % ====================================================== Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~resp_gen\.SDIO_Slave_Controller_Top__Z1\ : 243 (4.09 % Utilization)
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------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~sdio_biu\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~sdio_biu\.SDIO_Slave_Controller_Top_\ ============================================================================================================= SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 48 2.63 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~sdio_biu\.SDIO_Slave_Controller_Top_\ : 48 (0.81 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------------ LUTS 110 3.32 % MUX2_LUT5 2 1.23 % MUX2_LUT6 1 1.89 % ALU 32 7.94 % ====================================================== Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~sdio_biu\.SDIO_Slave_Controller_Top_\ : 145 (2.44 % Utilization)
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------------------------------------------------------------------------------------------------------------ ######## Utilization report for cell: \\\~sdio_if\.SDIO_Slave_Controller_Top_\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~sdio_if\.SDIO_Slave_Controller_Top_\ ============================================================================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 15 0.8220 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~sdio_if\.SDIO_Slave_Controller_Top_\ : 15 (0.25 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 60 1.81 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~sdio_if\.SDIO_Slave_Controller_Top_\ : 60 (1.01 % Utilization)
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--------------------------------------------------------------------------------------------------------------------- ######## Utilization report for cell: \\\~slv_cpu_if\.SDIO_Slave_Controller_Top__3_5_4\ ######## Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~slv_cpu_if\.SDIO_Slave_Controller_Top__3_5_4\ ===================================================================================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 155 8.49 % ====================================================== Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~slv_cpu_if\.SDIO_Slave_Controller_Top__3_5_4\ : 155 (2.61 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 196 5.92 % ================================================= Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top_\ .\\\~slv_cpu_if\.SDIO_Slave_Controller_Top__3_5_4\ : 196 (3.30 % Utilization)
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------------------------------------------------------------ ######## Utilization report for cell: deUstb ######## Instance path: top.deUstb ============================================================ SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 23 1.26 % ====================================================== Total SEQUENTIAL ELEMENTS in the block top.deUstb: 23 (0.39 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 28 0.8460 % ALU 20 4.96 % ================================================= Total COMBINATIONAL LOGIC in the block top.deUstb: 48 (0.81 % Utilization)
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-------------------------------------------------------------- ######## Utilization report for cell: deUstb_1 ######## Instance path: top.deUstb_1 ============================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 23 1.26 % ====================================================== Total SEQUENTIAL ELEMENTS in the block top.deUstb_1: 23 (0.39 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 28 0.8460 % ALU 20 4.96 % ================================================= Total COMBINATIONAL LOGIC in the block top.deUstb_1: 48 (0.81 % Utilization)
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--------------------------------------------------------------------------- ######## Utilization report for cell: user_cpu_slave_reg_if ######## Instance path: top.user_cpu_slave_reg_if =========================================================================== SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 32 1.75 % ====================================================== Total SEQUENTIAL ELEMENTS in the block top.user_cpu_slave_reg_if: 32 (0.54 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 35 1.06 % ALU 10 2.48 % ================================================= Total COMBINATIONAL LOGIC in the block top.user_cpu_slave_reg_if: 45 (0.76 % Utilization)
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----------------------------------------------------------------------------- ######## Utilization report for cell: user_sdio_cmd52_if_xmr1 ######## Instance path: top.user_sdio_cmd52_if_xmr1 ============================================================================= SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 13 0.7120 % ====================================================== Total SEQUENTIAL ELEMENTS in the block top.user_sdio_cmd52_if_xmr1: 13 (0.22 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 37 1.12 % ================================================= Total COMBINATIONAL LOGIC in the block top.user_sdio_cmd52_if_xmr1: 37 (0.62 % Utilization)
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----------------------------------------------------------------------------- ######## Utilization report for cell: user_sdio_cmd53_if_xmr0 ######## Instance path: top.user_sdio_cmd53_if_xmr0 ============================================================================= SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 45 2.47 % ====================================================== Total SEQUENTIAL ELEMENTS in the block top.user_sdio_cmd53_if_xmr0: 45 (0.76 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------- LUTS 74 2.24 % ALU 45 11.2 % ================================================= Total COMBINATIONAL LOGIC in the block top.user_sdio_cmd53_if_xmr0: 119 (2.00 % Utilization)
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------------------------------------------------------------------------- ######## Utilization report for cell: user_tuning_pattern ######## Instance path: top.user_tuning_pattern ========================================================================= SEQUENTIAL ELEMENTS Name Total elements Utilization Notes ------------------------------------------------------ REGISTERS 9 0.4930 % ====================================================== Total SEQUENTIAL ELEMENTS in the block top.user_tuning_pattern: 9 (0.15 % Utilization)
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COMBINATIONAL LOGIC Name Total elements Utilization Notes ------------------------------------------------------ LUTS 52 1.57 % MUX2_LUT5 3 1.84 % ALU 8 1.99 % ====================================================== Total COMBINATIONAL LOGIC in the block top.user_tuning_pattern: 63 (1.06 % Utilization)
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##### END OF AREA REPORT #####]