Synthesis Messages

Report Title	GowinSynthesis Report
Design File	E:\myWork\IP\releaseVerify\new\RefDesign\Math\Gowin_SDM_RefDesign\project\src\gowin_rpll\gowin_rpll_100.v E:\myWork\IP\releaseVerify\new\RefDesign\Math\Gowin_SDM_RefDesign\project\src\gowin_rpll\gowin_rpll_20.v E:\myWork\IP\releaseVerify\new\RefDesign\Math\Gowin_SDM_RefDesign\project\src\sdm\sdm.v E:\myWork\IP\releaseVerify\new\RefDesign\Math\Gowin_SDM_RefDesign\project\src\sdm_exp.v
GowinSynthesis Constraints File	---
Version	GowinSynthesis V1.9.8.03
Part Number	GW2A-LV18PG256C8/I7
Device	GW2A-18
Created Time	Thu Jan 20 15:35:05 2022
Legal Announcement	Copyright (C)2014-2022 Gowin Semiconductor Corporation. ALL rights reserved.

Synthesis Details

Top Level Module	sdm_exp
Synthesis Process	Running parser:     CPU time = 0h 0m 0.296s, Elapsed time = 0h 0m 0.368s, Peak memory usage = 391.559MB Running netlist conversion:     CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s, Peak memory usage = 0MB Running device independent optimization:     Optimizing Phase 0: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.016s, Peak memory usage = 391.559MB     Optimizing Phase 1: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.014s, Peak memory usage = 391.559MB     Optimizing Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.013s, Peak memory usage = 391.559MB Running inference:     Inferring Phase 0: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.008s, Peak memory usage = 391.559MB     Inferring Phase 1: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s, Peak memory usage = 391.559MB     Inferring Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.004s, Peak memory usage = 391.559MB     Inferring Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.001s, Peak memory usage = 391.559MB Running technical mapping:     Tech-Mapping Phase 0: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.017s, Peak memory usage = 391.559MB     Tech-Mapping Phase 1: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.008s, Peak memory usage = 391.559MB     Tech-Mapping Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.005s, Peak memory usage = 391.559MB     Tech-Mapping Phase 3: CPU time = 0h 0m 0.156s, Elapsed time = 0h 0m 0.17s, Peak memory usage = 391.559MB     Tech-Mapping Phase 4: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.014s, Peak memory usage = 391.559MB Generate output files:     CPU time = 0h 0m 0.078s, Elapsed time = 0h 0m 0.101s, Peak memory usage = 391.559MB
Total Time and Memory Usage	CPU time = 0h 0m 0.652s, Elapsed time = 0h 0m 0.739s, Peak memory usage = 391.559MB

Resource

Resource Usage Summary

Resource	Usage
I/O Port	5
I/O Buf	5
IBUF	2
OBUF	3
Register	519
DFF	1
DFFE	4
DFFP	2
DFFPE	33
DFFC	55
DFFCE	420
DFFNP	4
LUT	235
LUT2	15
LUT3	183
LUT4	37
ALU	184
ALU	184
SSRAM	5
RAM16S4	5
INV	3
INV	3
DSP	5
MULTALU36X18	5
BSRAM	1
SDPB	1
CLOCK	2
rPLL	2

Resource Utilization Summary

Resource	Usage	Utilization
Logic	452(238 LUTs, 184 ALUs, 5 SSRAMs) / 20736	2%
Register	519 / 16173	3%
--Register as Latch	0 / 16173	0%
--Register as FF	519 / 16173	3%
BSRAM	1 / 46	2%

Timing

Clock Summary:

Clock Name	Type	Period	Frequency(MHz)	Rise	Fall	Source	Master	Object
SYM_CLK	Base	20.000	50.0	0.000	10.000			SYM_CLK_ibuf/I
u_PLL_20/rpll_inst/CLKOUT.default_gen_clk	Generated	50.000	20.0	0.000	25.000	SYM_CLK_ibuf/I	SYM_CLK	u_PLL_20/rpll_inst/CLKOUT
u_PLL_20/rpll_inst/CLKOUTP.default_gen_clk	Generated	50.000	20.0	0.000	25.000	SYM_CLK_ibuf/I	SYM_CLK	u_PLL_20/rpll_inst/CLKOUTP
u_PLL_20/rpll_inst/CLKOUTD.default_gen_clk	Generated	100.000	10.0	0.000	50.000	SYM_CLK_ibuf/I	SYM_CLK	u_PLL_20/rpll_inst/CLKOUTD
u_PLL_20/rpll_inst/CLKOUTD3.default_gen_clk	Generated	150.000	6.7	0.000	75.000	SYM_CLK_ibuf/I	SYM_CLK	u_PLL_20/rpll_inst/CLKOUTD3
u_PLL_100/rpll_inst/CLKOUT.default_gen_clk	Generated	10.000	100.0	0.000	5.000	SYM_CLK_ibuf/I	SYM_CLK	u_PLL_100/rpll_inst/CLKOUT
u_PLL_100/rpll_inst/CLKOUTP.default_gen_clk	Generated	10.000	100.0	0.000	5.000	SYM_CLK_ibuf/I	SYM_CLK	u_PLL_100/rpll_inst/CLKOUTP
u_PLL_100/rpll_inst/CLKOUTD.default_gen_clk	Generated	20.000	50.0	0.000	10.000	SYM_CLK_ibuf/I	SYM_CLK	u_PLL_100/rpll_inst/CLKOUTD
u_PLL_100/rpll_inst/CLKOUTD3.default_gen_clk	Generated	30.000	33.3	0.000	15.000	SYM_CLK_ibuf/I	SYM_CLK	u_PLL_100/rpll_inst/CLKOUTD3

Max Frequency Summary:

No.	Clock Name	Constraint	Actual Fmax	Logic Level	Entity
1	u_PLL_20/rpll_inst/CLKOUT.default_gen_clk	20.0(MHz)	277.8(MHz)	6	TOP
2	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk	100.0(MHz)	224.0(MHz)	8	TOP

Detail Timing Paths Information

Path 1

Path Summary:

Slack	5.535
Data Arrival Time	5.639
Data Required Time	11.174
From	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/delay_u/dReg[0]_0_s2
To	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/y_35_s0
Launch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]
Latch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]

Data Arrival Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
0.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
1.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
1.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/delay_u/dReg[0]_0_s2/CLK
1.441	0.232	tC2Q	RF	12	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/delay_u/dReg[0]_0_s2/Q
1.678	0.237	tNET	FF	4	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/delay_u/dReg[0]_0_s8/AD[0](chk_dup)
2.195	0.517	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/delay_u/dReg[0]_0_s8/DO[0]
2.432	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/delay_u/u_d_0_s2/I0
2.949	0.517	tINS	FF	6	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/delay_u/u_d_0_s2/F
3.186	0.237	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n287_s/I0
3.735	0.549	tINS	FR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n287_s/COUT
3.735	0.000	tNET	RR	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n286_s/CIN
3.770	0.035	tINS	RF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n286_s/COUT
3.770	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n285_s/CIN
3.806	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n285_s/COUT
3.806	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n284_s/CIN
3.841	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n284_s/COUT
3.841	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n283_s/CIN
3.876	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n283_s/COUT
3.876	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n282_s/CIN
3.911	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n282_s/COUT
3.911	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n281_s/CIN
3.946	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n281_s/COUT
3.946	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n280_s/CIN
3.982	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n280_s/COUT
3.982	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n279_s/CIN
4.017	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n279_s/COUT
4.017	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n278_s/CIN
4.052	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n278_s/COUT
4.052	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n277_s/CIN
4.087	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n277_s/COUT
4.087	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n276_s/CIN
4.122	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n276_s/COUT
4.122	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n275_s/CIN
4.158	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n275_s/COUT
4.158	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n274_s/CIN
4.193	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n274_s/COUT
4.193	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n273_s/CIN
4.228	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n273_s/COUT
4.228	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n272_s/CIN
4.263	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n272_s/COUT
4.263	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n271_s/CIN
4.298	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n271_s/COUT
4.298	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n270_s/CIN
4.334	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n270_s/COUT
4.334	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n269_s/CIN
4.369	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n269_s/COUT
4.369	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n268_s/CIN
4.404	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n268_s/COUT
4.404	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n267_s/CIN
4.439	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n267_s/COUT
4.439	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n266_s/CIN
4.474	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n266_s/COUT
4.474	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n265_s/CIN
4.510	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n265_s/COUT
4.510	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n264_s/CIN
4.545	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n264_s/COUT
4.545	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n263_s/CIN
4.580	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n263_s/COUT
4.580	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n262_s/CIN
4.615	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n262_s/COUT
4.615	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n261_s/CIN
4.650	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n261_s/COUT
4.650	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n260_s/CIN
4.686	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n260_s/COUT
4.686	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n259_s/CIN
4.721	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n259_s/COUT
4.721	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n258_s/CIN
4.756	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n258_s/COUT
4.756	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n257_s/CIN
4.791	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n257_s/COUT
4.791	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n256_s/CIN
4.826	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n256_s/COUT
4.826	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n255_s/CIN
4.862	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n255_s/COUT
4.862	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n254_s/CIN
4.897	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n254_s/COUT
4.897	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n253_s/CIN
4.932	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n253_s/COUT
4.932	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n252_s/CIN
5.402	0.470	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n252_s/SUM
5.639	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/y_35_s0/D

Data Required Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
10.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
11.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
11.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/y_35_s0/CLK
11.174	-0.035	tSu		1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/y_35_s0

Path Statistics:

Clock Skew:	0.000
Setup Relationship:	10.000
Logic Level:	8
Arrival Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay:	cell: 3.250, 73.362%; route: 0.948, 21.401%; tC2Q: 0.232, 5.237%
Required Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%

Path 2

Path Summary:

Slack	6.230
Data Arrival Time	4.944
Data Required Time	11.174
From	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_0_s0
To	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_5_f_35_s1
Launch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]
Latch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]

Data Arrival Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
0.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
1.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
1.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_0_s0/CLK
1.441	0.232	tC2Q	RF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_0_s0/Q
1.678	0.237	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1684_s/I1
2.248	0.570	tINS	FR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1684_s/COUT
2.248	0.000	tNET	RR	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1683_s/CIN
2.283	0.035	tINS	RF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1683_s/COUT
2.283	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1682_s/CIN
2.319	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1682_s/COUT
2.319	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1681_s/CIN
2.354	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1681_s/COUT
2.354	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1680_s/CIN
2.389	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1680_s/COUT
2.389	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1679_s/CIN
2.424	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1679_s/COUT
2.424	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1678_s/CIN
2.459	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1678_s/COUT
2.459	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1677_s/CIN
2.495	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1677_s/COUT
2.495	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1676_s/CIN
2.530	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1676_s/COUT
2.530	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1675_s/CIN
2.565	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1675_s/COUT
2.565	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1674_s/CIN
2.600	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1674_s/COUT
2.600	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1673_s/CIN
2.635	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1673_s/COUT
2.635	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1672_s/CIN
2.671	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1672_s/COUT
2.671	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1671_s/CIN
2.706	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1671_s/COUT
2.706	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1670_s/CIN
2.741	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1670_s/COUT
2.741	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1669_s/CIN
2.776	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1669_s/COUT
2.776	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1668_s/CIN
2.811	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1668_s/COUT
2.811	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1667_s/CIN
2.847	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1667_s/COUT
2.847	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1666_s/CIN
2.882	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1666_s/COUT
2.882	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1665_s/CIN
2.917	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1665_s/COUT
2.917	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1664_s/CIN
2.952	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1664_s/COUT
2.952	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1663_s/CIN
2.987	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1663_s/COUT
2.987	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1662_s/CIN
3.023	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1662_s/COUT
3.023	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1661_s/CIN
3.058	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1661_s/COUT
3.058	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1660_s/CIN
3.093	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1660_s/COUT
3.093	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1659_s/CIN
3.128	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1659_s/COUT
3.128	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1658_s/CIN
3.163	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1658_s/COUT
3.163	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1657_s/CIN
3.199	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1657_s/COUT
3.199	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1656_s/CIN
3.234	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1656_s/COUT
3.234	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1655_s/CIN
3.269	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1655_s/COUT
3.269	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1654_s/CIN
3.304	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1654_s/COUT
3.304	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1653_s/CIN
3.339	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1653_s/COUT
3.339	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1652_s/CIN
3.375	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1652_s/COUT
3.375	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1651_s/CIN
3.410	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1651_s/COUT
3.410	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1650_s/CIN
3.445	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1650_s/COUT
3.445	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1649_s/CIN
3.915	0.470	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1649_s/SUM
4.152	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1722_s0/I1
4.707	0.555	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1722_s0/F
4.944	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_5_f_35_s1/D

Data Required Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
10.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
11.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
11.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_5_f_35_s1/CLK
11.174	-0.035	tSu		1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_5_f_35_s1

Path Statistics:

Clock Skew:	0.000
Setup Relationship:	10.000
Logic Level:	7
Arrival Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay:	cell: 2.792, 74.751%; route: 0.711, 19.037%; tC2Q: 0.232, 6.212%
Required Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%

Path 3

Path Summary:

Slack	6.230
Data Arrival Time	4.944
Data Required Time	11.174
From	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_3_0_s0
To	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_f_35_s1
Launch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]
Latch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]

Data Arrival Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
0.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
1.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
1.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_3_0_s0/CLK
1.441	0.232	tC2Q	RF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_3_0_s0/Q
1.678	0.237	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1499_s/I1
2.248	0.570	tINS	FR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1499_s/COUT
2.248	0.000	tNET	RR	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1498_s/CIN
2.283	0.035	tINS	RF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1498_s/COUT
2.283	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1497_s/CIN
2.319	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1497_s/COUT
2.319	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1496_s/CIN
2.354	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1496_s/COUT
2.354	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1495_s/CIN
2.389	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1495_s/COUT
2.389	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1494_s/CIN
2.424	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1494_s/COUT
2.424	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1493_s/CIN
2.459	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1493_s/COUT
2.459	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1492_s/CIN
2.495	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1492_s/COUT
2.495	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1491_s/CIN
2.530	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1491_s/COUT
2.530	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1490_s/CIN
2.565	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1490_s/COUT
2.565	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1489_s/CIN
2.600	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1489_s/COUT
2.600	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1488_s/CIN
2.635	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1488_s/COUT
2.635	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1487_s/CIN
2.671	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1487_s/COUT
2.671	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1486_s/CIN
2.706	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1486_s/COUT
2.706	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1485_s/CIN
2.741	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1485_s/COUT
2.741	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1484_s/CIN
2.776	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1484_s/COUT
2.776	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1483_s/CIN
2.811	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1483_s/COUT
2.811	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1482_s/CIN
2.847	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1482_s/COUT
2.847	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1481_s/CIN
2.882	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1481_s/COUT
2.882	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1480_s/CIN
2.917	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1480_s/COUT
2.917	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1479_s/CIN
2.952	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1479_s/COUT
2.952	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1478_s/CIN
2.987	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1478_s/COUT
2.987	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1477_s/CIN
3.023	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1477_s/COUT
3.023	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1476_s/CIN
3.058	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1476_s/COUT
3.058	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1475_s/CIN
3.093	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1475_s/COUT
3.093	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1474_s/CIN
3.128	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1474_s/COUT
3.128	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1473_s/CIN
3.163	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1473_s/COUT
3.163	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1472_s/CIN
3.199	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1472_s/COUT
3.199	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1471_s/CIN
3.234	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1471_s/COUT
3.234	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1470_s/CIN
3.269	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1470_s/COUT
3.269	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1469_s/CIN
3.304	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1469_s/COUT
3.304	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1468_s/CIN
3.339	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1468_s/COUT
3.339	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1467_s/CIN
3.375	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1467_s/COUT
3.375	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1466_s/CIN
3.410	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1466_s/COUT
3.410	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1465_s/CIN
3.445	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1465_s/COUT
3.445	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1464_s/CIN
3.915	0.470	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1464_s/SUM
4.152	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1537_s0/I1
4.707	0.555	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1537_s0/F
4.944	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_f_35_s1/D

Data Required Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
10.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
11.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
11.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_f_35_s1/CLK
11.174	-0.035	tSu		1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_f_35_s1

Path Statistics:

Clock Skew:	0.000
Setup Relationship:	10.000
Logic Level:	7
Arrival Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay:	cell: 2.792, 74.751%; route: 0.711, 19.037%; tC2Q: 0.232, 6.212%
Required Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%

Path 4

Path Summary:

Slack	6.230
Data Arrival Time	4.944
Data Required Time	11.174
From	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_2_0_s0
To	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_3_f_35_s1
Launch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]
Latch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]

Data Arrival Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
0.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
1.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
1.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_2_0_s0/CLK
1.441	0.232	tC2Q	RF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_2_0_s0/Q
1.678	0.237	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1314_s/I1
2.248	0.570	tINS	FR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1314_s/COUT
2.248	0.000	tNET	RR	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1313_s/CIN
2.283	0.035	tINS	RF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1313_s/COUT
2.283	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1312_s/CIN
2.319	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1312_s/COUT
2.319	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1311_s/CIN
2.354	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1311_s/COUT
2.354	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1310_s/CIN
2.389	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1310_s/COUT
2.389	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1309_s/CIN
2.424	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1309_s/COUT
2.424	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1308_s/CIN
2.459	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1308_s/COUT
2.459	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1307_s/CIN
2.495	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1307_s/COUT
2.495	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1306_s/CIN
2.530	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1306_s/COUT
2.530	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1305_s/CIN
2.565	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1305_s/COUT
2.565	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1304_s/CIN
2.600	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1304_s/COUT
2.600	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1303_s/CIN
2.635	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1303_s/COUT
2.635	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1302_s/CIN
2.671	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1302_s/COUT
2.671	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1301_s/CIN
2.706	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1301_s/COUT
2.706	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1300_s/CIN
2.741	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1300_s/COUT
2.741	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1299_s/CIN
2.776	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1299_s/COUT
2.776	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1298_s/CIN
2.811	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1298_s/COUT
2.811	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1297_s/CIN
2.847	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1297_s/COUT
2.847	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1296_s/CIN
2.882	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1296_s/COUT
2.882	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1295_s/CIN
2.917	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1295_s/COUT
2.917	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1294_s/CIN
2.952	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1294_s/COUT
2.952	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1293_s/CIN
2.987	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1293_s/COUT
2.987	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1292_s/CIN
3.023	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1292_s/COUT
3.023	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1291_s/CIN
3.058	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1291_s/COUT
3.058	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1290_s/CIN
3.093	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1290_s/COUT
3.093	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1289_s/CIN
3.128	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1289_s/COUT
3.128	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1288_s/CIN
3.163	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1288_s/COUT
3.163	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1287_s/CIN
3.199	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1287_s/COUT
3.199	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1286_s/CIN
3.234	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1286_s/COUT
3.234	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1285_s/CIN
3.269	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1285_s/COUT
3.269	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1284_s/CIN
3.304	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1284_s/COUT
3.304	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1283_s/CIN
3.339	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1283_s/COUT
3.339	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1282_s/CIN
3.375	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1282_s/COUT
3.375	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1281_s/CIN
3.410	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1281_s/COUT
3.410	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1280_s/CIN
3.445	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1280_s/COUT
3.445	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1279_s/CIN
3.915	0.470	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1279_s/SUM
4.152	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1352_s0/I1
4.707	0.555	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1352_s0/F
4.944	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_3_f_35_s1/D

Data Required Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
10.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
11.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
11.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_3_f_35_s1/CLK
11.174	-0.035	tSu		1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_3_f_35_s1

Path Statistics:

Clock Skew:	0.000
Setup Relationship:	10.000
Logic Level:	7
Arrival Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay:	cell: 2.792, 74.751%; route: 0.711, 19.037%; tC2Q: 0.232, 6.212%
Required Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%

Path 5

Path Summary:

Slack	6.265
Data Arrival Time	4.909
Data Required Time	11.174
From	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_0_s0
To	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_5_f_34_s1
Launch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]
Latch Clk	u_PLL_100/rpll_inst/CLKOUT.default_gen_clk[R]

Data Arrival Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
0.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
1.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
1.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_0_s0/CLK
1.441	0.232	tC2Q	RF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_4_0_s0/Q
1.678	0.237	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1684_s/I1
2.248	0.570	tINS	FR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1684_s/COUT
2.248	0.000	tNET	RR	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1683_s/CIN
2.283	0.035	tINS	RF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1683_s/COUT
2.283	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1682_s/CIN
2.319	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1682_s/COUT
2.319	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1681_s/CIN
2.354	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1681_s/COUT
2.354	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1680_s/CIN
2.389	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1680_s/COUT
2.389	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1679_s/CIN
2.424	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1679_s/COUT
2.424	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1678_s/CIN
2.459	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1678_s/COUT
2.459	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1677_s/CIN
2.495	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1677_s/COUT
2.495	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1676_s/CIN
2.530	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1676_s/COUT
2.530	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1675_s/CIN
2.565	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1675_s/COUT
2.565	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1674_s/CIN
2.600	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1674_s/COUT
2.600	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1673_s/CIN
2.635	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1673_s/COUT
2.635	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1672_s/CIN
2.671	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1672_s/COUT
2.671	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1671_s/CIN
2.706	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1671_s/COUT
2.706	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1670_s/CIN
2.741	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1670_s/COUT
2.741	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1669_s/CIN
2.776	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1669_s/COUT
2.776	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1668_s/CIN
2.811	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1668_s/COUT
2.811	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1667_s/CIN
2.847	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1667_s/COUT
2.847	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1666_s/CIN
2.882	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1666_s/COUT
2.882	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1665_s/CIN
2.917	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1665_s/COUT
2.917	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1664_s/CIN
2.952	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1664_s/COUT
2.952	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1663_s/CIN
2.987	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1663_s/COUT
2.987	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1662_s/CIN
3.023	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1662_s/COUT
3.023	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1661_s/CIN
3.058	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1661_s/COUT
3.058	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1660_s/CIN
3.093	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1660_s/COUT
3.093	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1659_s/CIN
3.128	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1659_s/COUT
3.128	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1658_s/CIN
3.163	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1658_s/COUT
3.163	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1657_s/CIN
3.199	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1657_s/COUT
3.199	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1656_s/CIN
3.234	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1656_s/COUT
3.234	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1655_s/CIN
3.269	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1655_s/COUT
3.269	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1654_s/CIN
3.304	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1654_s/COUT
3.304	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1653_s/CIN
3.339	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1653_s/COUT
3.339	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1652_s/CIN
3.375	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1652_s/COUT
3.375	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1651_s/CIN
3.410	0.035	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1651_s/COUT
3.410	0.000	tNET	FF	2	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1650_s/CIN
3.880	0.470	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1650_s/SUM
4.117	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1723_s0/I1
4.672	0.555	tINS	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/n1723_s0/F
4.909	0.237	tNET	FF	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_5_f_34_s1/D

Data Required Path:

AT	DELAY	TYPE	RF	FANOUT	NODE
10.000	0.000				u_PLL_100/rpll_inst/CLKOUT.default_gen_clk
11.029	1.029	tCL	RR	504	u_PLL_100/rpll_inst/CLKOUT
11.209	0.180	tNET	RR	1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_5_f_34_s1/CLK
11.174	-0.035	tSu		1	Sigma_Delta_Modulator/Sigma_Delta_Modulator/modulator/tmp_5_f_34_s1

Path Statistics:

Clock Skew:	0.000
Setup Relationship:	10.000
Logic Level:	7
Arrival Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay:	cell: 2.757, 74.511%; route: 0.711, 19.218%; tC2Q: 0.232, 6.271%
Required Clock Path Delay:	cell: 0.000, 0.000%; route: 0.180, 100.000%