

@S |Clock Optimization Summary



#### START OF PREMAP CLOCK OPTIMIZATION REPORT #####[

9 non-gated/non-generated clock tree(s) driving 2362 clock pin(s) of sequential element(s)
0 gated/generated clock tree(s) driving 0 clock pin(s) of sequential element(s)
0 instances converted, 0 sequential instances remain driven by gated/generated clocks

=========================== Non-Gated/Non-Generated Clocks ============================
Clock Tree ID     Driving Element     Drive Element Type     Fanout     Sample Instance
---------------------------------------------------------------------------------------
@KP:ckid0_0       ENCRYPTED           CLKDIV                 2233       ENCRYPTED      
@KP:ckid0_1       clk                 port                   33         ENCRYPTED      
@KP:ckid0_2       ENCRYPTED           DHCEN                  60         ENCRYPTED      
@KP:ckid0_3       ENCRYPTED           DQS                    8          ENCRYPTED      
@KP:ckid0_4       ENCRYPTED           DQS                    9          ENCRYPTED      
@KP:ckid0_5       ENCRYPTED           DQS                    1          ENCRYPTED      
@KP:ckid0_6       ENCRYPTED           DQS                    8          ENCRYPTED      
@KP:ckid0_7       ENCRYPTED           DQS                    9          ENCRYPTED      
@KP:ckid0_8       ENCRYPTED           DQS                    1          ENCRYPTED      
=======================================================================================


##### END OF CLOCK OPTIMIZATION REPORT ######

