Project Status Summary Page

Project Settings
Project Name | DDR3 | Device Name | rev_1: GOWIN-GW2A : GW2A_18
Implementation Name | rev_1 | Top Module | [auto]
Pipelining | 1 | Retiming | 0
Resource Sharing | 1 | Fanout Guide | 10000
Disable I/O Insertion | 1 | Disable Sequential Optimizations | 0
Clock Conversion | 1 | FSM Compiler | 1

Run Status
Job Name | Status |  |  |  | CPU Time | Real Time | Memory | Date/Time
(compiler) | Complete | 11 | 23 | 0 | - | 00m:04s | - | 2020/6/17 17:50:16
(premap) | Complete | 6 | 0 | 0 | 0m:03s | 0m:03s | 242MB | 2020/6/17 17:50:21
(fpga_mapper) | Complete | 9 | 14 | 0 | 0m:18s | 0m:18s | 293MB | 2020/6/17 17:50:40
Multi-srs Generator | Complete |  |  |  | 00m:01s |  |  | 2020/6/17 17:50:18

Area Summary
I/O ports (io_port) | 374 | Non I/O Register bits (non_io_reg) | 1788 (11%)
I/O Register bits (total_io_reg) | 0 | Ultra Rams | 0
Block Rams (v_ram) | 8 (46) | Block Multipliers (dsp_used) | 0 (24)
LUTs (total_luts) | 1767 (8%) |  |

Timing Summary
Clock Name | Req Freq | Est Freq | Slack
--- | --- | --- | ---
DDR3_Memory_Interface_Top|clk | 292.1 MHz | 248.3 MHz | -0.604
_~ddr_phy_data_io_DDR3_Memory_Interface_Top__16s_8s_2500s_5s_5s_0|dqsr90_inferred_clock | 150.0 MHz | NA | NA
_~ddr_phy_data_io_DDR3_Memory_Interface_Top__16s_8s_2500s_5s_5s_0|dqsw0_inferred_clock | 150.0 MHz | NA | NA
_~ddr_phy_data_io_DDR3_Memory_Interface_Top__16s_8s_2500s_5s_5s_0|dqsw270_inferred_clock | 150.0 MHz | NA | NA
_~ddr_phy_data_io_DDR3_Memory_Interface_Top__16s_8s_2500s_5s_5s_1|dqsr90_inferred_clock | 150.0 MHz | NA | NA
_~ddr_phy_data_io_DDR3_Memory_Interface_Top__16s_8s_2500s_5s_5s_1|dqsw0_inferred_clock | 150.0 MHz | NA | NA
_~ddr_phy_data_io_DDR3_Memory_Interface_Top__16s_8s_2500s_5s_5s_1|dqsw270_inferred_clock | 150.0 MHz | NA | NA
_~ddr_phy_top_DDR3_Memory_Interface_Top__Z4|clk_x1_inferred_clock | 158.6 MHz | 134.8 MHz | -1.113
_~ddr_phy_top_DDR3_Memory_Interface_Top__Z4|clk_x4i_inferred_clock | 150.0 MHz | NA | NA
System | 726.6 MHz | 617.7 MHz | -0.243

Optimizations Summary
Combined Clock Conversion | 9 / 0 |  |