# Thu Dec 19 10:07:51 2019


Copyright (C) 1994-2019 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: P-2019.03G-1-Beta1
Install: D:\Gowin\Gowin_V1.9.3Beta_37275_20191218\SynplifyPro
OS: Windows 6.1

Hostname: GZAE-AE-CAOJIE

Implementation : rev_1
Synopsys Generic Technology Pre-mapping, Version mapgw2019q1p1, Build 007R, Built Dec  5 2019 10:27:23


Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 117MB peak: 117MB)

@A: MF827 |No constraint file specified.
@L: D:\proj\scaler_example_design_live\project\src\frame_buffer\fifo\temp\FIFO\rev_1\fifo_dma_write_32_128_scck.rpt 
Printing clock  summary report in "D:\proj\scaler_example_design_live\project\src\frame_buffer\fifo\temp\FIFO\rev_1\fifo_dma_write_32_128_scck.rpt" file 
@N: MF916 |Option synthesis_strategy=base is enabled. 
@N: MF248 |Running in 64-bit mode.
@N: MF666 |Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)

Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 127MB peak: 127MB)


Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 127MB peak: 127MB)


Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 127MB peak: 127MB)


Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)


Starting clock optimization phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 220MB peak: 220MB)


Finished clock optimization phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)


Starting clock optimization report phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)


Finished clock optimization report phase (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:01s; Memory used current: 223MB peak: 223MB)


Finished netlist restructuring (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 223MB peak: 223MB)



Clock Summary
******************

          Start                           Requested     Requested     Clock        Clock                     Clock
Level     Clock                           Frequency     Period        Type         Group                     Load 
------------------------------------------------------------------------------------------------------------------
0 -       fifo_dma_write_32_128|RdClk     199.1 MHz     5.024         inferred     Autoconstr_clkgroup_1     189  
                                                                                                                  
0 -       fifo_dma_write_32_128|WrClk     247.1 MHz     4.047         inferred     Autoconstr_clkgroup_0     172  
==================================================================================================================



Clock Load Summary
***********************

                                Clock     Source          Clock Pin                          Non-clock Pin     Non-clock Pin                
Clock                           Load      Pin             Seq Example                        Seq Example       Comb Example                 
--------------------------------------------------------------------------------------------------------------------------------------------
fifo_dma_write_32_128|RdClk     189       RdClk(port)     fifo_inst.Big\.rq2_wptr[9:0].C     -                 fifo_inst.un1_RdClk.I[0](inv)
                                                                                                                                            
fifo_dma_write_32_128|WrClk     172       WrClk(port)     fifo_inst.Big\.wq2_rptr[9:0].C     -                 fifo_inst.un1_WrClk.I[0](inv)
============================================================================================================================================


ICG Latch Removal Summary:
Number of ICG latches removed: 0
Number of ICG latches not removed:	0


@S |Clock Optimization Summary



#### START OF PREMAP CLOCK OPTIMIZATION REPORT #####[

2 non-gated/non-generated clock tree(s) driving 237 clock pin(s) of sequential element(s)
0 gated/generated clock tree(s) driving 0 clock pin(s) of sequential element(s)
0 instances converted, 0 sequential instances remain driven by gated/generated clocks

=========================== Non-Gated/Non-Generated Clocks ============================
Clock Tree ID     Driving Element     Drive Element Type     Fanout     Sample Instance
---------------------------------------------------------------------------------------
@KP:ckid0_0       RdClk               port                   189        ENCRYPTED      
@KP:ckid0_1       WrClk               port                   48         ENCRYPTED      
=======================================================================================


##### END OF CLOCK OPTIMIZATION REPORT ######

@N: FX1143 |Skipping assigning INTERNAL_VREF to iobanks, because the table of mapping from pin to iobank is not initialized.
Finished Pre Mapping Phase.
@N: BN225 |Writing default property annotation file D:\proj\scaler_example_design_live\project\src\frame_buffer\fifo\temp\FIFO\rev_1\fifo_dma_write_32_128.sap.

Starting constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 223MB peak: 223MB)


Finished constraint checker preprocessing (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 223MB peak: 223MB)


Finished constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 223MB peak: 223MB)

Pre-mapping successful!

At Mapper Exit (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:02s; Memory used current: 143MB peak: 225MB)

Process took 0h:00m:03s realtime, 0h:00m:02s cputime
# Thu Dec 19 10:07:54 2019

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