Project Status Summary Page

Project Settings
Project Name | ao_0 | Device Name | rev_1: GOWIN-GW2A : GW2A_18
Implementation Name | rev_1 | Top Module | [auto]
Pipelining | 1 | Retiming | 0
Resource Sharing | 1 | Fanout Guide | 10000
Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0
Clock Conversion | 1 | FSM Compiler | 1

Run Status
Job Name | Status |  |  |  | CPU Time | Real Time | Memory | Date/Time
(compiler) | Complete | 6 | 28 | 0 | - | 00m:02s | - | 2019/12/20 16:21:57
(premap) | Complete | 6 | 0 | 0 | 0m:01s | 0m:02s | 224MB | 2019/12/20 16:22:01
(fpga_mapper) | Complete | 9 | 2 | 0 | 0m:05s | 0m:06s | 254MB | 2019/12/20 16:22:08
Multi-srs Generator | Complete |  |  |  |  |  |  | 2019/12/20 16:21:58

Area Summary
I/O ports (io_port) | 31 | Non I/O Register bits (non_io_reg) | 304 (1%)
I/O Register bits (total_io_reg) | 0 | Ultra Rams | 0
Block Rams (v_ram) | 3 (46) | Block Multipliers (dsp_used) | 0 (24)
LUTs (total_luts) | 394 (1%) |  |

Timing Summary
Clock Name | Req Freq | Est Freq | Slack
--- | --- | --- | ---
ao_top_0|clk_i | 216.4 MHz | 183.9 MHz | -0.816
ao_top_0|control[0] | 174.1 MHz | 148.0 MHz | -1.014
System | 150.0 MHz | 238.8 MHz | 2.480

Optimizations Summary
Combined Clock Conversion | 2 / 0 |  |