NOTE:  This version of the software is not a production release. No warranty is made as to the general availability of features and functionality included in this version or described in the accompanying documentation. The final contents of a production release and its timing remain at the sole discretion of Synopsys.

Starting:    D:\Gowin\Gowin_V1.9.6Beta\SynplifyPro\bin64\mbin\synbatch.exe
Install:     D:\Gowin\Gowin_V1.9.6Beta\SynplifyPro
Hostname:    GZAE-AE-CAOJIE
Date:        Wed Jun 17 17:41:39 2020
Version:     Q-2020.03G-Beta1

Arguments:   -product synplify_pro -batch -licensetype synplifypro_gowin D:/proj/scaler_example_design_live/project/src/ddr3_memory_interface/temp/DDR3/DDR3.prj
ProductType: synplify_pro

License checkout: synplifypro_gowin
License: synplifypro_gowin node-locked 
Licensed Vendor: gowin

Running in Vendor Mode

auto_infer_blackbox is not supported in current product.
log file: "D:\proj\scaler_example_design_live\project\src\ddr3_memory_interface\temp\DDR3\rev_1\ddr3_memory_interface.srr"
Running: rev_1 in foreground

Running DDR3|rev_1

Running Flow: compile (Compile) on DDR3|rev_1
# Wed Jun 17 17:41:40 2020

Running Flow: compile_flow (Compile Process) on DDR3|rev_1
# Wed Jun 17 17:41:40 2020

Running: compiler (Compile Input) on DDR3|rev_1
# Wed Jun 17 17:41:40 2020
Copied D:\proj\scaler_example_design_live\project\src\ddr3_memory_interface\temp\DDR3\rev_1\synwork\ddr3_memory_interface_comp.srs to D:\proj\scaler_example_design_live\project\src\ddr3_memory_interface\temp\DDR3\rev_1\ddr3_memory_interface.srs

compiler completed
# Wed Jun 17 17:41:45 2020

Return Code: 0
Run Time:00h:00m:05s

Running: multi_srs_gen (Multi-srs Generator) on DDR3|rev_1
# Wed Jun 17 17:41:45 2020

multi_srs_gen completed
# Wed Jun 17 17:41:45 2020

Return Code: 0
Run Time:00h:00m:00s
Copied D:\proj\scaler_example_design_live\project\src\ddr3_memory_interface\temp\DDR3\rev_1\synwork\ddr3_memory_interface_mult.srs to D:\proj\scaler_example_design_live\project\src\ddr3_memory_interface\temp\DDR3\rev_1\ddr3_memory_interface.srs
Complete: Compile Process on DDR3|rev_1

Running: premap (Premap) on DDR3|rev_1
# Wed Jun 17 17:41:45 2020

premap completed
# Wed Jun 17 17:41:49 2020

Return Code: 0
Run Time:00h:00m:04s
Complete: Compile on DDR3|rev_1

Running Flow: map (Map) on DDR3|rev_1
# Wed Jun 17 17:41:49 2020

Running: fpga_mapper (Map & Optimize) on DDR3|rev_1
# Wed Jun 17 17:41:49 2020
Copied D:\proj\scaler_example_design_live\project\src\ddr3_memory_interface\temp\DDR3\rev_1\synwork\ddr3_memory_interface_m.srm to D:\proj\scaler_example_design_live\project\src\ddr3_memory_interface\temp\DDR3\rev_1\ddr3_memory_interface.srm

fpga_mapper completed with warnings
# Wed Jun 17 17:42:08 2020

Return Code: 1
Run Time:00h:00m:19s
Complete: Map on DDR3|rev_1
Complete: Logic Synthesis on DDR3|rev_1
exit status=0
exit status=0
License checkin: synplifypro_gowin
