@N: CG364 :"D:\proj\scaler_example_design_live\project\src\frame_buffer\fifo\temp\FIFO\fifo_parameter.v":1:0:1:8|Synthesizing module work_D:\proj\scaler_example_design_live\project\src\frame_buffer\fifo\temp\FIFO\fifo_define.v_unit in library work.
Selecting top level module fifo_dma_write_32_128
Running optimization stage 1 on \~fifo.fifo_dma_write_32_128  .......
@N: CG364 :"D:\Gowin\Gowin_V1.9.3Beta_37275_20191218\IDE\ipcore\FIFO\data\fifo_top.v":3:20:3:20|Synthesizing module fifo_dma_write_32_128 in library work.
Running optimization stage 1 on fifo_dma_write_32_128 .......
Running optimization stage 2 on fifo_dma_write_32_128 .......
Running optimization stage 2 on \~fifo.fifo_dma_write_32_128  .......

For a summary of runtime and memory usage per design unit, please see file:
==========================================================
@L: D:\proj\scaler_example_design_live\project\src\frame_buffer\fifo\temp\FIFO\rev_1\synwork\layer0.rt.csv

