//Copyright (C)2014-2020 Gowin Semiconductor Corporation.
//All rights reserved.
//File Title: Post-PnR Simulation Model file
//GOWIN Version: V1.9.3.02Beta
//Created Time: Fri Apr 24 10:29:53 2020

module vfb_top(
	I_rst_n,
	I_dma_clk,
	I_wr_halt,
	I_rd_halt,
	I_vin0_clk,
	I_vin0_vs_n,
	I_vin0_de,
	I_vin0_data,
	I_vout0_clk,
	I_vout0_vs_n,
	I_vout0_de,
	cmd_ready,
	wr_data_rdy,
	rd_data_valid,
	rd_data_end,
	rd_data,
	init_calib_complete,
	O_vout0_den,
	O_vout0_data,
	O_vout0fifo_empty,
	cmd,
	cmd_en,
	app_burst_number,
	addr,
	wr_data_en,
	wr_data_end,
	wr_data,
	wr_data_mask
);
input I_rst_n;
input I_dma_clk;
input [0:0] I_wr_halt;
input [0:0] I_rd_halt;
input I_vin0_clk;
input I_vin0_vs_n;
input I_vin0_de;
input [15:0] I_vin0_data;
input I_vout0_clk;
input I_vout0_vs_n;
input I_vout0_de;
input cmd_ready;
input wr_data_rdy;
input rd_data_valid;
input rd_data_end;
input [127:0] rd_data;
input init_calib_complete;
output O_vout0_den;
output [15:0] O_vout0_data;
output O_vout0fifo_empty;
output [2:0] cmd;
output cmd_en;
output [5:0] app_burst_number;
output [27:0] addr;
output wr_data_en;
output wr_data_end;
output [127:0] wr_data;
output [15:0] wr_data_mask;
wire GND;
wire I_dma_clk;
wire I_dma_clk_c;
wire [0:0] I_rd_halt;
wire [0:0] I_rd_halt_c;
wire I_rst_n;
wire I_rst_n_c;
wire I_vin0_clk;
wire I_vin0_clk_c;
wire [15:0] I_vin0_data;
wire [15:0] I_vin0_data_c;
wire I_vin0_de;
wire I_vin0_de_c;
wire I_vin0_vs_n;
wire I_vin0_vs_n_c;
wire I_vout0_clk;
wire I_vout0_clk_c;
wire I_vout0_de;
wire I_vout0_de_c;
wire I_vout0_vs_n;
wire I_vout0_vs_n_c;
wire [0:0] I_wr_halt;
wire [0:0] I_wr_halt_c;
wire [15:0] O_vout0_data;
wire [15:0] O_vout0_data_c;
wire O_vout0_den;
wire O_vout0_den_c;
wire O_vout0fifo_empty;
wire O_vout0fifo_empty_c;
wire VCC;
wire [27:0] addr;
wire [2:0] addr_0;
wire [27:3] addr_c;
wire [5:0] app_burst_number;
wire [5:0] app_burst_number_0;
wire [2:0] cmd;
wire [2:1] cmd_0;
wire [0:0] cmd_c;
wire cmd_en;
wire cmd_en_c;
wire cmd_ready;
wire cmd_ready_c;
wire init_calib_complete;
wire init_calib_complete_c;
wire [127:0] rd_data;
wire [127:0] rd_data_c;
wire rd_data_end;
wire rd_data_valid;
wire rd_data_valid_c;
wire [127:0] wr_data;
wire [127:0] wr_data_c;
wire wr_data_en;
wire wr_data_en_c;
wire wr_data_end;
wire wr_data_end_c;
wire [15:0] wr_data_mask;
wire [15:0] wr_data_mask_0;
wire wr_data_rdy;
wire wr_data_rdy_c;
wire [27:3] \vfb_wrapper_inst/dma0_wr_addr ;
wire [127:0] \vfb_wrapper_inst/dma0_wr_data ;
wire [27:3] \vfb_wrapper_inst/dma0_rd_addr ;
wire [127:0] \vfb_wrapper_inst/dma0_rd_data ;
wire [2:0] \vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt ;
wire [5:0] \vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt ;
wire \vfb_wrapper_inst/dma0_wr_req ;
wire \vfb_wrapper_inst/dma0_wr_end ;
wire \vfb_wrapper_inst/dma0_wr_grant ;
wire \vfb_wrapper_inst/dma0_wr_data_en ;
wire \vfb_wrapper_inst/dma0_rd_req ;
wire \vfb_wrapper_inst/dma0_rd_end ;
wire \vfb_wrapper_inst/dma0_rd_grant ;
wire \vfb_wrapper_inst/dma0_rd_data_valid ;
wire \vfb_wrapper_inst/dma0_wr_grant_i ;
wire \vfb_wrapper_inst/I_rst_n_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.dma_rd_end_o_fast ;
wire [24:23] \vfb_wrapper_inst/u0_dma_frame_buffer/dma_wr_base ;
wire [24:23] \vfb_wrapper_inst/u0_dma_frame_buffer/dma_rd_base ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt ;
wire [9:9] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_i ;
wire [6:6] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count ;
wire [27:3] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO ;
wire [9:9] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_qxu ;
wire [5:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO ;
wire [6:6] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_qxu ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s ;
wire [6:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s ;
wire [15:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data ;
wire [5:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry ;
wire [6:6] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s_0_COUT ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry ;
wire [9:9] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s_0_COUT ;
wire [31:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto9 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_85_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_51_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lt9 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto5_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_23_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_24_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_3_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_4_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_5_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_6_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_7_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_8_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_9_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_10_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_11_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_12_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_13_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_14_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_15_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_16_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_17_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_18_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_19_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_20_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_21_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_22_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_25_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_26_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_s_27_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_de_32b ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_we_32b ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_rising ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_rst ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_26 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_s_27_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_25 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_24 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_23 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_22 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_21 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_20 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_19 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_18 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_17 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_16 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_15 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_14 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_13 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_12 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_11 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_10 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_9 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_432 ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt ;
wire [15:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b ;
wire [31:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 ;
wire [1:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_16b ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_we_32b_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_empty ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_full ;
wire [31:5] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO ;
wire [6:6] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_i ;
wire [6:6] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z ;
wire [5:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num ;
wire [5:2] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 ;
wire [7:7] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next ;
wire [9:9] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr ;
wire [11:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.gry2bin_0.un51_gry2bin_13_0 ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_0 ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_1 ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_0 ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_1 ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0 ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1 ;
wire [1:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r ;
wire [1:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w ;
wire [8:8] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr ;
wire [7:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z ;
wire [4:4] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z ;
wire [9:9] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z ;
wire [4:4] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z ;
wire [5:5] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin ;
wire [11:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/un1_rbin_num_next_cZ[0] ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Empty_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_0_i_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_1_i_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_7_i_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_0_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_1_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.un1_WrEn ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_2_lofx ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1_0_RNO_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4_0_RNO_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_s_9_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_s_11_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_10 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_9 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_s_9_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_s_9_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Emptyz ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Fullz ;
wire [6:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt ;
wire [15:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt ;
wire [9:7] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_wr_count ;
wire [27:3] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 ;
wire [5:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO ;
wire [6:6] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_qxu ;
wire [14:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO ;
wire [15:15] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_qxu ;
wire [6:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s ;
wire [15:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s ;
wire [14:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry ;
wire [15:15] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s_0_COUT ;
wire [5:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry ;
wire [6:6] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s_0_COUT ;
wire [31:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_fifo_wr_count_2_i_0_a5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_163_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_259_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_80 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_18_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_158_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_79 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_20_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_27_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_23_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_24_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_4_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_5_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_6_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_7_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_8_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_9_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_10_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_11_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_12_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_13_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_14_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_15_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_16_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_17_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_18_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_19_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_20_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_21_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_22_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_25_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_26_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_s_27_0_SUM ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_rising ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_rst ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_26 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_s_27_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_25 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_24 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_23 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_22 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_21 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_20 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_19 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_18 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_17 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_16 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_15 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_14 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_13 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_12 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_11 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_10 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_9 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ;
wire [0:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt ;
wire [31:16] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b ;
wire [15:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 ;
wire [0:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_32b_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_d0 ;
wire [6:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_wr_count_Z ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/Full ;
wire [6:6] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr ;
wire [0:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 ;
wire [7:7] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un107_gry2bin_27 ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 ;
wire [9:7] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext ;
wire [9:9] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr ;
wire [11:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z ;
wire [35:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO ;
wire [35:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO ;
wire [35:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO ;
wire [35:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO ;
wire [10:2] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 ;
wire [10:2] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly ;
wire [11:2] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext ;
wire [1:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un137_gry2bin_0_a2_0 ;
wire [1:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast ;
wire [1:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r ;
wire [1:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w ;
wire [5:5] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr ;
wire [5:5] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z ;
wire [8:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z ;
wire [9:9] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin ;
wire [8:1] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z ;
wire [8:8] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr ;
wire [7:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z ;
wire [5:5] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr ;
wire [9:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_406 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_438 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_437 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_469 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_407 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_439 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_436 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_468 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_408 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_440 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_435 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_467 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_409 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_441 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_434 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_466 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_410 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_442 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_433 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_465 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_411 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_443 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_432 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_464 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_412 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_444 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_431 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_463 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_413 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_445 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_430 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_462 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_414 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_446 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_429 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_461 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_415 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_447 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_428 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_460 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_416 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_448 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_427 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_459 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_417 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_449 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_426 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_458 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_418 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_450 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_425 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_457 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_419 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_451 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_424 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_456 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_420 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_452 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_423 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_455 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_421 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_453 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_422 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_454 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_0_i_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_1_i_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_0_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_1_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.un1_WrEn ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata14 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8_0_RNO ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_s_9_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_s_9_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_s_9_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_s_11_0_COUT ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_10 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_9 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_8 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_7 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_6 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_5 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_4 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Fullz ;
wire [1:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr ;
wire [1:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr ;
wire [0:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_ns ;
wire [0:0] \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_ns ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_35_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_46_i ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_falling_r ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_0_sqmuxa ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_falling_r ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_0_sqmuxa ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync3 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync2 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync0 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync1 ;
wire \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync0 ;
wire [1:0] \vfb_wrapper_inst/u_dma_bus_arbiter/current_state ;
wire [1:0] \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_167 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_0_3 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_4 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_74 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_a2_0 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_1 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_a5_0 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i_fast ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i_fast ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_0 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_1 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_0 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_1 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/g0_1 ;
wire \vfb_wrapper_inst/u_dma_bus_arbiter/g0_2 ;
VCC VCC_cZ (
  .V(VCC)
);
GND GND_cZ (
  .G(GND)
);
GSR GSR_INST (
	.GSRI(VCC)
);
IBUF I_rst_n_ibuf (
	.I(I_rst_n),
	.O(I_rst_n_c)
);
IBUF I_dma_clk_ibuf (
	.I(I_dma_clk),
	.O(I_dma_clk_c)
);
IBUF \I_wr_halt_ibuf[0]  (
	.I(I_wr_halt[0]),
	.O(I_wr_halt_c[0])
);
IBUF \I_rd_halt_ibuf[0]  (
	.I(I_rd_halt[0]),
	.O(I_rd_halt_c[0])
);
IBUF I_vin0_clk_ibuf (
	.I(I_vin0_clk),
	.O(I_vin0_clk_c)
);
IBUF I_vin0_vs_n_ibuf (
	.I(I_vin0_vs_n),
	.O(I_vin0_vs_n_c)
);
IBUF I_vin0_de_ibuf (
	.I(I_vin0_de),
	.O(I_vin0_de_c)
);
IBUF \I_vin0_data_ibuf[0]  (
	.I(I_vin0_data[0]),
	.O(I_vin0_data_c[0])
);
IBUF \I_vin0_data_ibuf[1]  (
	.I(I_vin0_data[1]),
	.O(I_vin0_data_c[1])
);
IBUF \I_vin0_data_ibuf[2]  (
	.I(I_vin0_data[2]),
	.O(I_vin0_data_c[2])
);
IBUF \I_vin0_data_ibuf[3]  (
	.I(I_vin0_data[3]),
	.O(I_vin0_data_c[3])
);
IBUF \I_vin0_data_ibuf[4]  (
	.I(I_vin0_data[4]),
	.O(I_vin0_data_c[4])
);
IBUF \I_vin0_data_ibuf[5]  (
	.I(I_vin0_data[5]),
	.O(I_vin0_data_c[5])
);
IBUF \I_vin0_data_ibuf[6]  (
	.I(I_vin0_data[6]),
	.O(I_vin0_data_c[6])
);
IBUF \I_vin0_data_ibuf[7]  (
	.I(I_vin0_data[7]),
	.O(I_vin0_data_c[7])
);
IBUF \I_vin0_data_ibuf[8]  (
	.I(I_vin0_data[8]),
	.O(I_vin0_data_c[8])
);
IBUF \I_vin0_data_ibuf[9]  (
	.I(I_vin0_data[9]),
	.O(I_vin0_data_c[9])
);
IBUF \I_vin0_data_ibuf[10]  (
	.I(I_vin0_data[10]),
	.O(I_vin0_data_c[10])
);
IBUF \I_vin0_data_ibuf[11]  (
	.I(I_vin0_data[11]),
	.O(I_vin0_data_c[11])
);
IBUF \I_vin0_data_ibuf[12]  (
	.I(I_vin0_data[12]),
	.O(I_vin0_data_c[12])
);
IBUF \I_vin0_data_ibuf[13]  (
	.I(I_vin0_data[13]),
	.O(I_vin0_data_c[13])
);
IBUF \I_vin0_data_ibuf[14]  (
	.I(I_vin0_data[14]),
	.O(I_vin0_data_c[14])
);
IBUF \I_vin0_data_ibuf[15]  (
	.I(I_vin0_data[15]),
	.O(I_vin0_data_c[15])
);
IBUF I_vout0_clk_ibuf (
	.I(I_vout0_clk),
	.O(I_vout0_clk_c)
);
IBUF I_vout0_vs_n_ibuf (
	.I(I_vout0_vs_n),
	.O(I_vout0_vs_n_c)
);
IBUF I_vout0_de_ibuf (
	.I(I_vout0_de),
	.O(I_vout0_de_c)
);
IBUF cmd_ready_ibuf (
	.I(cmd_ready),
	.O(cmd_ready_c)
);
IBUF wr_data_rdy_ibuf (
	.I(wr_data_rdy),
	.O(wr_data_rdy_c)
);
IBUF rd_data_valid_ibuf (
	.I(rd_data_valid),
	.O(rd_data_valid_c)
);
IBUF \rd_data_ibuf[0]  (
	.I(rd_data[0]),
	.O(rd_data_c[0])
);
IBUF \rd_data_ibuf[1]  (
	.I(rd_data[1]),
	.O(rd_data_c[1])
);
IBUF \rd_data_ibuf[2]  (
	.I(rd_data[2]),
	.O(rd_data_c[2])
);
IBUF \rd_data_ibuf[3]  (
	.I(rd_data[3]),
	.O(rd_data_c[3])
);
IBUF \rd_data_ibuf[4]  (
	.I(rd_data[4]),
	.O(rd_data_c[4])
);
IBUF \rd_data_ibuf[5]  (
	.I(rd_data[5]),
	.O(rd_data_c[5])
);
IBUF \rd_data_ibuf[6]  (
	.I(rd_data[6]),
	.O(rd_data_c[6])
);
IBUF \rd_data_ibuf[7]  (
	.I(rd_data[7]),
	.O(rd_data_c[7])
);
IBUF \rd_data_ibuf[8]  (
	.I(rd_data[8]),
	.O(rd_data_c[8])
);
IBUF \rd_data_ibuf[9]  (
	.I(rd_data[9]),
	.O(rd_data_c[9])
);
IBUF \rd_data_ibuf[10]  (
	.I(rd_data[10]),
	.O(rd_data_c[10])
);
IBUF \rd_data_ibuf[11]  (
	.I(rd_data[11]),
	.O(rd_data_c[11])
);
IBUF \rd_data_ibuf[12]  (
	.I(rd_data[12]),
	.O(rd_data_c[12])
);
IBUF \rd_data_ibuf[13]  (
	.I(rd_data[13]),
	.O(rd_data_c[13])
);
IBUF \rd_data_ibuf[14]  (
	.I(rd_data[14]),
	.O(rd_data_c[14])
);
IBUF \rd_data_ibuf[15]  (
	.I(rd_data[15]),
	.O(rd_data_c[15])
);
IBUF \rd_data_ibuf[16]  (
	.I(rd_data[16]),
	.O(rd_data_c[16])
);
IBUF \rd_data_ibuf[17]  (
	.I(rd_data[17]),
	.O(rd_data_c[17])
);
IBUF \rd_data_ibuf[18]  (
	.I(rd_data[18]),
	.O(rd_data_c[18])
);
IBUF \rd_data_ibuf[19]  (
	.I(rd_data[19]),
	.O(rd_data_c[19])
);
IBUF \rd_data_ibuf[20]  (
	.I(rd_data[20]),
	.O(rd_data_c[20])
);
IBUF \rd_data_ibuf[21]  (
	.I(rd_data[21]),
	.O(rd_data_c[21])
);
IBUF \rd_data_ibuf[22]  (
	.I(rd_data[22]),
	.O(rd_data_c[22])
);
IBUF \rd_data_ibuf[23]  (
	.I(rd_data[23]),
	.O(rd_data_c[23])
);
IBUF \rd_data_ibuf[24]  (
	.I(rd_data[24]),
	.O(rd_data_c[24])
);
IBUF \rd_data_ibuf[25]  (
	.I(rd_data[25]),
	.O(rd_data_c[25])
);
IBUF \rd_data_ibuf[26]  (
	.I(rd_data[26]),
	.O(rd_data_c[26])
);
IBUF \rd_data_ibuf[27]  (
	.I(rd_data[27]),
	.O(rd_data_c[27])
);
IBUF \rd_data_ibuf[28]  (
	.I(rd_data[28]),
	.O(rd_data_c[28])
);
IBUF \rd_data_ibuf[29]  (
	.I(rd_data[29]),
	.O(rd_data_c[29])
);
IBUF \rd_data_ibuf[30]  (
	.I(rd_data[30]),
	.O(rd_data_c[30])
);
IBUF \rd_data_ibuf[31]  (
	.I(rd_data[31]),
	.O(rd_data_c[31])
);
IBUF \rd_data_ibuf[32]  (
	.I(rd_data[32]),
	.O(rd_data_c[32])
);
IBUF \rd_data_ibuf[33]  (
	.I(rd_data[33]),
	.O(rd_data_c[33])
);
IBUF \rd_data_ibuf[34]  (
	.I(rd_data[34]),
	.O(rd_data_c[34])
);
IBUF \rd_data_ibuf[35]  (
	.I(rd_data[35]),
	.O(rd_data_c[35])
);
IBUF \rd_data_ibuf[36]  (
	.I(rd_data[36]),
	.O(rd_data_c[36])
);
IBUF \rd_data_ibuf[37]  (
	.I(rd_data[37]),
	.O(rd_data_c[37])
);
IBUF \rd_data_ibuf[38]  (
	.I(rd_data[38]),
	.O(rd_data_c[38])
);
IBUF \rd_data_ibuf[39]  (
	.I(rd_data[39]),
	.O(rd_data_c[39])
);
IBUF \rd_data_ibuf[40]  (
	.I(rd_data[40]),
	.O(rd_data_c[40])
);
IBUF \rd_data_ibuf[41]  (
	.I(rd_data[41]),
	.O(rd_data_c[41])
);
IBUF \rd_data_ibuf[42]  (
	.I(rd_data[42]),
	.O(rd_data_c[42])
);
IBUF \rd_data_ibuf[43]  (
	.I(rd_data[43]),
	.O(rd_data_c[43])
);
IBUF \rd_data_ibuf[44]  (
	.I(rd_data[44]),
	.O(rd_data_c[44])
);
IBUF \rd_data_ibuf[45]  (
	.I(rd_data[45]),
	.O(rd_data_c[45])
);
IBUF \rd_data_ibuf[46]  (
	.I(rd_data[46]),
	.O(rd_data_c[46])
);
IBUF \rd_data_ibuf[47]  (
	.I(rd_data[47]),
	.O(rd_data_c[47])
);
IBUF \rd_data_ibuf[48]  (
	.I(rd_data[48]),
	.O(rd_data_c[48])
);
IBUF \rd_data_ibuf[49]  (
	.I(rd_data[49]),
	.O(rd_data_c[49])
);
IBUF \rd_data_ibuf[50]  (
	.I(rd_data[50]),
	.O(rd_data_c[50])
);
IBUF \rd_data_ibuf[51]  (
	.I(rd_data[51]),
	.O(rd_data_c[51])
);
IBUF \rd_data_ibuf[52]  (
	.I(rd_data[52]),
	.O(rd_data_c[52])
);
IBUF \rd_data_ibuf[53]  (
	.I(rd_data[53]),
	.O(rd_data_c[53])
);
IBUF \rd_data_ibuf[54]  (
	.I(rd_data[54]),
	.O(rd_data_c[54])
);
IBUF \rd_data_ibuf[55]  (
	.I(rd_data[55]),
	.O(rd_data_c[55])
);
IBUF \rd_data_ibuf[56]  (
	.I(rd_data[56]),
	.O(rd_data_c[56])
);
IBUF \rd_data_ibuf[57]  (
	.I(rd_data[57]),
	.O(rd_data_c[57])
);
IBUF \rd_data_ibuf[58]  (
	.I(rd_data[58]),
	.O(rd_data_c[58])
);
IBUF \rd_data_ibuf[59]  (
	.I(rd_data[59]),
	.O(rd_data_c[59])
);
IBUF \rd_data_ibuf[60]  (
	.I(rd_data[60]),
	.O(rd_data_c[60])
);
IBUF \rd_data_ibuf[61]  (
	.I(rd_data[61]),
	.O(rd_data_c[61])
);
IBUF \rd_data_ibuf[62]  (
	.I(rd_data[62]),
	.O(rd_data_c[62])
);
IBUF \rd_data_ibuf[63]  (
	.I(rd_data[63]),
	.O(rd_data_c[63])
);
IBUF \rd_data_ibuf[64]  (
	.I(rd_data[64]),
	.O(rd_data_c[64])
);
IBUF \rd_data_ibuf[65]  (
	.I(rd_data[65]),
	.O(rd_data_c[65])
);
IBUF \rd_data_ibuf[66]  (
	.I(rd_data[66]),
	.O(rd_data_c[66])
);
IBUF \rd_data_ibuf[67]  (
	.I(rd_data[67]),
	.O(rd_data_c[67])
);
IBUF \rd_data_ibuf[68]  (
	.I(rd_data[68]),
	.O(rd_data_c[68])
);
IBUF \rd_data_ibuf[69]  (
	.I(rd_data[69]),
	.O(rd_data_c[69])
);
IBUF \rd_data_ibuf[70]  (
	.I(rd_data[70]),
	.O(rd_data_c[70])
);
IBUF \rd_data_ibuf[71]  (
	.I(rd_data[71]),
	.O(rd_data_c[71])
);
IBUF \rd_data_ibuf[72]  (
	.I(rd_data[72]),
	.O(rd_data_c[72])
);
IBUF \rd_data_ibuf[73]  (
	.I(rd_data[73]),
	.O(rd_data_c[73])
);
IBUF \rd_data_ibuf[74]  (
	.I(rd_data[74]),
	.O(rd_data_c[74])
);
IBUF \rd_data_ibuf[75]  (
	.I(rd_data[75]),
	.O(rd_data_c[75])
);
IBUF \rd_data_ibuf[76]  (
	.I(rd_data[76]),
	.O(rd_data_c[76])
);
IBUF \rd_data_ibuf[77]  (
	.I(rd_data[77]),
	.O(rd_data_c[77])
);
IBUF \rd_data_ibuf[78]  (
	.I(rd_data[78]),
	.O(rd_data_c[78])
);
IBUF \rd_data_ibuf[79]  (
	.I(rd_data[79]),
	.O(rd_data_c[79])
);
IBUF \rd_data_ibuf[80]  (
	.I(rd_data[80]),
	.O(rd_data_c[80])
);
IBUF \rd_data_ibuf[81]  (
	.I(rd_data[81]),
	.O(rd_data_c[81])
);
IBUF \rd_data_ibuf[82]  (
	.I(rd_data[82]),
	.O(rd_data_c[82])
);
IBUF \rd_data_ibuf[83]  (
	.I(rd_data[83]),
	.O(rd_data_c[83])
);
IBUF \rd_data_ibuf[84]  (
	.I(rd_data[84]),
	.O(rd_data_c[84])
);
IBUF \rd_data_ibuf[85]  (
	.I(rd_data[85]),
	.O(rd_data_c[85])
);
IBUF \rd_data_ibuf[86]  (
	.I(rd_data[86]),
	.O(rd_data_c[86])
);
IBUF \rd_data_ibuf[87]  (
	.I(rd_data[87]),
	.O(rd_data_c[87])
);
IBUF \rd_data_ibuf[88]  (
	.I(rd_data[88]),
	.O(rd_data_c[88])
);
IBUF \rd_data_ibuf[89]  (
	.I(rd_data[89]),
	.O(rd_data_c[89])
);
IBUF \rd_data_ibuf[90]  (
	.I(rd_data[90]),
	.O(rd_data_c[90])
);
IBUF \rd_data_ibuf[91]  (
	.I(rd_data[91]),
	.O(rd_data_c[91])
);
IBUF \rd_data_ibuf[92]  (
	.I(rd_data[92]),
	.O(rd_data_c[92])
);
IBUF \rd_data_ibuf[93]  (
	.I(rd_data[93]),
	.O(rd_data_c[93])
);
IBUF \rd_data_ibuf[94]  (
	.I(rd_data[94]),
	.O(rd_data_c[94])
);
IBUF \rd_data_ibuf[95]  (
	.I(rd_data[95]),
	.O(rd_data_c[95])
);
IBUF \rd_data_ibuf[96]  (
	.I(rd_data[96]),
	.O(rd_data_c[96])
);
IBUF \rd_data_ibuf[97]  (
	.I(rd_data[97]),
	.O(rd_data_c[97])
);
IBUF \rd_data_ibuf[98]  (
	.I(rd_data[98]),
	.O(rd_data_c[98])
);
IBUF \rd_data_ibuf[99]  (
	.I(rd_data[99]),
	.O(rd_data_c[99])
);
IBUF \rd_data_ibuf[100]  (
	.I(rd_data[100]),
	.O(rd_data_c[100])
);
IBUF \rd_data_ibuf[101]  (
	.I(rd_data[101]),
	.O(rd_data_c[101])
);
IBUF \rd_data_ibuf[102]  (
	.I(rd_data[102]),
	.O(rd_data_c[102])
);
IBUF \rd_data_ibuf[103]  (
	.I(rd_data[103]),
	.O(rd_data_c[103])
);
IBUF \rd_data_ibuf[104]  (
	.I(rd_data[104]),
	.O(rd_data_c[104])
);
IBUF \rd_data_ibuf[105]  (
	.I(rd_data[105]),
	.O(rd_data_c[105])
);
IBUF \rd_data_ibuf[106]  (
	.I(rd_data[106]),
	.O(rd_data_c[106])
);
IBUF \rd_data_ibuf[107]  (
	.I(rd_data[107]),
	.O(rd_data_c[107])
);
IBUF \rd_data_ibuf[108]  (
	.I(rd_data[108]),
	.O(rd_data_c[108])
);
IBUF \rd_data_ibuf[109]  (
	.I(rd_data[109]),
	.O(rd_data_c[109])
);
IBUF \rd_data_ibuf[110]  (
	.I(rd_data[110]),
	.O(rd_data_c[110])
);
IBUF \rd_data_ibuf[111]  (
	.I(rd_data[111]),
	.O(rd_data_c[111])
);
IBUF \rd_data_ibuf[112]  (
	.I(rd_data[112]),
	.O(rd_data_c[112])
);
IBUF \rd_data_ibuf[113]  (
	.I(rd_data[113]),
	.O(rd_data_c[113])
);
IBUF \rd_data_ibuf[114]  (
	.I(rd_data[114]),
	.O(rd_data_c[114])
);
IBUF \rd_data_ibuf[115]  (
	.I(rd_data[115]),
	.O(rd_data_c[115])
);
IBUF \rd_data_ibuf[116]  (
	.I(rd_data[116]),
	.O(rd_data_c[116])
);
IBUF \rd_data_ibuf[117]  (
	.I(rd_data[117]),
	.O(rd_data_c[117])
);
IBUF \rd_data_ibuf[118]  (
	.I(rd_data[118]),
	.O(rd_data_c[118])
);
IBUF \rd_data_ibuf[119]  (
	.I(rd_data[119]),
	.O(rd_data_c[119])
);
IBUF \rd_data_ibuf[120]  (
	.I(rd_data[120]),
	.O(rd_data_c[120])
);
IBUF \rd_data_ibuf[121]  (
	.I(rd_data[121]),
	.O(rd_data_c[121])
);
IBUF \rd_data_ibuf[122]  (
	.I(rd_data[122]),
	.O(rd_data_c[122])
);
IBUF \rd_data_ibuf[123]  (
	.I(rd_data[123]),
	.O(rd_data_c[123])
);
IBUF \rd_data_ibuf[124]  (
	.I(rd_data[124]),
	.O(rd_data_c[124])
);
IBUF \rd_data_ibuf[125]  (
	.I(rd_data[125]),
	.O(rd_data_c[125])
);
IBUF \rd_data_ibuf[126]  (
	.I(rd_data[126]),
	.O(rd_data_c[126])
);
IBUF \rd_data_ibuf[127]  (
	.I(rd_data[127]),
	.O(rd_data_c[127])
);
IBUF init_calib_complete_ibuf (
	.I(init_calib_complete),
	.O(init_calib_complete_c)
);
OBUF O_vout0_den_obuf (
	.I(O_vout0_den_c),
	.O(O_vout0_den)
);
OBUF \O_vout0_data_obuf[0]  (
	.I(O_vout0_data_c[0]),
	.O(O_vout0_data[0])
);
OBUF \O_vout0_data_obuf[1]  (
	.I(O_vout0_data_c[1]),
	.O(O_vout0_data[1])
);
OBUF \O_vout0_data_obuf[2]  (
	.I(O_vout0_data_c[2]),
	.O(O_vout0_data[2])
);
OBUF \O_vout0_data_obuf[3]  (
	.I(O_vout0_data_c[3]),
	.O(O_vout0_data[3])
);
OBUF \O_vout0_data_obuf[4]  (
	.I(O_vout0_data_c[4]),
	.O(O_vout0_data[4])
);
OBUF \O_vout0_data_obuf[5]  (
	.I(O_vout0_data_c[5]),
	.O(O_vout0_data[5])
);
OBUF \O_vout0_data_obuf[6]  (
	.I(O_vout0_data_c[6]),
	.O(O_vout0_data[6])
);
OBUF \O_vout0_data_obuf[7]  (
	.I(O_vout0_data_c[7]),
	.O(O_vout0_data[7])
);
OBUF \O_vout0_data_obuf[8]  (
	.I(O_vout0_data_c[8]),
	.O(O_vout0_data[8])
);
OBUF \O_vout0_data_obuf[9]  (
	.I(O_vout0_data_c[9]),
	.O(O_vout0_data[9])
);
OBUF \O_vout0_data_obuf[10]  (
	.I(O_vout0_data_c[10]),
	.O(O_vout0_data[10])
);
OBUF \O_vout0_data_obuf[11]  (
	.I(O_vout0_data_c[11]),
	.O(O_vout0_data[11])
);
OBUF \O_vout0_data_obuf[12]  (
	.I(O_vout0_data_c[12]),
	.O(O_vout0_data[12])
);
OBUF \O_vout0_data_obuf[13]  (
	.I(O_vout0_data_c[13]),
	.O(O_vout0_data[13])
);
OBUF \O_vout0_data_obuf[14]  (
	.I(O_vout0_data_c[14]),
	.O(O_vout0_data[14])
);
OBUF \O_vout0_data_obuf[15]  (
	.I(O_vout0_data_c[15]),
	.O(O_vout0_data[15])
);
OBUF O_vout0fifo_empty_obuf (
	.I(O_vout0fifo_empty_c),
	.O(O_vout0fifo_empty)
);
OBUF \cmd_obuf[0]  (
	.I(cmd_c[0]),
	.O(cmd[0])
);
OBUF \cmd_obuf[1]  (
	.I(GND),
	.O(cmd[1])
);
OBUF \cmd_obuf[2]  (
	.I(GND),
	.O(cmd[2])
);
OBUF cmd_en_obuf (
	.I(cmd_en_c),
	.O(cmd_en)
);
OBUF \app_burst_number_obuf[0]  (
	.I(VCC),
	.O(app_burst_number[0])
);
OBUF \app_burst_number_obuf[1]  (
	.I(VCC),
	.O(app_burst_number[1])
);
OBUF \app_burst_number_obuf[2]  (
	.I(VCC),
	.O(app_burst_number[2])
);
OBUF \app_burst_number_obuf[3]  (
	.I(VCC),
	.O(app_burst_number[3])
);
OBUF \app_burst_number_obuf[4]  (
	.I(VCC),
	.O(app_burst_number[4])
);
OBUF \app_burst_number_obuf[5]  (
	.I(VCC),
	.O(app_burst_number[5])
);
OBUF \addr_obuf[0]  (
	.I(GND),
	.O(addr[0])
);
OBUF \addr_obuf[1]  (
	.I(GND),
	.O(addr[1])
);
OBUF \addr_obuf[2]  (
	.I(GND),
	.O(addr[2])
);
OBUF \addr_obuf[3]  (
	.I(addr_c[3]),
	.O(addr[3])
);
OBUF \addr_obuf[4]  (
	.I(addr_c[4]),
	.O(addr[4])
);
OBUF \addr_obuf[5]  (
	.I(addr_c[5]),
	.O(addr[5])
);
OBUF \addr_obuf[6]  (
	.I(addr_c[6]),
	.O(addr[6])
);
OBUF \addr_obuf[7]  (
	.I(addr_c[7]),
	.O(addr[7])
);
OBUF \addr_obuf[8]  (
	.I(addr_c[8]),
	.O(addr[8])
);
OBUF \addr_obuf[9]  (
	.I(addr_c[9]),
	.O(addr[9])
);
OBUF \addr_obuf[10]  (
	.I(addr_c[10]),
	.O(addr[10])
);
OBUF \addr_obuf[11]  (
	.I(addr_c[11]),
	.O(addr[11])
);
OBUF \addr_obuf[12]  (
	.I(addr_c[12]),
	.O(addr[12])
);
OBUF \addr_obuf[13]  (
	.I(addr_c[13]),
	.O(addr[13])
);
OBUF \addr_obuf[14]  (
	.I(addr_c[14]),
	.O(addr[14])
);
OBUF \addr_obuf[15]  (
	.I(addr_c[15]),
	.O(addr[15])
);
OBUF \addr_obuf[16]  (
	.I(addr_c[16]),
	.O(addr[16])
);
OBUF \addr_obuf[17]  (
	.I(addr_c[17]),
	.O(addr[17])
);
OBUF \addr_obuf[18]  (
	.I(addr_c[18]),
	.O(addr[18])
);
OBUF \addr_obuf[19]  (
	.I(addr_c[19]),
	.O(addr[19])
);
OBUF \addr_obuf[20]  (
	.I(addr_c[20]),
	.O(addr[20])
);
OBUF \addr_obuf[21]  (
	.I(addr_c[21]),
	.O(addr[21])
);
OBUF \addr_obuf[22]  (
	.I(addr_c[22]),
	.O(addr[22])
);
OBUF \addr_obuf[23]  (
	.I(addr_c[23]),
	.O(addr[23])
);
OBUF \addr_obuf[24]  (
	.I(addr_c[24]),
	.O(addr[24])
);
OBUF \addr_obuf[25]  (
	.I(addr_c[25]),
	.O(addr[25])
);
OBUF \addr_obuf[26]  (
	.I(addr_c[26]),
	.O(addr[26])
);
OBUF \addr_obuf[27]  (
	.I(addr_c[27]),
	.O(addr[27])
);
OBUF wr_data_en_obuf (
	.I(wr_data_end_c),
	.O(wr_data_en)
);
OBUF wr_data_end_obuf (
	.I(wr_data_end_c),
	.O(wr_data_end)
);
OBUF \wr_data_obuf[0]  (
	.I(wr_data_c[0]),
	.O(wr_data[0])
);
OBUF \wr_data_obuf[1]  (
	.I(wr_data_c[1]),
	.O(wr_data[1])
);
OBUF \wr_data_obuf[2]  (
	.I(wr_data_c[2]),
	.O(wr_data[2])
);
OBUF \wr_data_obuf[3]  (
	.I(wr_data_c[3]),
	.O(wr_data[3])
);
OBUF \wr_data_obuf[4]  (
	.I(wr_data_c[4]),
	.O(wr_data[4])
);
OBUF \wr_data_obuf[5]  (
	.I(wr_data_c[5]),
	.O(wr_data[5])
);
OBUF \wr_data_obuf[6]  (
	.I(wr_data_c[6]),
	.O(wr_data[6])
);
OBUF \wr_data_obuf[7]  (
	.I(wr_data_c[7]),
	.O(wr_data[7])
);
OBUF \wr_data_obuf[8]  (
	.I(wr_data_c[8]),
	.O(wr_data[8])
);
OBUF \wr_data_obuf[9]  (
	.I(wr_data_c[9]),
	.O(wr_data[9])
);
OBUF \wr_data_obuf[10]  (
	.I(wr_data_c[10]),
	.O(wr_data[10])
);
OBUF \wr_data_obuf[11]  (
	.I(wr_data_c[11]),
	.O(wr_data[11])
);
OBUF \wr_data_obuf[12]  (
	.I(wr_data_c[12]),
	.O(wr_data[12])
);
OBUF \wr_data_obuf[13]  (
	.I(wr_data_c[13]),
	.O(wr_data[13])
);
OBUF \wr_data_obuf[14]  (
	.I(wr_data_c[14]),
	.O(wr_data[14])
);
OBUF \wr_data_obuf[15]  (
	.I(wr_data_c[15]),
	.O(wr_data[15])
);
OBUF \wr_data_obuf[16]  (
	.I(wr_data_c[16]),
	.O(wr_data[16])
);
OBUF \wr_data_obuf[17]  (
	.I(wr_data_c[17]),
	.O(wr_data[17])
);
OBUF \wr_data_obuf[18]  (
	.I(wr_data_c[18]),
	.O(wr_data[18])
);
OBUF \wr_data_obuf[19]  (
	.I(wr_data_c[19]),
	.O(wr_data[19])
);
OBUF \wr_data_obuf[20]  (
	.I(wr_data_c[20]),
	.O(wr_data[20])
);
OBUF \wr_data_obuf[21]  (
	.I(wr_data_c[21]),
	.O(wr_data[21])
);
OBUF \wr_data_obuf[22]  (
	.I(wr_data_c[22]),
	.O(wr_data[22])
);
OBUF \wr_data_obuf[23]  (
	.I(wr_data_c[23]),
	.O(wr_data[23])
);
OBUF \wr_data_obuf[24]  (
	.I(wr_data_c[24]),
	.O(wr_data[24])
);
OBUF \wr_data_obuf[25]  (
	.I(wr_data_c[25]),
	.O(wr_data[25])
);
OBUF \wr_data_obuf[26]  (
	.I(wr_data_c[26]),
	.O(wr_data[26])
);
OBUF \wr_data_obuf[27]  (
	.I(wr_data_c[27]),
	.O(wr_data[27])
);
OBUF \wr_data_obuf[28]  (
	.I(wr_data_c[28]),
	.O(wr_data[28])
);
OBUF \wr_data_obuf[29]  (
	.I(wr_data_c[29]),
	.O(wr_data[29])
);
OBUF \wr_data_obuf[30]  (
	.I(wr_data_c[30]),
	.O(wr_data[30])
);
OBUF \wr_data_obuf[31]  (
	.I(wr_data_c[31]),
	.O(wr_data[31])
);
OBUF \wr_data_obuf[32]  (
	.I(wr_data_c[32]),
	.O(wr_data[32])
);
OBUF \wr_data_obuf[33]  (
	.I(wr_data_c[33]),
	.O(wr_data[33])
);
OBUF \wr_data_obuf[34]  (
	.I(wr_data_c[34]),
	.O(wr_data[34])
);
OBUF \wr_data_obuf[35]  (
	.I(wr_data_c[35]),
	.O(wr_data[35])
);
OBUF \wr_data_obuf[36]  (
	.I(wr_data_c[36]),
	.O(wr_data[36])
);
OBUF \wr_data_obuf[37]  (
	.I(wr_data_c[37]),
	.O(wr_data[37])
);
OBUF \wr_data_obuf[38]  (
	.I(wr_data_c[38]),
	.O(wr_data[38])
);
OBUF \wr_data_obuf[39]  (
	.I(wr_data_c[39]),
	.O(wr_data[39])
);
OBUF \wr_data_obuf[40]  (
	.I(wr_data_c[40]),
	.O(wr_data[40])
);
OBUF \wr_data_obuf[41]  (
	.I(wr_data_c[41]),
	.O(wr_data[41])
);
OBUF \wr_data_obuf[42]  (
	.I(wr_data_c[42]),
	.O(wr_data[42])
);
OBUF \wr_data_obuf[43]  (
	.I(wr_data_c[43]),
	.O(wr_data[43])
);
OBUF \wr_data_obuf[44]  (
	.I(wr_data_c[44]),
	.O(wr_data[44])
);
OBUF \wr_data_obuf[45]  (
	.I(wr_data_c[45]),
	.O(wr_data[45])
);
OBUF \wr_data_obuf[46]  (
	.I(wr_data_c[46]),
	.O(wr_data[46])
);
OBUF \wr_data_obuf[47]  (
	.I(wr_data_c[47]),
	.O(wr_data[47])
);
OBUF \wr_data_obuf[48]  (
	.I(wr_data_c[48]),
	.O(wr_data[48])
);
OBUF \wr_data_obuf[49]  (
	.I(wr_data_c[49]),
	.O(wr_data[49])
);
OBUF \wr_data_obuf[50]  (
	.I(wr_data_c[50]),
	.O(wr_data[50])
);
OBUF \wr_data_obuf[51]  (
	.I(wr_data_c[51]),
	.O(wr_data[51])
);
OBUF \wr_data_obuf[52]  (
	.I(wr_data_c[52]),
	.O(wr_data[52])
);
OBUF \wr_data_obuf[53]  (
	.I(wr_data_c[53]),
	.O(wr_data[53])
);
OBUF \wr_data_obuf[54]  (
	.I(wr_data_c[54]),
	.O(wr_data[54])
);
OBUF \wr_data_obuf[55]  (
	.I(wr_data_c[55]),
	.O(wr_data[55])
);
OBUF \wr_data_obuf[56]  (
	.I(wr_data_c[56]),
	.O(wr_data[56])
);
OBUF \wr_data_obuf[57]  (
	.I(wr_data_c[57]),
	.O(wr_data[57])
);
OBUF \wr_data_obuf[58]  (
	.I(wr_data_c[58]),
	.O(wr_data[58])
);
OBUF \wr_data_obuf[59]  (
	.I(wr_data_c[59]),
	.O(wr_data[59])
);
OBUF \wr_data_obuf[60]  (
	.I(wr_data_c[60]),
	.O(wr_data[60])
);
OBUF \wr_data_obuf[61]  (
	.I(wr_data_c[61]),
	.O(wr_data[61])
);
OBUF \wr_data_obuf[62]  (
	.I(wr_data_c[62]),
	.O(wr_data[62])
);
OBUF \wr_data_obuf[63]  (
	.I(wr_data_c[63]),
	.O(wr_data[63])
);
OBUF \wr_data_obuf[64]  (
	.I(wr_data_c[64]),
	.O(wr_data[64])
);
OBUF \wr_data_obuf[65]  (
	.I(wr_data_c[65]),
	.O(wr_data[65])
);
OBUF \wr_data_obuf[66]  (
	.I(wr_data_c[66]),
	.O(wr_data[66])
);
OBUF \wr_data_obuf[67]  (
	.I(wr_data_c[67]),
	.O(wr_data[67])
);
OBUF \wr_data_obuf[68]  (
	.I(wr_data_c[68]),
	.O(wr_data[68])
);
OBUF \wr_data_obuf[69]  (
	.I(wr_data_c[69]),
	.O(wr_data[69])
);
OBUF \wr_data_obuf[70]  (
	.I(wr_data_c[70]),
	.O(wr_data[70])
);
OBUF \wr_data_obuf[71]  (
	.I(wr_data_c[71]),
	.O(wr_data[71])
);
OBUF \wr_data_obuf[72]  (
	.I(wr_data_c[72]),
	.O(wr_data[72])
);
OBUF \wr_data_obuf[73]  (
	.I(wr_data_c[73]),
	.O(wr_data[73])
);
OBUF \wr_data_obuf[74]  (
	.I(wr_data_c[74]),
	.O(wr_data[74])
);
OBUF \wr_data_obuf[75]  (
	.I(wr_data_c[75]),
	.O(wr_data[75])
);
OBUF \wr_data_obuf[76]  (
	.I(wr_data_c[76]),
	.O(wr_data[76])
);
OBUF \wr_data_obuf[77]  (
	.I(wr_data_c[77]),
	.O(wr_data[77])
);
OBUF \wr_data_obuf[78]  (
	.I(wr_data_c[78]),
	.O(wr_data[78])
);
OBUF \wr_data_obuf[79]  (
	.I(wr_data_c[79]),
	.O(wr_data[79])
);
OBUF \wr_data_obuf[80]  (
	.I(wr_data_c[80]),
	.O(wr_data[80])
);
OBUF \wr_data_obuf[81]  (
	.I(wr_data_c[81]),
	.O(wr_data[81])
);
OBUF \wr_data_obuf[82]  (
	.I(wr_data_c[82]),
	.O(wr_data[82])
);
OBUF \wr_data_obuf[83]  (
	.I(wr_data_c[83]),
	.O(wr_data[83])
);
OBUF \wr_data_obuf[84]  (
	.I(wr_data_c[84]),
	.O(wr_data[84])
);
OBUF \wr_data_obuf[85]  (
	.I(wr_data_c[85]),
	.O(wr_data[85])
);
OBUF \wr_data_obuf[86]  (
	.I(wr_data_c[86]),
	.O(wr_data[86])
);
OBUF \wr_data_obuf[87]  (
	.I(wr_data_c[87]),
	.O(wr_data[87])
);
OBUF \wr_data_obuf[88]  (
	.I(wr_data_c[88]),
	.O(wr_data[88])
);
OBUF \wr_data_obuf[89]  (
	.I(wr_data_c[89]),
	.O(wr_data[89])
);
OBUF \wr_data_obuf[90]  (
	.I(wr_data_c[90]),
	.O(wr_data[90])
);
OBUF \wr_data_obuf[91]  (
	.I(wr_data_c[91]),
	.O(wr_data[91])
);
OBUF \wr_data_obuf[92]  (
	.I(wr_data_c[92]),
	.O(wr_data[92])
);
OBUF \wr_data_obuf[93]  (
	.I(wr_data_c[93]),
	.O(wr_data[93])
);
OBUF \wr_data_obuf[94]  (
	.I(wr_data_c[94]),
	.O(wr_data[94])
);
OBUF \wr_data_obuf[95]  (
	.I(wr_data_c[95]),
	.O(wr_data[95])
);
OBUF \wr_data_obuf[96]  (
	.I(wr_data_c[96]),
	.O(wr_data[96])
);
OBUF \wr_data_obuf[97]  (
	.I(wr_data_c[97]),
	.O(wr_data[97])
);
OBUF \wr_data_obuf[98]  (
	.I(wr_data_c[98]),
	.O(wr_data[98])
);
OBUF \wr_data_obuf[99]  (
	.I(wr_data_c[99]),
	.O(wr_data[99])
);
OBUF \wr_data_obuf[100]  (
	.I(wr_data_c[100]),
	.O(wr_data[100])
);
OBUF \wr_data_obuf[101]  (
	.I(wr_data_c[101]),
	.O(wr_data[101])
);
OBUF \wr_data_obuf[102]  (
	.I(wr_data_c[102]),
	.O(wr_data[102])
);
OBUF \wr_data_obuf[103]  (
	.I(wr_data_c[103]),
	.O(wr_data[103])
);
OBUF \wr_data_obuf[104]  (
	.I(wr_data_c[104]),
	.O(wr_data[104])
);
OBUF \wr_data_obuf[105]  (
	.I(wr_data_c[105]),
	.O(wr_data[105])
);
OBUF \wr_data_obuf[106]  (
	.I(wr_data_c[106]),
	.O(wr_data[106])
);
OBUF \wr_data_obuf[107]  (
	.I(wr_data_c[107]),
	.O(wr_data[107])
);
OBUF \wr_data_obuf[108]  (
	.I(wr_data_c[108]),
	.O(wr_data[108])
);
OBUF \wr_data_obuf[109]  (
	.I(wr_data_c[109]),
	.O(wr_data[109])
);
OBUF \wr_data_obuf[110]  (
	.I(wr_data_c[110]),
	.O(wr_data[110])
);
OBUF \wr_data_obuf[111]  (
	.I(wr_data_c[111]),
	.O(wr_data[111])
);
OBUF \wr_data_obuf[112]  (
	.I(wr_data_c[112]),
	.O(wr_data[112])
);
OBUF \wr_data_obuf[113]  (
	.I(wr_data_c[113]),
	.O(wr_data[113])
);
OBUF \wr_data_obuf[114]  (
	.I(wr_data_c[114]),
	.O(wr_data[114])
);
OBUF \wr_data_obuf[115]  (
	.I(wr_data_c[115]),
	.O(wr_data[115])
);
OBUF \wr_data_obuf[116]  (
	.I(wr_data_c[116]),
	.O(wr_data[116])
);
OBUF \wr_data_obuf[117]  (
	.I(wr_data_c[117]),
	.O(wr_data[117])
);
OBUF \wr_data_obuf[118]  (
	.I(wr_data_c[118]),
	.O(wr_data[118])
);
OBUF \wr_data_obuf[119]  (
	.I(wr_data_c[119]),
	.O(wr_data[119])
);
OBUF \wr_data_obuf[120]  (
	.I(wr_data_c[120]),
	.O(wr_data[120])
);
OBUF \wr_data_obuf[121]  (
	.I(wr_data_c[121]),
	.O(wr_data[121])
);
OBUF \wr_data_obuf[122]  (
	.I(wr_data_c[122]),
	.O(wr_data[122])
);
OBUF \wr_data_obuf[123]  (
	.I(wr_data_c[123]),
	.O(wr_data[123])
);
OBUF \wr_data_obuf[124]  (
	.I(wr_data_c[124]),
	.O(wr_data[124])
);
OBUF \wr_data_obuf[125]  (
	.I(wr_data_c[125]),
	.O(wr_data[125])
);
OBUF \wr_data_obuf[126]  (
	.I(wr_data_c[126]),
	.O(wr_data[126])
);
OBUF \wr_data_obuf[127]  (
	.I(wr_data_c[127]),
	.O(wr_data[127])
);
OBUF \wr_data_mask_obuf[0]  (
	.I(GND),
	.O(wr_data_mask[0])
);
OBUF \wr_data_mask_obuf[1]  (
	.I(GND),
	.O(wr_data_mask[1])
);
OBUF \wr_data_mask_obuf[2]  (
	.I(GND),
	.O(wr_data_mask[2])
);
OBUF \wr_data_mask_obuf[3]  (
	.I(GND),
	.O(wr_data_mask[3])
);
OBUF \wr_data_mask_obuf[4]  (
	.I(GND),
	.O(wr_data_mask[4])
);
OBUF \wr_data_mask_obuf[5]  (
	.I(GND),
	.O(wr_data_mask[5])
);
OBUF \wr_data_mask_obuf[6]  (
	.I(GND),
	.O(wr_data_mask[6])
);
OBUF \wr_data_mask_obuf[7]  (
	.I(GND),
	.O(wr_data_mask[7])
);
OBUF \wr_data_mask_obuf[8]  (
	.I(GND),
	.O(wr_data_mask[8])
);
OBUF \wr_data_mask_obuf[9]  (
	.I(GND),
	.O(wr_data_mask[9])
);
OBUF \wr_data_mask_obuf[10]  (
	.I(GND),
	.O(wr_data_mask[10])
);
OBUF \wr_data_mask_obuf[11]  (
	.I(GND),
	.O(wr_data_mask[11])
);
OBUF \wr_data_mask_obuf[12]  (
	.I(GND),
	.O(wr_data_mask[12])
);
OBUF \wr_data_mask_obuf[13]  (
	.I(GND),
	.O(wr_data_mask[13])
);
OBUF \wr_data_mask_obuf[14]  (
	.I(GND),
	.O(wr_data_mask[14])
);
OBUF \wr_data_mask_obuf[15]  (
	.I(GND),
	.O(wr_data_mask[15])
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/I_rst_n_i  (
	.I(I_rst_n_c),
	.O(\vfb_wrapper_inst/I_rst_n_i )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_i_cZ[9]  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [9]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_i [9])
);
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_85_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto9 ),
	.I1(\vfb_wrapper_inst/dma0_wr_grant ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_85_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_85_i_cZ .INIT=8'hE2;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_req_o_RNO  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto9 ),
	.I1(\vfb_wrapper_inst/dma0_wr_grant ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_51_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_req_o_RNO .INIT=4'hE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto9_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lt9 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto9 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto9_cZ .INIT=16'hFFFE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i_cZ  (
	.I0(cmd_ready_c),
	.I1(\vfb_wrapper_inst/dma0_wr_grant ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z [6]),
	.I3(wr_data_rdy_c),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i_cZ .INIT=16'h3B33;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto6_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto5_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto6 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lt9 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto6_cZ .INIT=16'hFE00;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[23]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/dma_wr_base [23]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_23_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[23] .INIT=16'hFB08;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[24]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/dma_wr_base [24]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_24_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[24] .INIT=16'hFB08;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cntlde  (
	.I0(I_vin0_vs_n_c),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cntlde .INIT=8'h73;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_3_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[3] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_4_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[4] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_5_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[5] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_6_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[6] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_7_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[7] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_8_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[8] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_9_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[9] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_10_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[10] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[11]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_11_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[11] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[12]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_12_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[12] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[13]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_13_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[13] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[14]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_14_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[14] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[15]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_15_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[15] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[16]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_16_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [16])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[16] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[17]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_17_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [17])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[17] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[18]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_18_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [18])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[18] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[19]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_19_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [19])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[19] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[20]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_20_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [20])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[20] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[21]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_21_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [21])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[21] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[22]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_22_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [22])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[22] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[25]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_25_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [25])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[25] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[26]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_26_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [26])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[26] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[27]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_s_27_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [27])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4_cZ[27] .INIT=8'hD0;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_RNIVV5M  (
	.I0(I_vin0_vs_n_c),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_RNIVV5M .INIT=4'hB;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto5_3_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [2]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto5_3 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto5_3_cZ .INIT=16'hFFFE;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_2_cZ  (
	.I0(I_vin0_de_c),
	.I1(I_vin0_vs_n_c),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_2 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_2_cZ .INIT=8'hB8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_de_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_we_32b ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b_cZ .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_rising_cZ  (
	.I0(I_vin0_vs_n_c),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_rising )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_rising_cZ .INIT=4'h2;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[0] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[1] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[2] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[3] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[4] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[5] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[6] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[7] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO_cZ[8] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_qxu_cZ[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_qxu [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_qxu_cZ[9] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[0]  (
	.I0(\vfb_wrapper_inst/dma0_wr_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[0] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[1]  (
	.I0(\vfb_wrapper_inst/dma0_wr_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[1] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[2]  (
	.I0(\vfb_wrapper_inst/dma0_wr_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[2] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[3]  (
	.I0(\vfb_wrapper_inst/dma0_wr_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[3] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[4]  (
	.I0(\vfb_wrapper_inst/dma0_wr_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[4] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[5]  (
	.I0(\vfb_wrapper_inst/dma0_wr_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO_cZ[5] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_qxu_cZ[6]  (
	.I0(\vfb_wrapper_inst/dma0_wr_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_qxu [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_qxu_cZ[6] .INIT=4'h8;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_data_end_0_a2_0_a2  (
	.I0(cmd_ready_c),
	.I1(\vfb_wrapper_inst/dma0_wr_grant ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z [6]),
	.I3(wr_data_rdy_c),
	.F(\vfb_wrapper_inst/dma0_wr_data_en )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_data_end_0_a2_0_a2 .INIT=16'h0800;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [9]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[9] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [8]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[8] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [7]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[7] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [6]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[6] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [5]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[5] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [4]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[4] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [3]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[3] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [2]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[2] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [1]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[1] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [0]),
	.CLK(I_vin0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnte ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_Z[0] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [6]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt[6] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [5]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[5] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [4]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[4] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [3]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[3] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [2]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[2] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [1]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[1] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [0]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_165_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_Z[0] .INIT=1'b0;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0_Z  (
	.D(I_vin0_vs_n_c),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0_Z .INIT=1'b1;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_rst_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_rising ),
	.CLK(I_vin0_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_rst )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_rst_Z .INIT=1'b1;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_2 ),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_i [9]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_Z .INIT=1'b0;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_Z  (
	.D(I_vin0_vs_n_c),
	.CLK(I_vin0_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_vs_n_Z .INIT=1'b1;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d0 ),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_vs_n_d1_Z .INIT=1'b1;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[14]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [14]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[14] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[13]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [13]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[13] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[12]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [12]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[12] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[11]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [11]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[11] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[10]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [10]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[10] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[1]  (
	.D(I_vin0_data_c[1]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[0]  (
	.D(I_vin0_data_c[0]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[27]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [27]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [27])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[27] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[26]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [26]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [26])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[26] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[25]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [25]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [25])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[25] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[24]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [24]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[24] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[23]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [23]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[23] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[22]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [22]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [22])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[22] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[21]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [21]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [21])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[21] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[20]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [20]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [20])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[20] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[19]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [19]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [19])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[19] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[18]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [18]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [18])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[18] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[17]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [17]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [17])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[17] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[16]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [16]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [16])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[16] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[15]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr_4 [15]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_addr [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_addr[15] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[15]  (
	.D(I_vin0_data_c[15]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[15] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[14]  (
	.D(I_vin0_data_c[14]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[14] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[13]  (
	.D(I_vin0_data_c[13]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[13] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[12]  (
	.D(I_vin0_data_c[12]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[12] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[11]  (
	.D(I_vin0_data_c[11]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[11] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[10]  (
	.D(I_vin0_data_c[10]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[10] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[9]  (
	.D(I_vin0_data_c[9]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[8]  (
	.D(I_vin0_data_c[8]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[7]  (
	.D(I_vin0_data_c[7]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[6]  (
	.D(I_vin0_data_c[6]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[5]  (
	.D(I_vin0_data_c[5]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[4]  (
	.D(I_vin0_data_c[4]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[3]  (
	.D(I_vin0_data_c[3]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[2]  (
	.D(I_vin0_data_c[2]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data_Z[2] .INIT=1'b0;
DFFPE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_end_o  (
	.D(\vfb_wrapper_inst/dma0_wr_grant ),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_85_i ),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_end )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_end_o .INIT=1'b1;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_req_o  (
	.D(\vfb_wrapper_inst/dma0_wr_grant_i ),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/N_51_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_req )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/dma_wr_req_o .INIT=1'b0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_s_27_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [27]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_26 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_s_27_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_s_27_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_s_27_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_26_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [26]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_25 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_26 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_26_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_26_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_25_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [25]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_24 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_25 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_25_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_25_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_24_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [24]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_23 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_24 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_24_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_24_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_23_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [23]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_22 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_23 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_23_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_23_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_22_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [22]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_21 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_22 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_22_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_22_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_21_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [21]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_20 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_21 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_21_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_21_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_20_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [20]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_19 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_20 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_20_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_20_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_19_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [19]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_18 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_19 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_19_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_19_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_18_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [18]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_17 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_18 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_18_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_18_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_17_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [17]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_16 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_17 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_17_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_17_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_16_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [16]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_15 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_16 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_16_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_16_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_15_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [15]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_14 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_15 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_15_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_15_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_14_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [14]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_13 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_14 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_14_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_14_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_13_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [13]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_12 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_13 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_13_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_13_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_12_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [12]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_11 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_12 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_12_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_12_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_11_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [11]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_10 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_11 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_11_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_11_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_10_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [10]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_9 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_10 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_10_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_10_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_9_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_9 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_9_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_9_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_8_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_8_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_8_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_7_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_7_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_7_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_6_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_6_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_6_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_5_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_5_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_5_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_4_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_addr [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_4_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_4_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_3_0  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/dma0_wr_addr [3]),
	.I3(GND),
	.CIN(GND),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_3_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un1_dma_wr_addr_cry_3_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s_0[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_qxu [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [5]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s_0_COUT [6]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s_0[6] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [4]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [5]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[5] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [3]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [4]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[4] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [2]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [3]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[3] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [1]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [2]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[2] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [0]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [1]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[1] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0_RNO [0]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/dma0_wr_grant ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry [0]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_s [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_cnt_cry_0[0] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s_0[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_qxu [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [8]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s_0_COUT [9]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s_0[9] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [7]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [8]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[8] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [6]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [7]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[7] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [5]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [6]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[6] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [4]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [5]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[5] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [3]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [4]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[4] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [2]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [3]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[3] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [1]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [2]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[2] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [0]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [1]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[1] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0_RNO [0]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_scalar ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry [0]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_s [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/video_de_allian_cnt_cry_0[0] .ALU_MODE=0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[0] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[1] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[2] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[3] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[4] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[5] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[6] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[7] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[8] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[9] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[10] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[11]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [11]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[11] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[12]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [12]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[12] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[13]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [13]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[13] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[14]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [14]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[14] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[15]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [15]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[15] .INIT=8'h70;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[16]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [16])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[16] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[17]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [17])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[17] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[18]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [18])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[18] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[19]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [19])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[19] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[20]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [20])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[20] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[21]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [21])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[21] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[22]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [22])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[22] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[23]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[23] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[24]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[24] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[25]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [25])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[25] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[26]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [10]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [26])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[26] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[27]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [11]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [27])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[27] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[28]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [12]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [28])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[28] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[29]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [13]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [29])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[29] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[30]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [14]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [30])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[30] .INIT=8'h2A;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[31]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [15]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [31])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5_cZ[31] .INIT=8'h2A;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_16b ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2_cZ[1] .INIT=16'h3C14;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2_cZ[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_16b ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2_cZ[0] .INIT=8'h31;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_we_32b_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_16b ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_we_32b_4 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_we_32b_4_cZ .INIT=4'h4;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [2]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [1]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [0]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_we_32b  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_we_32b_4 ),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_we_32b )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_we_32b .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_32b  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_16b ),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_de_32b )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_32b .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_16b_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den ),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_16b )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_de_16b_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [1]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [0]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[15]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [15]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[15] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[14]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [14]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[14] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[13]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [13]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[13] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[12]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [12]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[12] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[11]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [11]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[11] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[10]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [10]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[10] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [9]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [8]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [7]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [6]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [5]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [4]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_data [3]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_16b_Z[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[16]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [16]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [16])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[16] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[15]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [15]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[15] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[14]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [14]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[14] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[13]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [13]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[13] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[12]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [12]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[12] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[11]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [11]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[11] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[10]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [10]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[10] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [9]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [8]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [7]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [6]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [5]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [4]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [3]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [2]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[31]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [31]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [31])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[31] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[30]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [30]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [30])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[30] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[29]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [29]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [29])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[29] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[28]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [28]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [28])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[28] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[27]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [27]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [27])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[27] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[26]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [26]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [26])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[26] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[25]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [25]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [25])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[25] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[24]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [24]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[24] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[23]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [23]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[23] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[22]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [22]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [22])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[22] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[21]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [21]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [21])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[21] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[20]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [20]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [20])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[20] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[19]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [19]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [19])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[19] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[18]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [18]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [18])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[18] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[17]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b_5 [17]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [17])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/dma_d_32b[17] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2 [1]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt_2 [0]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/CO0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/allian_cnt[0] .INIT=1'b0;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_i_cZ .INIT=16'h0001;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_4 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_6 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_i_cZ .INIT=16'h0001;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a3[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a3[0] .INIT=16'h6996;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_6_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_3 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_4 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_5 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_6 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_6 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_6_cZ .INIT=16'hFFFE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[0] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[1] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [2]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [2]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[2] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [3]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[3] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [4]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[4] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[5] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [6]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [6]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[6] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [7]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[7] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [8]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[8] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_m[9] .INIT=16'hD8E4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2[2] .INIT=16'h6996;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_0_i_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_0_cZ .INIT=16'h7BDE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [2]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [3]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_1_i_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_1_cZ .INIT=16'hB7DE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_7_i_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_4 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_4_cZ .INIT=16'hB7DE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [11]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_0_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_0_cZ .INIT=16'hB7ED;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_1_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_1_cZ .INIT=16'hB7DE;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_5_i_o3[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_5_i_o3[0] .INIT=8'h96;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2[3] .INIT=16'h6996;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_6_i  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [6]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_6 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_6_i .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_5_i  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_5 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_5_i .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_4_i  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_4 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_4_i .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_3_i  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_3 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_3_i .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_5_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_5 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_5_cZ .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [6]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_4 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_4_cZ .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_3_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_3 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_3_cZ .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[0]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[0] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[1]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[1] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[2]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [2]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[2] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[3]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[3] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[4]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[4] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[5]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[5] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[6]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [6]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[6] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[7]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[7] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[8]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3_cZ[8] .INIT=8'hE4;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.un1_WrEn_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Fullz ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.un1_WrEn )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.un1_WrEn_cZ .INIT=4'h4;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/un1_rbin_num_next_cZ[0]_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Emptyz ),
	.I1(\vfb_wrapper_inst/dma0_wr_data_en ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/un1_rbin_num_next_cZ[0] )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/un1_rbin_num_next_cZ[0]_cZ .INIT=4'h4;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_RNIQPVN  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [20]),
	.F(\vfb_wrapper_inst/dma0_wr_data [95])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_RNIQPVN .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [24]),
	.F(\vfb_wrapper_inst/dma0_wr_data [123])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_0 .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_1  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [25]),
	.F(\vfb_wrapper_inst/dma0_wr_data [124])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_1 .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_2  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [26]),
	.F(\vfb_wrapper_inst/dma0_wr_data [125])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_2 .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_3  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [27]),
	.F(\vfb_wrapper_inst/dma0_wr_data [126])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_3 .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_4  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [28]),
	.F(\vfb_wrapper_inst/dma0_wr_data [127])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_0_0_RNIQPVN_4 .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[0] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[1] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[2] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[3] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[4] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[5] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[6] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[7] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [10]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [11]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext_cZ[8] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[0] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[1] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[2] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[3] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[4] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[5] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[6] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[7] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext_i[8] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_i_o3[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_i_o3[5] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0_cZ[7] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_0_i_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_0_i_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_0_i_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_1_i_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_1_i_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_1_i_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_0_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_0_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_0_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_1_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_1_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_1_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_7_i_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_7_i_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_7_i_0_cZ .INIT=4'h6;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_3_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [3]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_3 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_3_cZ .INIT=16'h9669;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_2_lofx_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [2]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [2]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_2_lofx )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_2_lofx_cZ .INIT=16'h9669;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_3 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3_0_RNO_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.gry2bin_0.un51_gry2bin_13_0 [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0_0_RNO_cZ .INIT=4'h9;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1_0_RNO_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1_0_RNO_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1_0_RNO_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2_0_RNO_cZ .INIT=4'h9;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_0_cZ .INIT=4'h9;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4_0_RNO_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4_0_RNO_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4_0_RNO_0_cZ .INIT=4'h6;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_0_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_0 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_0_cZ[1] .INIT=16'h9669;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_1_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_1 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_1_cZ[1] .INIT=16'h6996;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_0_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_0 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_0_cZ[1] .INIT=16'h6996;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_1_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_1 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_1_cZ[1] .INIT=16'h9669;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_0_cZ .INIT=16'hFFFF;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_1_cZ .INIT=16'hFFFF;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_0_cZ .INIT=16'hFFF6;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_1_cZ .INIT=16'hFFF9;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_0_cZ .INIT=16'hED7B;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_1_cZ .INIT=16'hB7DE;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_0_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [0]),
	.I3(GND),
	.CIN(VCC),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_0 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_0_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_1_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.gry2bin_0.un51_gry2bin_13_0 [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [1]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_0 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_1 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_1_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_2_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_axb_2_lofx ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [2]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_1 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_2 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_2_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3_0_RNO ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [3]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_2 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_4_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [4]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_4_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_5_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_b_D0_0 [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [5]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_5_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_6_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [6]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_6_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_7_0  (
	.I0(GND),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [7]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_7_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_8_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [8]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_8_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_s_9_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [9]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_s_9_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub0 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_0_s_9_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_0_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [0]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/un1_rbin_num_next_cZ[0] ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_0 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_0_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_1_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_0 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_1 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_1_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_2_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_1 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_2 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_2_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_3_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_2 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_3_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_4_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_4_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_5_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_5_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_6_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_6_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_7_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_7_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_8_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_8_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_s_9_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_s_9_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next_s_9_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_0_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [0]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.un1_WrEn ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_0 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_0_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_1_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_0 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_1 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_1_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_2_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_1 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_2 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_2_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_3_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_2 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_3_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_4_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_4_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_5_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_5_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_6_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_6_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_7_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_7_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_8_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_8_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_9_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_9 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_9_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_10_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [10]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_9 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_10 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_10_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_s_11_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [11]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_cry_10 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_s_11_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next_s_11_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0_0_RNO ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [0]),
	.I3(GND),
	.CIN(VCC),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1_0_RNO_0 ),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_0 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2_0_RNO ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [2]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_0 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_1 ),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_2 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4_0_RNO_0 ),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_5_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_5_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_6_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_i [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [6]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_6_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_7_0  (
	.I0(VCC),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [7]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_7_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_8_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_a3_0 [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [8]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_8_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_s_9_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [9]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_s_9_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub1 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_s_9_0 .ALU_MODE=1;
SDPX9 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_0_mem_2_0_0_0  (
	.CLKA(I_vin0_clk_c),
	.CEA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_i ),
	.RESETA(GND),
	.WREA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b ),
	.CLKB(I_dma_clk_c),
	.CEB(VCC),
	.RESETB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.WREB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Emptyz ),
	.OCE(GND),
	.BLKSEL({GND, GND, GND}),
	.DI({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [8:0]}),
	.ADA({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [10:6], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin [5], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [4:0], GND, GND, GND}),
	.ADB({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [8:0], GND, GND, GND, GND, GND}),
	.DO({\vfb_wrapper_inst/dma0_wr_data [104:96], \vfb_wrapper_inst/dma0_wr_data [72:64], \vfb_wrapper_inst/dma0_wr_data [40:32], \vfb_wrapper_inst/dma0_wr_data [8:0]})
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_0_mem_2_0_0_0 .READ_MODE=1'b0;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_0_mem_2_0_0_0 .BLK_SEL=3'b000;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_0_mem_2_0_0_0 .BIT_WIDTH_0=9;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_0_mem_2_0_0_0 .BIT_WIDTH_1=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_0_mem_2_0_0_0 .RESET_MODE="ASYNC";
SDPX9 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_1_mem_2_1_0_0  (
	.CLKA(I_vin0_clk_c),
	.CEA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_i ),
	.RESETA(GND),
	.WREA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b ),
	.CLKB(I_dma_clk_c),
	.CEB(VCC),
	.RESETB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.WREB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Emptyz ),
	.OCE(GND),
	.BLKSEL({GND, GND, GND}),
	.DI({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [17:9]}),
	.ADA({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [10:6], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin [5], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [4:0], GND, GND, GND}),
	.ADB({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [8:0], GND, GND, GND, GND, GND}),
	.DO({\vfb_wrapper_inst/dma0_wr_data [113:105], \vfb_wrapper_inst/dma0_wr_data [81:73], \vfb_wrapper_inst/dma0_wr_data [49:41], \vfb_wrapper_inst/dma0_wr_data [17:9]})
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_1_mem_2_1_0_0 .READ_MODE=1'b0;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_1_mem_2_1_0_0 .BLK_SEL=3'b000;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_1_mem_2_1_0_0 .BIT_WIDTH_0=9;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_1_mem_2_1_0_0 .BIT_WIDTH_1=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_1_mem_2_1_0_0 .RESET_MODE="ASYNC";
SDPX9 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_2_mem_2_2_0_0  (
	.CLKA(I_vin0_clk_c),
	.CEA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_i ),
	.RESETA(GND),
	.WREA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b ),
	.CLKB(I_dma_clk_c),
	.CEB(VCC),
	.RESETB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.WREB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Emptyz ),
	.OCE(GND),
	.BLKSEL({GND, GND, GND}),
	.DI({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [26:18]}),
	.ADA({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [10:6], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin [5], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [4:0], GND, GND, GND}),
	.ADB({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [8:0], GND, GND, GND, GND, GND}),
	.DO({\vfb_wrapper_inst/dma0_wr_data [122:114], \vfb_wrapper_inst/dma0_wr_data [90:82], \vfb_wrapper_inst/dma0_wr_data [58:50], \vfb_wrapper_inst/dma0_wr_data [26:18]})
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_2_mem_2_2_0_0 .READ_MODE=1'b0;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_2_mem_2_2_0_0 .BLK_SEL=3'b000;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_2_mem_2_2_0_0 .BIT_WIDTH_0=9;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_2_mem_2_2_0_0 .BIT_WIDTH_1=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_2_mem_2_2_0_0 .RESET_MODE="ASYNC";
SDP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0  (
	.CLKA(I_vin0_clk_c),
	.CEA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_i ),
	.RESETA(GND),
	.WREA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_den_32b ),
	.CLKB(I_dma_clk_c),
	.CEB(VCC),
	.RESETB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.WREB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Emptyz ),
	.OCE(GND),
	.BLKSEL({GND, GND, GND}),
	.DI({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_d_32b [31:27]}),
	.ADA({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [10:6], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin [5], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [4:0], GND, GND, GND}),
	.ADB({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_3 [8:0], GND, GND, GND, GND, GND}),
	.DO({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [31:20], \vfb_wrapper_inst/dma0_wr_data [94:91], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [15:13], \vfb_wrapper_inst/dma0_wr_data [63:59], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0_DO [7:5], \vfb_wrapper_inst/dma0_wr_data [31:27]})
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0 .READ_MODE=1'b0;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0 .BLK_SEL=3'b000;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0 .BIT_WIDTH_0=8;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0 .BIT_WIDTH_1=32;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/mem_2_3_mem_2_3_0_0 .RESET_MODE="ASYNC";
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [6]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [7]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [8]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[9]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [9]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[9]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[10]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [10]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[10]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[11]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [11]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[11]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [0]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [1]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [2]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [3]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [4]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [5]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [6]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [7]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wgraynext [8]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [11]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[9] .INIT=1'b0;
DFFNP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r_Z[0]  (
	.D(GND),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_rst ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r_Z[0] .INIT=1'b1;
DFFNP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [0]),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_rst ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r_Z[1] .INIT=1'b1;
DFFNP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w_Z[0]  (
	.D(GND),
	.CLK(I_vin0_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_rst ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w_Z[0] .INIT=1'b1;
DFFNP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [0]),
	.CLK(I_vin0_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_wr_rst ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w_Z[1] .INIT=1'b1;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [0]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [1]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [2]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [3]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [4]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [5]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wbin_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [0]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [1]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [2]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [3]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [4]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [5]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [6]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [7]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr [8]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[9]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [9]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z[9]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr_Z [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wptr [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [5]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [6]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [7]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [8]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [9]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr_Z [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[9]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq1_wptr [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z[9]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/un7lto6 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_rd_count [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Rnum_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [0]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [1]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [2]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr_Z [3]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq1_rptr [4]),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z[4]_Z .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [3]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[3] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [4]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[4] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [5]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[5] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [6]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[6] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [7]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[7] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [8]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rgraynext [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rptr_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[9] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [0]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[0] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [1]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[1] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [2]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/dma0_wr_data_en ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/raddr_num_dly_Z[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_next [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_Z[6] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst_Z  (
	.D(VCC),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Empty_i ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_i ),
	.CLK(I_vin0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Fullz )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_Z .INIT=1'b0;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Empty_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rempty_val_NE_i ),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Emptyz )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Empty_Z .INIT=1'b1;
MUX2_LUT6 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_5 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6 )
);
MUX2_LUT6 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0 [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1 [1]),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [1]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.gry2bin_0.un51_gry2bin_13_0 [1])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_0 [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1_1 [1]),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_1 [1])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_0 [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0_1 [1]),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [2]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_v_0_0_a2_0 [1])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [6]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_1 )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wq2_rptr_Z [6]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_6_0 )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wbin_num_next [11]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/wfull_val_NE_4 )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_RNIJKO  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Fullz ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Full_i )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.wdata_q_rst_RNO  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Emptyz ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Empty_i )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_5_0_RNO  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [5]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i [5])
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_4_0_RNO  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [4]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i [4])
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [3]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i [3])
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_1_0_RNO  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num [1]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rbin_num_i [1])
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_1_cZ  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_Z [4]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_3_0_RNO_1 )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/rcnt_sub_1_cry_6_0_RNO  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr [6]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_dma_write_32_128_inst/fifo_inst/Big.rq2_wptr_i [6])
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_req_o_RNO_0  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_fifo_wr_count_2_i_0_a5 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_163_i )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_req_o_RNO  (
	.I(\vfb_wrapper_inst/dma0_rd_grant ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_259_i )
);
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_18_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_80 ),
	.I1(\vfb_wrapper_inst/dma0_rd_grant ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_18_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_18_i_cZ .INIT=8'h84;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_158_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_80 ),
	.I1(\vfb_wrapper_inst/dma0_rd_grant ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_158_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_158_i_cZ .INIT=16'h8C40;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_20_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_79 ),
	.I1(\vfb_wrapper_inst/dma0_rd_grant ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_20_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_20_i_cZ .INIT=8'h84;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_27_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_fifo_wr_count_2_i_0_a5 ),
	.I1(\vfb_wrapper_inst/dma0_rd_grant ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [6]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [15]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_27_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_27_i_cZ .INIT=16'h5551;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_fifo_wr_count_2_i_0_a5_cZ  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_wr_count [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_wr_count [8]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_wr_count [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_fifo_wr_count_2_i_0_a5 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_fifo_wr_count_2_i_0_a5_cZ .INIT=16'h5554;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_3_i_0_o2_1[1]  (
	.I0(cmd_ready_c),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_79 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_3_i_0_o2_1[1] .INIT=8'hD5;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[23]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/dma_rd_base [23]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_23_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[23] .INIT=16'hFB08;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[24]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/dma_rd_base [24]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_24_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[24] .INIT=16'hFB08;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[3] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_4_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[4] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_5_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[5] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_6_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[6] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_7_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[7] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_8_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[8] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_9_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[9] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_10_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[10] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[11]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_11_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[11] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[12]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_12_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[12] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[13]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_13_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[13] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[14]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_14_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[14] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[15]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_15_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[15] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[16]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_16_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [16])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[16] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[17]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_17_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [17])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[17] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[18]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_18_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [18])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[18] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[19]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_19_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [19])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[19] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[20]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_20_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [20])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[20] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[21]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_21_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [21])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[21] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[22]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_22_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [22])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[22] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[25]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_25_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [25])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[25] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[26]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_26_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [26])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[26] .INIT=8'hD0;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[27]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_s_27_0_SUM ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [27])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4_cZ[27] .INIT=8'hD0;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_2_cZ  (
	.I0(I_vout0_de_c),
	.I1(I_vout0_vs_n_c),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_2 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_2_cZ .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_rising_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d1 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_rising )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_rising_cZ .INIT=4'h2;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cntlde_i_a3_i  (
	.I0(\vfb_wrapper_inst/dma0_rd_data_valid ),
	.I1(\vfb_wrapper_inst/dma0_rd_grant ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cntlde_i_a3_i .INIT=4'hB;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_3_i_0_o2[1]  (
	.I0(cmd_ready_c),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_80 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_3_i_0_o2[1] .INIT=16'hF777;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[0]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[0] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[1]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[1] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[2]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[2] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[3]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[3] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[4]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[4] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[5]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO_cZ[5] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_qxu_cZ[6]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_qxu [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_qxu_cZ[6] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[0]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[0] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[1]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[1] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[2]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[2] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[3]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[3] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[4]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[4] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[5]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[5] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[6]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[6] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[7]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[7] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[8]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[8] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[9]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[9] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[10]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[10] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[11]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [11]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[11] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[12]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [12]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[12] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[13]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [13]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[13] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[14]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [14]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO_cZ[14] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_qxu_cZ[15]  (
	.I0(\vfb_wrapper_inst/dma0_rd_grant ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [15]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_qxu [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_qxu_cZ[15] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/dma0_rd_data_valid ),
	.I1(\vfb_wrapper_inst/dma0_rd_grant ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0_RNO_cZ .INIT=4'h8;
DFFPE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_end_o_fast  (
	.D(\vfb_wrapper_inst/dma0_rd_grant ),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_27_i ),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.dma_rd_end_o_fast )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_end_o_fast .INIT=1'b1;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [6]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[6] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [5]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[5] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [4]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[4] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [3]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[3] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [2]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[2] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [1]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[1] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [0]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_71 ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_Z[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[15]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [15]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[15] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[14]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [14]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[14] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[13]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [13]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[13] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[12]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [12]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[12] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[11]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [11]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[11] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[10]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [10]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[10] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_Z[0] .INIT=1'b0;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 ),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d1_Z .INIT=1'b1;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d1_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d0 ),
	.CLK(I_vout0_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d1_Z .INIT=1'b1;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0_Z  (
	.D(I_vout0_vs_n_c),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_vs_n_d0_Z .INIT=1'b1;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d0_Z  (
	.D(I_vout0_vs_n_c),
	.CLK(I_vout0_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_d0_Z .INIT=1'b1;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_rst_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/video_vs_n_rising ),
	.CLK(I_vout0_clk_c),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_rst )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_rst_Z .INIT=1'b1;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_2 ),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_158_i ),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_Z[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_18_i ),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_20_i ),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/cmd_cnt_Z[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[16]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [16]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [16])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[16] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[15]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [15]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[15] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[14]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [14]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[14] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[13]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [13]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[13] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[12]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [12]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[12] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[11]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [11]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[11] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[10]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [10]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[10] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[27]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [27]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [27])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[27] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[26]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [26]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [26])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[26] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[25]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [25]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [25])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[25] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[24]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [24]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[24] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[23]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [23]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[23] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[22]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [22]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [22])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[22] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[21]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [21]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [21])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[21] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[20]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [20]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [20])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[20] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[19]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [19]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [19])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[19] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[18]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [18]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [18])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[18] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[17]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr_4 [17]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_addr [17])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_addr[17] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_req_o  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_259_i ),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_163_i ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_req )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_req_o .INIT=1'b0;
DFFPE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_end_o  (
	.D(\vfb_wrapper_inst/dma0_rd_grant ),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/N_27_i ),
	.PRESET(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_end )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_end_o .INIT=1'b1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_s_27_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [27]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_26 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_s_27_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_s_27_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_s_27_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_26_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [26]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_25 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_26 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_26_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_26_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_25_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [25]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_24 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_25 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_25_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_25_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_24_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [24]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_23 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_24 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_24_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_24_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_23_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [23]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_22 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_23 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_23_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_23_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_22_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [22]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_21 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_22 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_22_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_22_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_21_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [21]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_20 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_21 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_21_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_21_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_20_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [20]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_19 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_20 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_20_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_20_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_19_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [19]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_18 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_19 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_19_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_19_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_18_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [18]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_17 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_18 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_18_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_18_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_17_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [17]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_16 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_17 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_17_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_17_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_16_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [16]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_15 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_16 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_16_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_16_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_15_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [15]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_14 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_15 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_15_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_15_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_14_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [14]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_13 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_14 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_14_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_14_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_13_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [13]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_12 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_13 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_13_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_13_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_12_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [12]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_11 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_12 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_12_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_12_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_11_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [11]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_10 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_11 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_11_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_11_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_10_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [10]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_9 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_10 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_10_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_10_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_9_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_9 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_9_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_9_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_8_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_8_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_8_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_7_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_7_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_7_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_6_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_6_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_6_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_5_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_5_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_5_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_4_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_4_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_4_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_addr [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0_RNO ),
	.I3(GND),
	.CIN(GND),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0_SUM )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/un1_dma_rd_addr_cry_3_0_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s_0[15]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_qxu [15]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [14]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s_0_COUT [15]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s_0[15] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[14]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [14]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [13]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [14]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[14] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[13]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [13]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [12]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [13]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[13] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[12]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [12]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [11]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [12]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[12] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[11]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [11]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [10]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [11]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[11] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [10]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [9]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [10]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[10] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [8]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [9]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[9] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [7]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [8]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[8] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [6]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [7]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[7] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [5]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [6]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[6] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [4]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [5]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[5] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [3]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [4]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[4] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [2]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [3]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[3] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [1]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [2]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[2] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [0]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [1]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[1] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0_RNO [0]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/dma0_rd_grant ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry [0]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_s [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/read_dog_cnt_cry_0[0] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s_0[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_qxu [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [5]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s_0_COUT [6]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s_0[6] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [4]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [5]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[5] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [3]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [4]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[4] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [2]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [3]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[3] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [1]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [2]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[2] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [0]),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [1]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[1] .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0_RNO [0]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/dma0_rd_grant ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry [0]),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_s [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/dma_rd_cnt_cry_0[0] .ALU_MODE=0;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [16]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[0] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [17]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[1] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [18]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[2] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [19]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[3] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [20]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[4] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [21]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[5] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [22]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[6] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [23]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[7] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [24]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[8] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [25]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[9] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [10]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [26]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[10] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[11]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [11]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [27]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[11] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[12]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [12]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [28]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[12] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[13]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [13]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [29]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[13] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[14]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [14]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [30]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[14] .INIT=16'hE200;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[15]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [15]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [31]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7_cZ[15] .INIT=16'hE200;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt_2_cZ[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt_2 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt_2_cZ[0] .INIT=8'h31;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_32b_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_32b_4 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_32b_4_cZ .INIT=4'h4;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt_2 [0]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/allian_cnt_Z[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_den_16b  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni ),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_den_c)
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_den_16b .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_32b  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_32b_4 ),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_32b .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_d0 ),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_ni_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_d0_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b ),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_d0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_d0_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en ),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_de_16b_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [3]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [2]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [1]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [0]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[18]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [18]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [18])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[18] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[17]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [17]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [17])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[17] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[16]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [16]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [16])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[16] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[15]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [15]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[15])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[15] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[14]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [14]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[14])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[14] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[13]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [13]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[13])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[13] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[12]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [12]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[12])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[12] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[11]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [11]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[11] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[10]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [10]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[10] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [9]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [8]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [7]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [6]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [5]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b_7 [4]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(O_vout0_data_c[4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_16b[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[31]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [31]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [31])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[31] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[30]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [30]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [30])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[30] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[29]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [29]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [29])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[29] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[28]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [28]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [28])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[28] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[27]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [27]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [27])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[27] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[26]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [26]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [26])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[26] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[25]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [25]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [25])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[25] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[24]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [24]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[24] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[23]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [23]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[23] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[22]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [22]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [22])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[22] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[21]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [21]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [21])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[21] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[20]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [20]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [20])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[20] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[19]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [19]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b [19])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/dma_d_32b_Z[19] .INIT=1'b0;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_i_cZ .INIT=16'h0001;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_1 ),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_i_cZ .INIT=16'h0001;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_m[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un107_gry2bin_27 [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_m[7] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_m[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un107_gry2bin_27 [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_m[8] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_m[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un107_gry2bin_27 [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_m[9] .INIT=8'hE4;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_0_i_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_0_cZ .INIT=16'hB7ED;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [2]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [3]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_1_i_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_1_cZ .INIT=16'hB7DE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [11]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_0_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_0_cZ .INIT=16'h7BDE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_1_0 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_1_cZ .INIT=16'hB7DE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [32]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [24]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_406 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[0] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[31]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [27]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [19]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_437 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[31] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [28]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_438 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[0] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[31]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [31]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [23]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_469 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[31] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [33]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [25]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_407 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[1] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[30]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [26]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [18]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_436 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[30] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [29]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_439 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[1] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[30]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [30]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [22]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_468 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[30] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [34]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [26]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_408 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[2] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[29]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [25]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [17]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_435 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[29] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [2]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [30]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_440 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[2] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[29]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [29]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [21]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_467 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[29] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [35]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [27]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_409 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[3] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[28]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [24]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [16]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_434 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[28] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [31]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_441 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[3] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[28]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [28]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [20]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_466 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[28] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [28]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_410 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[4] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[27]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [23]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [15]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_433 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[27] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [32]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_442 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[4] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[27]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [27]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [19]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_465 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[27] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [29]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_411 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[5] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[26]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [22]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [14]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_432 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[26] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [33]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_443 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[5] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[26]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [26]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [18]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_464 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[26] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [2]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [30]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_412 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[6] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[25]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [21]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [13]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_431 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[25] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [6]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [34]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_444 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[6] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[25]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [25]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [17]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_463 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[25] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [31]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_413 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[7] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[24]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [20]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [12]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_430 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[24] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [35]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_445 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[7] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[24]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [24]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [16]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_462 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[24] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [32]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_414 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[8] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[23]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [19]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [11]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_429 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[23] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_446 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[8] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[23]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [23]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [15]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_461 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[23] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [33]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_415 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[9] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[22]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [18]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [10]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_428 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[22] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_447 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[9] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[22]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [22]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [14]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_460 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[22] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [6]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [34]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_416 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[10] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[21]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [17]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_427 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[21] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [10]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [2]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_448 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[10] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[21]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [21]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [13]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_459 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[21] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[11]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [35]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_417 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[11] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[20]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [16]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [8]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_426 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[20] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[11]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [11]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [3]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_449 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[11] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[20]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [20]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [12]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_458 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[20] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[12]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_418 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[12] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[19]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [15]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [7]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_425 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[19] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[12]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [12]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [4]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_450 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[12] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[19]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [19]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [11]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_457 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[19] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[13]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_419 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[13] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[18]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [14]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [6]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_424 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[18] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[13]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [13]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_451 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[13] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[18]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [18]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [10]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_456 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[18] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[14]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [10]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [2]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_420 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[14] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[17]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [13]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_423 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[17] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[14]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [14]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [6]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_452 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[14] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[17]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [17]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_455 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[17] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[15]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [11]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [3]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_421 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[15] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[16]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [12]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [4]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_422 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_1[16] .INIT=16'hD800;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[15]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [15]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [7]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_453 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[15] .INIT=16'hE400;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[16]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [16]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [8]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_454 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_2[16] .INIT=16'hE400;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_5_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_5 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_5_cZ .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [6]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_4 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_4_cZ .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_3_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_3 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_3_cZ .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_5_i  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_5 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_5_i .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_4_i  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_4 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_4_i .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_3_i  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_3 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_3_i .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un107_gry2bin_27_i[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un107_gry2bin_27 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un107_gry2bin_27_i[7] .INIT=8'h96;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [2]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[2] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [3]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[3] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[4] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [5]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[5] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [6]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[6] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[7] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[8] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[9] .INIT=8'hE4;
LUT3 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [10]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3_cZ[10] .INIT=8'hE4;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.un1_WrEn_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Fullz ),
	.I1(\vfb_wrapper_inst/dma0_rd_data_valid ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.un1_WrEn )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.un1_WrEn_cZ .INIT=4'h4;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata14_cZ  (
	.I0(O_vout0fifo_empty_c),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata14 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata14_cZ .INIT=4'h4;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[0] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[1] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[2] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[3] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[4] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[5] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[6] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[7] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext_i[8] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[0] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [4]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[1] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [5]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[2] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[3] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [7]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[4] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[5] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[6] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[7] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [10]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [11]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext_cZ[8] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_RNI3E2J[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un137_gry2bin_0_a2_0 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_RNI3E2J[1] .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_0_i_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_0_i_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_0_i_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_1_i_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_1_i_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_1_i_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_0_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [2]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_0_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_0_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_1_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [3]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_1_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_1_0_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un137_gry2bin_0_a2_0 [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0_0_RNO_cZ .INIT=4'h9;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un127_gry2bin_0_a2[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un127_gry2bin_0_a2[3] .INIT=16'h6996;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4_0_RNO_cZ .INIT=4'h9;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8_0_RNO_cZ .INIT=4'h9;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un137_gry2bin_0_a2_0 [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0_0_RNO_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4_0_RNO_cZ .INIT=4'h6;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8_0_RNO_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [9]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8_0_RNO )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8_0_RNO_cZ .INIT=4'h9;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_0_cZ .INIT=16'hFFFF;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_1_cZ .INIT=16'hFFFF;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_0_cZ .INIT=16'hFFF6;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_1_cZ .INIT=16'hFFF9;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_0_cZ .INIT=16'hFFFF;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_1_cZ .INIT=16'hFFFF;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_0_cZ .INIT=16'hFFF6;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_3 ),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_4 ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_1_cZ .INIT=16'hFFF9;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_0_cZ .INIT=16'hB7DE;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [10]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_1_cZ .INIT=16'hED7B;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_0_cZ .INIT=16'hED7B;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [7]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [8]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [8]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_1_cZ .INIT=16'hB7DE;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_0_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast [0]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata14 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_0 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_0_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_1_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_0 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_1 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_1_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_2_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_1 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_2 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_2_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_3_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_2 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_3_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_4_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_4_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_5_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_5_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_6_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_6_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_7_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_7_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_8_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_8_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_9_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_9 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_9_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_10_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [10]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_9 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_10 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_10_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_s_11_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [11]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_cry_10 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_s_11_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next_s_11_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_0_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 ),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.un1_WrEn ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_0 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_0_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_1_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [1]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_0 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_1 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_1_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_2_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [2]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_1 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_2 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_2_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_3_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [3]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_2 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_3_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_4_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [4]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_4_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_5_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [5]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_5_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_6_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [6]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_6_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_7_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_7_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_8_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [8]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_8_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_s_9_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin [9]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_s_9_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext_s_9_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0_0_RNO ),
	.CIN(VCC),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un137_gry2bin_0_a2_0 [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1_0_RNO ),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_0 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [2]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2_0_RNO ),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_3_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [3]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_3_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [4]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4_0_RNO ),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5_0_RNO ),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_6_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [6]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_6_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_7_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [7]),
	.I1(GND),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_7_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8_0_RNO ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [8]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_s_9_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [9]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_s_9_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub1 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_s_9_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0_0_RNO ),
	.CIN(VCC),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_1_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [1]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.gry2bin_2.un137_gry2bin_0_a2_0 [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0]),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_0 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_1 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_1_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_2_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [2]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [2]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0]),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_1 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_2 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_2_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_3_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_2 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_3 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_3_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [4]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [4]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4_0_RNO ),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_3 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_5_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [5]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [5]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_4 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_5 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_5_0 .ALU_MODE=2;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_6_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [6]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_5 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_6 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_6_0 .ALU_MODE=1;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_7_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [7]),
	.I1(VCC),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_6 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_7 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_7_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8_0_RNO ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [8]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_7 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8 ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8_0 .ALU_MODE=0;
ALU \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_s_9_0  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin [9]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [9]),
	.I3(GND),
	.CIN(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_cry_8 ),
	.COUT(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_s_9_0_COUT ),
	.SUM(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub0 [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0_s_9_0 .ALU_MODE=1;
SDPX9 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3  (
	.CLKA(I_dma_clk_c),
	.CEA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_i ),
	.RESETA(GND),
	.WREA(\vfb_wrapper_inst/dma0_rd_data_valid ),
	.CLKB(I_vout0_clk_c),
	.CEB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.RESETB(GND),
	.WREB(O_vout0fifo_empty_c),
	.OCE(GND),
	.BLKSEL({GND, GND, GND}),
	.DI({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, \vfb_wrapper_inst/dma0_rd_data [127:108]}),
	.ADA({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [8:1], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 , GND, VCC, VCC, VCC, VCC}),
	.ADB({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [10:2], GND, GND, GND, GND, GND}),
	.DO({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3_DO [35:0]})
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3 .READ_MODE=1'b0;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3 .BLK_SEL=3'b000;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3 .BIT_WIDTH_0=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3 .BIT_WIDTH_1=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_3 .RESET_MODE="SYNC";
SDPX9 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2  (
	.CLKA(I_dma_clk_c),
	.CEA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_i ),
	.RESETA(GND),
	.WREA(\vfb_wrapper_inst/dma0_rd_data_valid ),
	.CLKB(I_vout0_clk_c),
	.CEB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.RESETB(GND),
	.WREB(O_vout0fifo_empty_c),
	.OCE(GND),
	.BLKSEL({GND, GND, GND}),
	.DI({\vfb_wrapper_inst/dma0_rd_data [107:72]}),
	.ADA({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [8:1], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 , GND, VCC, VCC, VCC, VCC}),
	.ADB({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [10:2], GND, GND, GND, GND, GND}),
	.DO({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2_DO [35:0]})
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2 .READ_MODE=1'b0;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2 .BLK_SEL=3'b000;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2 .BIT_WIDTH_0=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2 .BIT_WIDTH_1=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_2 .RESET_MODE="SYNC";
SDPX9 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1  (
	.CLKA(I_dma_clk_c),
	.CEA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_i ),
	.RESETA(GND),
	.WREA(\vfb_wrapper_inst/dma0_rd_data_valid ),
	.CLKB(I_vout0_clk_c),
	.CEB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.RESETB(GND),
	.WREB(O_vout0fifo_empty_c),
	.OCE(GND),
	.BLKSEL({GND, GND, GND}),
	.DI({\vfb_wrapper_inst/dma0_rd_data [71:36]}),
	.ADA({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [8:1], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 , GND, VCC, VCC, VCC, VCC}),
	.ADB({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [10:2], GND, GND, GND, GND, GND}),
	.DO({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1_DO [35:0]})
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1 .READ_MODE=1'b0;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1 .BLK_SEL=3'b000;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1 .BIT_WIDTH_0=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1 .BIT_WIDTH_1=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_1 .RESET_MODE="SYNC";
SDPX9 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0  (
	.CLKA(I_dma_clk_c),
	.CEA(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_i ),
	.RESETA(GND),
	.WREA(\vfb_wrapper_inst/dma0_rd_data_valid ),
	.CLKB(I_vout0_clk_c),
	.CEB(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.RESETB(GND),
	.WREB(O_vout0fifo_empty_c),
	.OCE(GND),
	.BLKSEL({GND, GND, GND}),
	.DI({\vfb_wrapper_inst/dma0_rd_data [35:0]}),
	.ADA({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [8:1], \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 , GND, VCC, VCC, VCC, VCC}),
	.ADB({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_3 [10:2], GND, GND, GND, GND, GND}),
	.DO({\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0_DO [35:0]})
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0 .READ_MODE=1'b0;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0 .BLK_SEL=3'b000;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0 .BIT_WIDTH_0=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0 .BIT_WIDTH_1=36;
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/mem_mem_0_0 .RESET_MODE="SYNC";
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[9]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [11]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[9]_Z .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [9]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[9] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[10]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [10]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[10] .INIT=1'b0;
DFFNP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r_Z[0]  (
	.D(GND),
	.CLK(I_vout0_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_rst ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r_Z[0] .INIT=1'b1;
DFFNP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [0]),
	.CLK(I_vout0_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_rst ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r_Z[1] .INIT=1'b1;
DFFNP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w_Z[0]  (
	.D(GND),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_rst ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w_Z[0] .INIT=1'b1;
DFFNP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [0]),
	.CLK(I_dma_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_rst ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w_Z[1] .INIT=1'b1;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z[8]_Z .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [2]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[2] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [3]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[3] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [4]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[4] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [5]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[5] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [6]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[6] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [7]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[7] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [8]),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_en_32b ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/raddr_num_dly_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[9]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[9]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [0]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [1]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [2]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [3]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [4]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr [5]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [6]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [7]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [8]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [9]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Wnum_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_wr_count [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Wnum_Z[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Wnum_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_wr_count [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Wnum_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Wnum_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_wr_count [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Wnum_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr_Z [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq1_rptr [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[7]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [7]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[7] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [8]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [9]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[10]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [10]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [10])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[10] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[11]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [11]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [11])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[11] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [0]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [1]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [2]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [3]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [4]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [5]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [6]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [7]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[8]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rgraynext [8]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rptr_Z[8] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [0]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [1]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/ANB1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[2]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [2]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[2] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[3]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [3]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[3] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[4]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [4]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[4] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [5]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[5] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[6]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [6]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_Z[6] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [6]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [7]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [8]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[9]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin [9]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[9]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin[0] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [2]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [3]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [4]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[5]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [5]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[5]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[6]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [6]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [6])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[6]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[7]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [7]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [7])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[7]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[8]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [8]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z [8])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[8]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[9]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [9]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin [9])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wbin_Z[9] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wgraynext [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[0]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [0]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[0]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[1]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [1]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[1]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[2]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [2]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [2])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[2]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[3]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [3]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [3])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[3]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[4]_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr_Z [4]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z [4])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[4]_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[5]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wptr [5]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr [5])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq1_wptr_Z[5] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst_Z  (
	.D(VCC),
	.CLK(I_vout0_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata14 ),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wdata_rst_Z .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_i ),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_w [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Fullz )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_Z .INIT=1'b0;
DFFP \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Empty_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_i ),
	.CLK(I_vout0_clk_c),
	.PRESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(O_vout0fifo_empty_c)
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Empty_Z .INIT=1'b1;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [1]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [0]),
	.CLK(I_vout0_clk_c),
	.CLEAR(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/reset_r [1]),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_fast_Z[0] .INIT=1'b0;
MUX2_LUT6 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_5 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6 )
);
MUX2_LUT6 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_5 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6 )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [6]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_1 )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.rq2_wptr_Z [6]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_6_0 )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_1 )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_6_0 )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rbin_num_next [11]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/rempty_val_NE_4 )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_0 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4_1 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wbinnext [9]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wfull_val_NE_4 )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_RNIJKO  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Fullz ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Full_i )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1_0_RNO_cZ  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_1_0_RNO )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2_0_RNO_cZ  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_inv_b_I_4_0 [0]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_2_0_RNO )
);
INV \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5_0_RNO_cZ  (
	.I(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Small.wq2_rptr [6]),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/wcnt_sub_1_cry_5_0_RNO )
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[16]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_422 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_454 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [16])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[15]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_421 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_453 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [15])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[17]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_423 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_455 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [17])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[14]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_420 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_452 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [14])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[18]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_424 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_456 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [18])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[13]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_419 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_451 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [13])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[19]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_425 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_457 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [19])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[12]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_418 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_450 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [12])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[20]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_426 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_458 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [20])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[11]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_417 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_449 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [11])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[21]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_427 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_459 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [21])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[10]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_416 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_448 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [10])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[22]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_428 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_460 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [22])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[9]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_415 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_447 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [9])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[23]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_429 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_461 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [23])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[8]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_414 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_446 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [8])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[24]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_430 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_462 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [24])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[7]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_413 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_445 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [7])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[25]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_431 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_463 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [25])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[6]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_412 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_444 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [6])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[26]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_432 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_464 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [26])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[5]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_411 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_443 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [5])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[27]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_433 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_465 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [27])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[4]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_410 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_442 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [4])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[28]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_434 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_466 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [28])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[3]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_409 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_441 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [3])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[29]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_435 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_467 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [29])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[2]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_408 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_440 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [2])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[30]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_436 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_468 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [30])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[1]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_407 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_439 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [1])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[31]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_437 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_469 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [31])
);
MUX2_LUT5 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/Q_3[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_406 ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/N_438 ),
	.S0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_dma_read_128_32_inst/fifo_inst/CO0 ),
	.O(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_rd_d_32b [0])
);
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_35_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_35_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_35_i_cZ .INIT=16'h002E;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_46_i_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_46_i )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_46_i_cZ .INIT=16'h3130;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_ns_0[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_ns [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_ns_0[0] .INIT=16'hAB01;
LUT4 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_ns_0[0]  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [0]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [1]),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_ns [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_ns_0[0] .INIT=16'h00CD;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_0_sqmuxa_cZ  (
	.I0(I_rd_halt_c[0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_falling_r ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_0_sqmuxa )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_0_sqmuxa_cZ .INIT=4'h4;
LUT2 \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_0_sqmuxa_cZ  (
	.I0(I_wr_halt_c[0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_falling_r ),
	.F(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_0_sqmuxa )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_0_sqmuxa_cZ .INIT=4'h4;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/dma_rd_baseaddr[24]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/dma_rd_base [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/dma_rd_baseaddr[24] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/dma_rd_baseaddr[23]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/dma_rd_base [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/dma_rd_baseaddr[23] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/dma_wr_baseaddr[24]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [1]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/dma_wr_base [24])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/dma_wr_baseaddr[24] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/dma_wr_baseaddr[23]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/dma_wr_base [23])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/dma_wr_baseaddr[23] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_ns [0]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_0_sqmuxa ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_Z[0] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_46_i ),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_0_sqmuxa ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/wr_ptr_Z[1] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_Z[0]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_ns [0]),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_0_sqmuxa ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [0])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_Z[0] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_Z[1]  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/N_35_i ),
	.CLK(I_dma_clk_c),
	.CE(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_0_sqmuxa ),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr [1])
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/rd_ptr_Z[1] .INIT=1'b0;
DFFS \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync3_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync2 ),
	.CLK(I_dma_clk_c),
	.SET(GND),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync3 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync3_Z .INIT=1'b1;
DFFS \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync3_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync2 ),
	.CLK(I_dma_clk_c),
	.SET(GND),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync3 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync3_Z .INIT=1'b1;
DFFS \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync1_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync0 ),
	.CLK(I_dma_clk_c),
	.SET(GND),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync1_Z .INIT=1'b1;
DFFS \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync0_Z  (
	.D(I_vout0_vs_n_c),
	.CLK(I_dma_clk_c),
	.SET(GND),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync0_Z .INIT=1'b1;
DFFS \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync2_0  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync1 ),
	.CLK(I_dma_clk_c),
	.SET(GND),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync2 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync2_0 .INIT=1'b1;
DFFS \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync1_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync0 ),
	.CLK(I_dma_clk_c),
	.SET(GND),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync1 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync1_Z .INIT=1'b1;
DFFS \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync0_Z  (
	.D(I_vin0_vs_n_c),
	.CLK(I_dma_clk_c),
	.SET(GND),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync0 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync0_Z .INIT=1'b1;
DFFS \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync2_0  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync1 ),
	.CLK(I_dma_clk_c),
	.SET(GND),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync2 )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync2_0 .INIT=1'b1;
DFFR \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_falling_r_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync3 ),
	.CLK(I_dma_clk_c),
	.RESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_sync2 ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_falling_r )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vin_vs_n_falling_r_Z .INIT=1'b0;
DFFR \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_falling_r_Z  (
	.D(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync3 ),
	.CLK(I_dma_clk_c),
	.RESET(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_sync2 ),
	.Q(\vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_falling_r )
);
defparam \vfb_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/vout_vs_n_falling_r_Z .INIT=1'b0;
INV \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_wr_grant_RNIAAJD  (
	.I(\vfb_wrapper_inst/dma0_wr_grant ),
	.O(\vfb_wrapper_inst/dma0_wr_grant_i )
);
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0  (
	.I0(\vfb_wrapper_inst/u_dma_bus_arbiter/N_167 ),
	.I1(cmd_c[0]),
	.I2(\vfb_wrapper_inst/dma0_rd_grant ),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_0_3 ),
	.F(cmd_en_c)
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0 .INIT=16'hEAAA;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [0]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [1]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [2]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_4 ),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_167 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5 .INIT=16'h0100;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_4_cZ  (
	.I0(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [3]),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [4]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_write_ctrl.fifo_rd_cnt [5]),
	.I3(wr_data_end_c),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_4 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_4_cZ .INIT=16'h0100;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[3]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [3]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [3]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[3])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[3] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[4]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [4]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [4]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[4])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[4] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[5]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [5]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [5]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[5])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[5] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[6]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [6]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [6]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[6])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[6] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[7]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [7]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [7]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[7])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[7] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[8]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [8]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [8]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[8])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[8] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[9]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [9]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [9]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[9])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[9] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[10]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [10]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [10]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[10])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[10] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[11]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [11]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [11]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[11])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[11] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[12]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [12]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [12]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[12])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[12] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[13]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [13]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [13]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[13])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[13] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[14]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [14]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [14]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[14])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[14] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[15]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [15]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [15]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[15])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[15] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[16]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [16]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [16]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[16])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[16] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[17]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [17]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [17]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[17])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[17] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[18]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [18]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [18]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[18])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[18] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[19]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [19]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [19]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[19])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[19] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[20]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [20]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [20]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[20])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[20] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[21]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [21]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [21]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[21])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[21] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[22]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [22]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [22]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[22])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[22] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[23]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [23]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [23]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[23])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[23] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[24]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [24]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [24]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[24])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[24] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[25]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [25]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [25]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[25])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[25] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[26]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [26]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [26]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[26])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[26] .INIT=16'hF888;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[27]  (
	.I0(cmd_c[0]),
	.I1(\vfb_wrapper_inst/dma0_rd_addr [27]),
	.I2(\vfb_wrapper_inst/dma0_wr_addr [27]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(addr_c[27])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/addr_iv_0[27] .INIT=16'hF888;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[0]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [0]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[0])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[0] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[1]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [1]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[1])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[1] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[2]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [2]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[2])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[2] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[3]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [3]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[3])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[3] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[4]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [4]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[4])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[4] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[5]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [5]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[5])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[5] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[6]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [6]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[6])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[6] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[7]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [7]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[7])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[7] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[8]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [8]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[8])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[8] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[9]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [9]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[9])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[9] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[10]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [10]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[10])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[10] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[11]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [11]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[11])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[11] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[12]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [12]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[12])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[12] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[13]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [13]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[13])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[13] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[14]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [14]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[14])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[14] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[15]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [15]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[15])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[15] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[16]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [16]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[16])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[16] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[17]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [17]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[17])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[17] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[18]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [18]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[18])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[18] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[19]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [19]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[19])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[19] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[20]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [20]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[20])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[20] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[21]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [21]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[21])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[21] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[22]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [22]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[22])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[22] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[23]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [23]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[23])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[23] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[24]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [24]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[24])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[24] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[25]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [25]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[25])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[25] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[26]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [26]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[26])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[26] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[27]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [27]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[27])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[27] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[28]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [28]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[28])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[28] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[29]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [29]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[29])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[29] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[30]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [30]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[30])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[30] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[31]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [31]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[31])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[31] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[32]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [32]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[32])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[32] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[33]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [33]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[33])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[33] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[34]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [34]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[34])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[34] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[35]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [35]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[35])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[35] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[36]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [36]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[36])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[36] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[37]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [37]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[37])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[37] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[38]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [38]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[38])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[38] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[39]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [39]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[39])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[39] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[40]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [40]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[40])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[40] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[41]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [41]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[41])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[41] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[42]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [42]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[42])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[42] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[43]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [43]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[43])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[43] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[44]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [44]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[44])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[44] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[45]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [45]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[45])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[45] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[46]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [46]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[46])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[46] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[47]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [47]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[47])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[47] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[48]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [48]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[48])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[48] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[49]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [49]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[49])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[49] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[50]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [50]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[50])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[50] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[51]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [51]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[51])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[51] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[52]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [52]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[52])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[52] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[53]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [53]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[53])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[53] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[54]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [54]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[54])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[54] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[55]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [55]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[55])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[55] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[56]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [56]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[56])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[56] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[57]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [57]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[57])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[57] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[58]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [58]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[58])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[58] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[59]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [59]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[59])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[59] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[60]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [60]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[60])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[60] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[61]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [61]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[61])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[61] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[62]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [62]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[62])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[62] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[63]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [63]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[63])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[63] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[64]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [64]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[64])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[64] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[65]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [65]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[65])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[65] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[66]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [66]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[66])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[66] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[67]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [67]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[67])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[67] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[68]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [68]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[68])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[68] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[69]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [69]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[69])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[69] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[70]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [70]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[70])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[70] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[71]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [71]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[71])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[71] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[72]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [72]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[72])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[72] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[73]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [73]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[73])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[73] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[74]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [74]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[74])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[74] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[75]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [75]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[75])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[75] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[76]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [76]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[76])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[76] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[77]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [77]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[77])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[77] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[78]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [78]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[78])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[78] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[79]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [79]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[79])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[79] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[80]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [80]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[80])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[80] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[81]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [81]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[81])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[81] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[82]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [82]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[82])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[82] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[83]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [83]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[83])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[83] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[84]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [84]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[84])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[84] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[85]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [85]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[85])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[85] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[86]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [86]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[86])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[86] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[87]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [87]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[87])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[87] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[88]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [88]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[88])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[88] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[89]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [89]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[89])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[89] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[90]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [90]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[90])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[90] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[91]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [91]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[91])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[91] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[92]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [92]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[92])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[92] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[93]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [93]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[93])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[93] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[94]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [94]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[94])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[94] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[95]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [95]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[95])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[95] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[96]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [96]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[96])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[96] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[97]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [97]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[97])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[97] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[98]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [98]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[98])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[98] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[99]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [99]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[99])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[99] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[100]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [100]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[100])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[100] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[101]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [101]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[101])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[101] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[102]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [102]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[102])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[102] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[103]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [103]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[103])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[103] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[104]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [104]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[104])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[104] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[105]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [105]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[105])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[105] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[106]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [106]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[106])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[106] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[107]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [107]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[107])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[107] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[108]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [108]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[108])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[108] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[109]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [109]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[109])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[109] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[110]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [110]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[110])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[110] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[111]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [111]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[111])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[111] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[112]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [112]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[112])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[112] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[113]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [113]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[113])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[113] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[114]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [114]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[114])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[114] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[115]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [115]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[115])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[115] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[116]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [116]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[116])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[116] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[117]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [117]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[117])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[117] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[118]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [118]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[118])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[118] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[119]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [119]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[119])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[119] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[120]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [120]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[120])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[120] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[121]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [121]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[121])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[121] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[122]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [122]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[122])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[122] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[123]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [123]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[123])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[123] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[124]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [124]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[124])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[124] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[125]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [125]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[125])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[125] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[126]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [126]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[126])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[126] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[127]  (
	.I0(\vfb_wrapper_inst/dma0_wr_data [127]),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_c[127])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/wr_data_cZ[127] .INIT=4'h8;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_a3_0_2_0_a2  (
	.I0(\vfb_wrapper_inst/dma0_wr_data_en ),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.F(wr_data_end_c)
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_a3_0_2_0_a2 .INIT=4'h8;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_a2  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_74 ),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_a2_0 ),
	.I3(\vfb_wrapper_inst/dma0_wr_req ),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_a2 .INIT=16'hA8A0;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i_cZ  (
	.I0(\vfb_wrapper_inst/dma0_wr_end ),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [0]),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [1]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_1 ),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i_cZ .INIT=16'h007C;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i_cZ  (
	.I0(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I1(init_calib_complete_c),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [0]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i_cZ .INIT=16'h5554;
LUT2 \vfb_wrapper_inst/u_dma_bus_arbiter/g0_0_RNIP5DM  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.F(cmd_c[0])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/g0_0_RNIP5DM .INIT=4'h8;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_o2_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_end ),
	.I1(\vfb_wrapper_inst/dma0_rd_req ),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [0]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_74 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_o2_0 .INIT=16'h0A30;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_1_cZ  (
	.I0(\vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_a5_0 ),
	.I1(\vfb_wrapper_inst/dma0_rd_end ),
	.I2(\vfb_wrapper_inst/dma0_wr_req ),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [0]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_1 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_1_cZ .INIT=16'hAAAE;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_a2_0_cZ  (
	.I0(\vfb_wrapper_inst/dma0_wr_end ),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [0]),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_a2_0 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i_0_a2_0_cZ .INIT=8'h40;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_a5_0_cZ  (
	.I0(\vfb_wrapper_inst/dma0_rd_req ),
	.I1(\vfb_wrapper_inst/dma0_wr_req ),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_a5_0 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_a5_0_cZ .INIT=8'h01;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_0_3_cZ  (
	.I0(cmd_ready_c),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [0]),
	.I2(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [1]),
	.I3(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.cmd_cnt [2]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_0_3 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/cmd_en_iv_0_0_a5_0_3_cZ .INIT=16'h0008;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/g0_0  (
	.I0(\vfb_wrapper_inst/dma0_rd_req ),
	.I1(\vfb_wrapper_inst/u0_dma_frame_buffer.u_dma_read_ctrl.dma_rd_end_o_fast ),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [0]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/g0_0 .INIT=16'h03A0;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i_fast_cZ  (
	.I0(\vfb_wrapper_inst/dma0_wr_end ),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [0]),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [1]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/m15_0_1 ),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i_fast )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i_fast_cZ .INIT=16'h007C;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i_fast_cZ  (
	.I0(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I1(init_calib_complete_c),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [1]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [0]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i_fast )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i_fast_cZ .INIT=16'h5554;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[14]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[14]),
	.F(\vfb_wrapper_inst/dma0_rd_data [14])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[14] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[15]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[15]),
	.F(\vfb_wrapper_inst/dma0_rd_data [15])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[15] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[16]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[16]),
	.F(\vfb_wrapper_inst/dma0_rd_data [16])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[16] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[17]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[17]),
	.F(\vfb_wrapper_inst/dma0_rd_data [17])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[17] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[18]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[18]),
	.F(\vfb_wrapper_inst/dma0_rd_data [18])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[18] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[19]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[19]),
	.F(\vfb_wrapper_inst/dma0_rd_data [19])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[19] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[20]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[20]),
	.F(\vfb_wrapper_inst/dma0_rd_data [20])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[20] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[21]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[21]),
	.F(\vfb_wrapper_inst/dma0_rd_data [21])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[21] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[22]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[22]),
	.F(\vfb_wrapper_inst/dma0_rd_data [22])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[22] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[23]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[23]),
	.F(\vfb_wrapper_inst/dma0_rd_data [23])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[23] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[24]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[24]),
	.F(\vfb_wrapper_inst/dma0_rd_data [24])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[24] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[25]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[25]),
	.F(\vfb_wrapper_inst/dma0_rd_data [25])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[25] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[26]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[26]),
	.F(\vfb_wrapper_inst/dma0_rd_data [26])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[26] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[27]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[27]),
	.F(\vfb_wrapper_inst/dma0_rd_data [27])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[27] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[28]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[28]),
	.F(\vfb_wrapper_inst/dma0_rd_data [28])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[28] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[29]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[29]),
	.F(\vfb_wrapper_inst/dma0_rd_data [29])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[29] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[30]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[30]),
	.F(\vfb_wrapper_inst/dma0_rd_data [30])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[30] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[31]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[31]),
	.F(\vfb_wrapper_inst/dma0_rd_data [31])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[31] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[32]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[32]),
	.F(\vfb_wrapper_inst/dma0_rd_data [32])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[32] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[33]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[33]),
	.F(\vfb_wrapper_inst/dma0_rd_data [33])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[33] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[34]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[34]),
	.F(\vfb_wrapper_inst/dma0_rd_data [34])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[34] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[35]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[35]),
	.F(\vfb_wrapper_inst/dma0_rd_data [35])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[35] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[36]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[36]),
	.F(\vfb_wrapper_inst/dma0_rd_data [36])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[36] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[37]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[37]),
	.F(\vfb_wrapper_inst/dma0_rd_data [37])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[37] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[38]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[38]),
	.F(\vfb_wrapper_inst/dma0_rd_data [38])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[38] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[39]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[39]),
	.F(\vfb_wrapper_inst/dma0_rd_data [39])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[39] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[0]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[0]),
	.F(\vfb_wrapper_inst/dma0_rd_data [0])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[0] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[1]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[1]),
	.F(\vfb_wrapper_inst/dma0_rd_data [1])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[1] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[2]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[2]),
	.F(\vfb_wrapper_inst/dma0_rd_data [2])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[2] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[3]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[3]),
	.F(\vfb_wrapper_inst/dma0_rd_data [3])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[3] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[4]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[4]),
	.F(\vfb_wrapper_inst/dma0_rd_data [4])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[4] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[5]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[5]),
	.F(\vfb_wrapper_inst/dma0_rd_data [5])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[5] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[6]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[6]),
	.F(\vfb_wrapper_inst/dma0_rd_data [6])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[6] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[7]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[7]),
	.F(\vfb_wrapper_inst/dma0_rd_data [7])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[7] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[8]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[8]),
	.F(\vfb_wrapper_inst/dma0_rd_data [8])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[8] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[9]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[9]),
	.F(\vfb_wrapper_inst/dma0_rd_data [9])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[9] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[10]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[10]),
	.F(\vfb_wrapper_inst/dma0_rd_data [10])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[10] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[11]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[11]),
	.F(\vfb_wrapper_inst/dma0_rd_data [11])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[11] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[12]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[12]),
	.F(\vfb_wrapper_inst/dma0_rd_data [12])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[12] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[13]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[13]),
	.F(\vfb_wrapper_inst/dma0_rd_data [13])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[13] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[54]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[54]),
	.F(\vfb_wrapper_inst/dma0_rd_data [54])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[54] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[55]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[55]),
	.F(\vfb_wrapper_inst/dma0_rd_data [55])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[55] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[56]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[56]),
	.F(\vfb_wrapper_inst/dma0_rd_data [56])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[56] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[57]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[57]),
	.F(\vfb_wrapper_inst/dma0_rd_data [57])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[57] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[58]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[58]),
	.F(\vfb_wrapper_inst/dma0_rd_data [58])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[58] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[59]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[59]),
	.F(\vfb_wrapper_inst/dma0_rd_data [59])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[59] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[60]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[60]),
	.F(\vfb_wrapper_inst/dma0_rd_data [60])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[60] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[61]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[61]),
	.F(\vfb_wrapper_inst/dma0_rd_data [61])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[61] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[62]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[62]),
	.F(\vfb_wrapper_inst/dma0_rd_data [62])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[62] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[63]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[63]),
	.F(\vfb_wrapper_inst/dma0_rd_data [63])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[63] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[64]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[64]),
	.F(\vfb_wrapper_inst/dma0_rd_data [64])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[64] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[65]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[65]),
	.F(\vfb_wrapper_inst/dma0_rd_data [65])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[65] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[66]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[66]),
	.F(\vfb_wrapper_inst/dma0_rd_data [66])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[66] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[67]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[67]),
	.F(\vfb_wrapper_inst/dma0_rd_data [67])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[67] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[68]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[68]),
	.F(\vfb_wrapper_inst/dma0_rd_data [68])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[68] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[69]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[69]),
	.F(\vfb_wrapper_inst/dma0_rd_data [69])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[69] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[70]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[70]),
	.F(\vfb_wrapper_inst/dma0_rd_data [70])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[70] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[71]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[71]),
	.F(\vfb_wrapper_inst/dma0_rd_data [71])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[71] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[72]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[72]),
	.F(\vfb_wrapper_inst/dma0_rd_data [72])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[72] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[73]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[73]),
	.F(\vfb_wrapper_inst/dma0_rd_data [73])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[73] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[74]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[74]),
	.F(\vfb_wrapper_inst/dma0_rd_data [74])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[74] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[75]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[75]),
	.F(\vfb_wrapper_inst/dma0_rd_data [75])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[75] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[76]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[76]),
	.F(\vfb_wrapper_inst/dma0_rd_data [76])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[76] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[77]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[77]),
	.F(\vfb_wrapper_inst/dma0_rd_data [77])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[77] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[78]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[78]),
	.F(\vfb_wrapper_inst/dma0_rd_data [78])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[78] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[79]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[79]),
	.F(\vfb_wrapper_inst/dma0_rd_data [79])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[79] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[40]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[40]),
	.F(\vfb_wrapper_inst/dma0_rd_data [40])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[40] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[41]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[41]),
	.F(\vfb_wrapper_inst/dma0_rd_data [41])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[41] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[42]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[42]),
	.F(\vfb_wrapper_inst/dma0_rd_data [42])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[42] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[43]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[43]),
	.F(\vfb_wrapper_inst/dma0_rd_data [43])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[43] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[44]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[44]),
	.F(\vfb_wrapper_inst/dma0_rd_data [44])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[44] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[45]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[45]),
	.F(\vfb_wrapper_inst/dma0_rd_data [45])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[45] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[46]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[46]),
	.F(\vfb_wrapper_inst/dma0_rd_data [46])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[46] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[47]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[47]),
	.F(\vfb_wrapper_inst/dma0_rd_data [47])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[47] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[48]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[48]),
	.F(\vfb_wrapper_inst/dma0_rd_data [48])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[48] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[49]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[49]),
	.F(\vfb_wrapper_inst/dma0_rd_data [49])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[49] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[50]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[50]),
	.F(\vfb_wrapper_inst/dma0_rd_data [50])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[50] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[51]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[51]),
	.F(\vfb_wrapper_inst/dma0_rd_data [51])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[51] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[52]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[52]),
	.F(\vfb_wrapper_inst/dma0_rd_data [52])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[52] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[53]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[53]),
	.F(\vfb_wrapper_inst/dma0_rd_data [53])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[53] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[94]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[94]),
	.F(\vfb_wrapper_inst/dma0_rd_data [94])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[94] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[95]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[95]),
	.F(\vfb_wrapper_inst/dma0_rd_data [95])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[95] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[96]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[96]),
	.F(\vfb_wrapper_inst/dma0_rd_data [96])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[96] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[97]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[97]),
	.F(\vfb_wrapper_inst/dma0_rd_data [97])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[97] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[98]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[98]),
	.F(\vfb_wrapper_inst/dma0_rd_data [98])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[98] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[99]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[99]),
	.F(\vfb_wrapper_inst/dma0_rd_data [99])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[99] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[100]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[100]),
	.F(\vfb_wrapper_inst/dma0_rd_data [100])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[100] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[101]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[101]),
	.F(\vfb_wrapper_inst/dma0_rd_data [101])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[101] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[102]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[102]),
	.F(\vfb_wrapper_inst/dma0_rd_data [102])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[102] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[103]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[103]),
	.F(\vfb_wrapper_inst/dma0_rd_data [103])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[103] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[104]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[104]),
	.F(\vfb_wrapper_inst/dma0_rd_data [104])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[104] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[105]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[105]),
	.F(\vfb_wrapper_inst/dma0_rd_data [105])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[105] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[106]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[106]),
	.F(\vfb_wrapper_inst/dma0_rd_data [106])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[106] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[107]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[107]),
	.F(\vfb_wrapper_inst/dma0_rd_data [107])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[107] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[108]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[108]),
	.F(\vfb_wrapper_inst/dma0_rd_data [108])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[108] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[109]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[109]),
	.F(\vfb_wrapper_inst/dma0_rd_data [109])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[109] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[110]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[110]),
	.F(\vfb_wrapper_inst/dma0_rd_data [110])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[110] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[111]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[111]),
	.F(\vfb_wrapper_inst/dma0_rd_data [111])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[111] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[112]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[112]),
	.F(\vfb_wrapper_inst/dma0_rd_data [112])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[112] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[113]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[113]),
	.F(\vfb_wrapper_inst/dma0_rd_data [113])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[113] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[114]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[114]),
	.F(\vfb_wrapper_inst/dma0_rd_data [114])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[114] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[115]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[115]),
	.F(\vfb_wrapper_inst/dma0_rd_data [115])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[115] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[116]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[116]),
	.F(\vfb_wrapper_inst/dma0_rd_data [116])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[116] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[117]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[117]),
	.F(\vfb_wrapper_inst/dma0_rd_data [117])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[117] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[118]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[118]),
	.F(\vfb_wrapper_inst/dma0_rd_data [118])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[118] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[119]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[119]),
	.F(\vfb_wrapper_inst/dma0_rd_data [119])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[119] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[80]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[80]),
	.F(\vfb_wrapper_inst/dma0_rd_data [80])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[80] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[81]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[81]),
	.F(\vfb_wrapper_inst/dma0_rd_data [81])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[81] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[82]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[82]),
	.F(\vfb_wrapper_inst/dma0_rd_data [82])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[82] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[83]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[83]),
	.F(\vfb_wrapper_inst/dma0_rd_data [83])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[83] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[84]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[84]),
	.F(\vfb_wrapper_inst/dma0_rd_data [84])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[84] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[85]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[85]),
	.F(\vfb_wrapper_inst/dma0_rd_data [85])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[85] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[86]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[86]),
	.F(\vfb_wrapper_inst/dma0_rd_data [86])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[86] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[87]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[87]),
	.F(\vfb_wrapper_inst/dma0_rd_data [87])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[87] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[88]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[88]),
	.F(\vfb_wrapper_inst/dma0_rd_data [88])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[88] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[89]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[89]),
	.F(\vfb_wrapper_inst/dma0_rd_data [89])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[89] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[90]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[90]),
	.F(\vfb_wrapper_inst/dma0_rd_data [90])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[90] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[91]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[91]),
	.F(\vfb_wrapper_inst/dma0_rd_data [91])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[91] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[92]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[92]),
	.F(\vfb_wrapper_inst/dma0_rd_data [92])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[92] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[93]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[93]),
	.F(\vfb_wrapper_inst/dma0_rd_data [93])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[93] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[120]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[120]),
	.F(\vfb_wrapper_inst/dma0_rd_data [120])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[120] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[121]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[121]),
	.F(\vfb_wrapper_inst/dma0_rd_data [121])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[121] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[122]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[122]),
	.F(\vfb_wrapper_inst/dma0_rd_data [122])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[122] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[123]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[123]),
	.F(\vfb_wrapper_inst/dma0_rd_data [123])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[123] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[124]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[124]),
	.F(\vfb_wrapper_inst/dma0_rd_data [124])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[124] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[125]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[125]),
	.F(\vfb_wrapper_inst/dma0_rd_data [125])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[125] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[126]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[126]),
	.F(\vfb_wrapper_inst/dma0_rd_data [126])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[126] .INIT=8'h80;
LUT3 \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[127]  (
	.I0(I_rst_n_c),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/N_75 ),
	.I2(rd_data_c[127]),
	.F(\vfb_wrapper_inst/dma0_rd_data [127])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_data_cZ[127] .INIT=8'h80;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_0_cZ  (
	.I0(\vfb_wrapper_inst/dma0_rd_req ),
	.I1(rd_data_valid_c),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [0]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_0 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_0_cZ .INIT=16'h0000;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_1_cZ  (
	.I0(\vfb_wrapper_inst/dma0_rd_req ),
	.I1(rd_data_valid_c),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [0]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_1 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_1_cZ .INIT=16'h0080;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_0_cZ  (
	.I0(\vfb_wrapper_inst/dma0_rd_req ),
	.I1(rd_data_valid_c),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [0]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_0 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_0_cZ .INIT=16'h0000;
LUT4 \vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_1_cZ  (
	.I0(\vfb_wrapper_inst/dma0_rd_req ),
	.I1(rd_data_valid_c),
	.I2(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [0]),
	.I3(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [1]),
	.F(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_1 )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_1_cZ .INIT=16'h0C80;
MUX2_LUT5 \vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_cZ  (
	.I0(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_0 ),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_1_1 ),
	.S0(I_rst_n_c),
	.O(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_1 )
);
MUX2_LUT5 \vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_cZ  (
	.I0(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_0 ),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_2_1 ),
	.S0(I_rst_n_c),
	.O(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_2 )
);
MUX2_LUT6 \vfb_wrapper_inst/u_dma_bus_arbiter/g0  (
	.I0(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_1 ),
	.I1(\vfb_wrapper_inst/u_dma_bus_arbiter/g0_2 ),
	.S0(\vfb_wrapper_inst/dma0_rd_end ),
	.O(\vfb_wrapper_inst/dma0_rd_data_valid )
);
DFFCE \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast_Z[0]  (
	.D(\vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i_fast ),
	.CLK(I_dma_clk_c),
	.CE(I_rst_n_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [0])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast_Z[0] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast_Z[1]  (
	.D(\vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i_fast ),
	.CLK(I_dma_clk_c),
	.CE(I_rst_n_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast [1])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_fast_Z[1] .INIT=1'b0;
DFFC \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_wr_grant  (
	.D(\vfb_wrapper_inst/u_dma_bus_arbiter/N_73_i ),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_wr_grant )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_wr_grant .INIT=1'b0;
DFFC \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_grant  (
	.D(cmd_c[0]),
	.CLK(I_dma_clk_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/dma0_rd_grant )
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/dma0_rd_grant .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_Z[0]  (
	.D(\vfb_wrapper_inst/u_dma_bus_arbiter/N_6_i ),
	.CLK(I_dma_clk_c),
	.CE(I_rst_n_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [0])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_Z[0] .INIT=1'b0;
DFFCE \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_Z[1]  (
	.D(\vfb_wrapper_inst/u_dma_bus_arbiter/N_157_i ),
	.CLK(I_dma_clk_c),
	.CE(I_rst_n_c),
	.CLEAR(\vfb_wrapper_inst/I_rst_n_i ),
	.Q(\vfb_wrapper_inst/u_dma_bus_arbiter/current_state [1])
);
defparam \vfb_wrapper_inst/u_dma_bus_arbiter/current_state_Z[1] .INIT=1'b0;
endmodule
