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This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: Q-2020.03G-Beta1
Install: D:\Gowin\Gowin_V1.9.6Beta\SynplifyPro
OS: Windows 6.1

Hostname: GZAE-AE-CAOJIE

Implementation : rev_1

# Written on Wed Jun 17 14:39:47 2020

##### FILES SYNTAX CHECKED ##############################################
Constraint File(s):      (none)

#Run constraint checker to find more issues with constraints.
#########################################################################



No issues found in constraint syntax.



Clock Summary
*************

          Start                     Requested     Requested     Clock        Clock                     Clock
Level     Clock                     Frequency     Period        Type         Group                     Load 
------------------------------------------------------------------------------------------------------------
0 -       Scaler_Top|I_sysclk       217.1 MHz     4.607         inferred     Autoconstr_clkgroup_1     1172 
                                                                                                            
0 -       Scaler_Top|I_vout_clk     255.0 MHz     3.922         inferred     Autoconstr_clkgroup_2     164  
                                                                                                            
0 -       Scaler_Top|I_vin_clk      229.4 MHz     4.359         inferred     Autoconstr_clkgroup_0     126  
============================================================================================================


Clock Load Summary
******************

                          Clock     Source               Clock Pin                                                                     Non-clock Pin     Non-clock Pin
Clock                     Load      Pin                  Seq Example                                                                   Seq Example       Comb Example 
----------------------------------------------------------------------------------------------------------------------------------------------------------------------
Scaler_Top|I_sysclk       1172      I_sysclk(port)       scaler_wrapper_inst.scaler_core_inst.vinvs_sysclk_d1.C                        -                 -            
                                                                                                                                                                      
Scaler_Top|I_vout_clk     164       I_vout_clk(port)     scaler_wrapper_inst.scaler_core_inst.video_outbuf_inst.oram_rpt_d1[1:0].C     -                 -            
                                                                                                                                                                      
Scaler_Top|I_vin_clk      126       I_vin_clk(port)      scaler_wrapper_inst.scaler_core_inst.vin_vsize_vinclk[0].C                    -                 -            
======================================================================================================================================================================
