
Copyright (C) 1994-2019 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: O-2018.09G-SP1
Install: C:\Gowin\1.8\SynplifyPro
OS: Windows 6.1

Hostname: GW-SW-048

Implementation : rev_1
Synopsys HDL Compiler, Version comp2018q4p1, Build 115R, Built Feb 12 2019 09:25:38

@N|Running in 64-bit mode
###########################################################[

Copyright (C) 1994-2019 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: O-2018.09G-SP1
Install: C:\Gowin\1.8\SynplifyPro
OS: Windows 6.1

Hostname: GW-SW-048

Implementation : rev_1
Synopsys Verilog Compiler, Version comp2018q4p1, Build 115R, Built Feb 12 2019 09:25:38

@N|Running in 64-bit mode
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode

@N: CG1350 :	| Running Verilog Compiler in Multiple File Compilation Unit mode

@I::"C:\Gowin\1.8\SynplifyPro\lib\generic\gw2a.v" (library work)
@I::"C:\Gowin\1.8\SynplifyPro\lib\vlog\hypermods.v" (library __hyper__lib__)
@I::"C:\Gowin\1.8\SynplifyPro\lib\vlog\umr_capim.v" (library snps_haps)
@I::"C:\Gowin\1.8\SynplifyPro\lib\vlog\scemi_objects.v" (library snps_haps)
@I::"C:\Gowin\1.8\SynplifyPro\lib\vlog\scemi_pipes.svh" (library snps_haps)
@I::"F:\user-bak\Users\FDELL\Desktop\IP\CrossCrorelation\Gowin_XCORR_RefDesign\XCORR_512-3_case\project\impl\gao\ao_control\gw_con_parameter.v" (library work)
@I::"F:\user-bak\Users\FDELL\Desktop\IP\CrossCrorelation\Gowin_XCORR_RefDesign\XCORR_512-3_case\project\impl\gao\ao_control\gw_con_top_define.v" (library work)
@I::"C:\Gowin\1.8\IDE\data\ipcores\GAO\GW_CON\gw_con_top.v" (library work)
@W: CG1337 :"C:\Gowin\1.8\IDE\data\ipcores\GAO\GW_CON\gw_con_top.v":194:9:194:18|Net capture_dr is not declared.
@W: CG1337 :"C:\Gowin\1.8\IDE\data\ipcores\GAO\GW_CON\gw_con_top.v":208:9:208:22|Net enable_i_delay is not declared.
Verilog syntax check successful!
@N: CG364 :"F:\user-bak\Users\FDELL\Desktop\IP\CrossCrorelation\Gowin_XCORR_RefDesign\XCORR_512-3_case\project\impl\gao\ao_control\gw_con_parameter.v":1:0:1:8|Synthesizing module work_F:\user-bak\Users\FDELL\Desktop\IP\CrossCrorelation\Gowin_XCORR_RefDesign\XCORR_512-3_case\project\impl\gao\ao_control\gw_con_parameter.v_unit in library work.
Selecting top level module gw_con_top
Running optimization stage 1 on MUX16 .......
Running optimization stage 1 on gw_con_top .......
Running optimization stage 2 on gw_con_top .......
Running optimization stage 2 on MUX16 .......

For a summary of runtime and memory usage per design unit, please see file:
==========================================================
@L: F:\user-bak\Users\FDELL\Desktop\IP\CrossCrorelation\Gowin_XCORR_RefDesign\XCORR_512-3_case\project\impl\gao\ao_control\rev_1\synwork\layer0.rt.csv


At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 69MB peak: 70MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Tue Feb 19 17:22:08 2019

###########################################################]
###########################################################[

Copyright (C) 1994-2019 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: O-2018.09G-SP1
Install: C:\Gowin\1.8\SynplifyPro
OS: Windows 6.1

Hostname: GW-SW-048

Implementation : rev_1
Synopsys Synopsys Netlist Linker, Version comp2018q4p1, Build 115R, Built Feb 12 2019 09:25:38

@N|Running in 64-bit mode

At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Tue Feb 19 17:22:08 2019

###########################################################]
@END

At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 3MB peak: 4MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Tue Feb 19 17:22:08 2019

###########################################################]
