#Build: Synplify Pro (R) O-2018.09G-Beta3, Build 136R, Nov 19 2018
#install: /share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro
#OS: Linux 
#Hostname: jinan9110.sdgowin.com

# Thu Dec 13 10:14:05 2018

#Implementation: rev_1


Copyright (C) 1994-2018 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: O-2018.09G-Beta3
Install: /share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro
OS: CentOS release 6.8 (Final)
Hostname: jinan9110.sdgowin.com

Implementation : rev_1
Synopsys HDL Compiler, Version comp2018q3p1, Build 133R, Built Nov 19 2018 17:44:15

@N|Running in 64-bit mode
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Copyright (C) 1994-2018 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: O-2018.09G-Beta3
Install: /share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro
OS: CentOS release 6.8 (Final)
Hostname: jinan9110.sdgowin.com

Implementation : rev_1
Synopsys Verilog Compiler, Version comp2018q3p1, Build 133R, Built Nov 19 2018 17:44:15

@N|Running in 64-bit mode
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode

@N: CG1350 :	| Running Verilog Compiler in Multiple File Compilation Unit mode

@I::"/share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro/lib/generic/gw2a.v" (library work)
@I::"/share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro/lib/vlog/hypermods.v" (library __hyper__lib__)
@I::"/share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro/lib/vlog/umr_capim.v" (library snps_haps)
@I::"/share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro/lib/vlog/scemi_objects.v" (library snps_haps)
@I::"/share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro/lib/vlog/scemi_pipes.svh" (library snps_haps)
@I::"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/xcorr/xcorr.v" (library work)
@I::"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/top.v" (library work)
@E: CG501 :"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/top.v":14:9:14:11|Expecting delimiter: , or ; or )
@I:"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/top.v":"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/../data/o_x.dat" (library work)
@I:"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/top.v":"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/../data/o_y.dat" (library work)
@E: CS187 :"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/top.v":55:0:55:8|Expecting endmodule
@I::"/home/wenbo/Desktop/Gowin_XCORR_RefDesign/XCORR_1024-1_case/XCORR_1024-1_case/src/eliminate_shake.v" (library work)
2 syntax errors
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Thu Dec 13 10:14:06 2018

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@END
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Thu Dec 13 10:14:06 2018

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