<?xml version="1" encoding="UTF-8"?>
<!DOCTYPE gowin-fpga-project>
<Project>
    <Template>FPGA</Template>
    <Version>4</Version>
    <Device>gw2a55-000</Device>
    <FileList>
        <File type="file.verilog" enable="1" path="src/xcorr/xcorr.v"/>
        <File type="file.verilog" enable="1" path="src/top.v"/>
        <File type="file.verilog" enable="1" path="src/eliminate_shake.v"/>
        <File type="file.cst" enable="1" path="src/XCORR_512-3_case.cst"/>
        <File type="file.gao" enable="1" path="src/XCORR_512-3_case.gao"/>
    </FileList>
</Project>
