
Copyright (C) 1994-2018 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: O-2018.09G-Beta3
Install: /share/gwsw/gui_proj/sw_test/Gowin/1.8/SynplifyPro
OS: CentOS release 6.8 (Final)
Hostname: jinan9110.sdgowin.com
max virtual memory: unlimited (bytes)
max user processes: 1024
max stack size: 10485760 (bytes)


Implementation : rev_1

# Written on Tue Dec 18 16:44:53 2018

##### FILES SYNTAX CHECKED ##############################################
Constraint File(s):      (none)

#Run constraint checker to find more issues with constraints.
#########################################################################



No issues found in constraint syntax.



Clock Summary
*************

          Start      Requested      Requested     Clock      Clock               Clock
Level     Clock      Frequency      Period        Type       Group               Load 
--------------------------------------------------------------------------------------
0 -       System     1521.8 MHz     0.657         system     system_clkgroup     14   
======================================================================================


Clock Load Summary
******************

           Clock     Source     Clock Pin                        Non-clock Pin     Non-clock Pin
Clock      Load      Pin        Seq Example                      Seq Example       Comb Example 
------------------------------------------------------------------------------------------------
System     14        -          shift_dr_capture_dr_dly[0].C     -                 -            
================================================================================================
