Project Settings |
---|
Project Name | ao_0 | Device Name | rev_1: GOWIN-GW2A : GW2A_18 |
Implementation Name | rev_1 | Top Module | [auto] |
Pipelining | 1 | Retiming | 0 |
Resource Sharing | 1 | Fanout Guide | 10000 |
Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
Clock Conversion | 1 | FSM Compiler | 1 |
Run Status |
Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
(compiler) | Complete |
6 |
28 |
0 |
- |
00m:02s |
- |
2018/12/11 10:06:23 |
(premap) | Complete |
14 |
0 |
0 |
0m:02s |
0m:02s |
192MB |
2018/12/11 10:06:28 |
(fpga_mapper) | Complete |
11 |
2 |
0 |
0m:06s |
0m:07s |
221MB |
2018/12/11 10:06:36 |
Multi-srs Generator |
Complete | | | | | | | 2018/12/11 10:06:25 |
Area Summary |
|
I/O ports
(io_port) | 27 |
Non I/O Register bits
(non_io_reg) | 292 (1%) |
I/O Register bits
(total_io_reg) | 0 |
Block Rams
(v_ram) | 1 (46) |
Block Multipliers
(dsp_used) | 0 (24) |
LUTs
(total_luts) | 407 (1%) |
Timing Summary |
|
Clock Name | Req Freq | Est Freq | Slack |
ao_top_0|clk_i | 218.6 MHz | 185.8 MHz | -0.807 |
ao_top_0|control[0] | 155.7 MHz | 132.4 MHz | -1.133 |
System | 150.0 MHz | 236.2 MHz | 2.432 |
Optimizations Summary |
Combined Clock Conversion | 2 / 0 |
| |
|