Hierarchy Module Resource

MODULE NAME REG NUMBER ALU NUMBER LUT NUMBER DSP NUMBER BSRAM NUMBER SSRAM NUMBER
top (E:/myWork/IP/releaseVerify/RefDesign/1.9.9/Gowin_10G_Serial_Ethernet_RefDesign/fpga_project/src/top.v) 41 7 39 - - -
    |--u_SerDes_Top (E:/myWork/IP/releaseVerify/RefDesign/1.9.9/Gowin_10G_Serial_Ethernet_RefDesign/fpga_project/src/top.v) - - - - - -
        |--Ten_Giga_Serial_Ethernet_Top_inst (E:/myWork/IP/releaseVerify/RefDesign/1.9.9/Gowin_10G_Serial_Ethernet_RefDesign/fpga_project/src/serdes/serdes.v) 4322 34 3621 - 4 -
    |--gw_gao_inst_0 (E:/myWork/IP/releaseVerify/RefDesign/1.9.9/Gowin_10G_Serial_Ethernet_RefDesign/fpga_project/impl/gwsynthesis/RTL_GAO/gw_gao_top.v) 727 10 526 - 9 -