Power Messages

Report Title Power Analysis Report
Design File E:\myWork\IP\releaseVerify\version\1.9.11\Advanced_FIR_Filter_RefDesign\1_fir_singlerate\32taps_8chn_32tdm_16bit\proj\impl\gwsynthesis\fir_proj.vg
Physical Constraints File E:\myWork\IP\releaseVerify\version\1.9.11\Advanced_FIR_Filter_RefDesign\1_fir_singlerate\32taps_8chn_32tdm_16bit\proj\src\fir_proj.cst
Timing Constraints File E:\myWork\IP\releaseVerify\version\1.9.11\Advanced_FIR_Filter_RefDesign\1_fir_singlerate\32taps_8chn_32tdm_16bit\proj\src\fir_proj.sdc
Tool Version V1.9.11 (64-bit)
Part Number GW5A-LV25UG324ES
Device GW5A-25
Device Version A
Created Time Tue Dec 24 17:58:01 2024
Legal Announcement Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.

Configure Information:

Grade Commercial
Process Typical
Ambient Temperature 25.000
Use Custom Theta JA false
Heat Sink None
Air Flow LFM_0
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Related Vcd File
Related Saif File
Filter Glitches false
Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125

Power Summary

Power Information:

Total Power (mW) 89.353
Quiescent Power (mW) 53.536
Dynamic Power (mW) 35.817

Thermal Information:

Junction Temperature 27.448
Theta JA 27.400
Max Allowed Ambient Temperature 82.552

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 0.900 24.961 30.024 49.487
VCCX 3.300 2.023 3.000 16.576
VCCIO33 3.300 2.023 1.035 10.091
VCC_LDO 3.300 0.000 4.000 13.200

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 0.935 NA 10.875
IO 27.856 12.689 14.184
BSRAM 17.211 NA NA
DSP 2.504 NA 1.320

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
tb_gw5a 20.650 20.650(20.649)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/ 8.637 8.637(8.637)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/ 8.637 8.637(8.637)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/ 8.637 8.637(8.408)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/coeff_rom_inst/ 0.014 0.014(0.000)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/data_round_inst/ 0.006 0.006(0.000)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/gen_adder_tree_layer0[0].adder_inst/ 0.019 0.019(0.000)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/gen_adder_tree_layer1[0].adder_inst/ 0.019 0.019(0.000)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/gen_mult_dsp[0].mult_dsp_inst/ 2.505 2.505(0.000)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/gen_spram_coeff[0].spram_coeff_inst/ 0.204 0.204(0.000)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/gen_spram_shift[0].spram_shift_inst/ 5.588 5.588(0.000)
tb_gw5a/Advanced_FIR_Filter_Top_isnt/advanced_fir_filter_inst/fir_singlerate_inst/spram_data_inst/ 0.053 0.053(0.000)
tb_gw5a/gw_gao_inst_0/ 6.547 6.547(6.547)
tb_gw5a/gw_gao_inst_0/u_icon_top/ 0.002 0.002(0.000)
tb_gw5a/gw_gao_inst_0/u_la0_top/ 6.545 6.545(6.497)
tb_gw5a/gw_gao_inst_0/u_la0_top/u_ao_crc32/ 0.004 0.004(0.000)
tb_gw5a/gw_gao_inst_0/u_la0_top/u_ao_match_0/ 0.001 0.001(0.000)
tb_gw5a/gw_gao_inst_0/u_la0_top/u_ao_mem_ctrl/ 6.492 6.492(0.000)
tb_gw5a/sim_input_gen_inst/ 0.063 0.063(0.000)
tb_gw5a/sim_output_storage_inst/ 5.402 5.402(5.379)
tb_gw5a/sim_output_storage_inst/spram_dout_inst/ 5.379 5.379(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
clk 100.000 19.540
tck_pad_i 20.000 1.110
NO CLOCK DOMAIN 0.000 0.000