Hierarchy Module Resource

MODULE NAME REG NUMBER ALU NUMBER LUT NUMBER DSP NUMBER BSRAM NUMBER SSRAM NUMBER ROM16 NUMBER
ddr3_syn_top (E:/myWork/IP/releaseVerify/RefDesign/Memory_Control/DDR3/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_MC_PHY_1vs2/project/src/ddr3_syn_top.v) 26 - 57 - - - -
    |--u_rd (E:/myWork/IP/releaseVerify/RefDesign/Memory_Control/DDR3/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_MC_PHY_1vs2/project/src/ddr3_syn_top.v) 123 32 230 - - - -
    |--pll (E:/myWork/IP/releaseVerify/RefDesign/Memory_Control/DDR3/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_MC_PHY_1vs2/project/src/ddr3_syn_top.v) - - - - - - -
    |--gw_gao_inst_0 (E:/myWork/IP/releaseVerify/RefDesign/Memory_Control/DDR3/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_MC_PHY_1vs2/project/impl/gwsynthesis/RTL_GAO/gw_gao_top.v) 920 13 569 - 10 - -
    |--u_ddr3 (E:/myWork/IP/releaseVerify/RefDesign/Memory_Control/DDR3/Gowin_DDR3_Memory_Interface_RefDesign/DDR3_MC_PHY_1vs2/project/src/ddr3_syn_top.v) 1050 90 1191 - 4 46 -