PnR Messages

Report Title PnR Report
Design File E:\myWork\IP\releaseVerify\RefDesign\Memory_Control\DDR3\Gowin_DDR3_Memory_Interface_RefDesign\DDR3_MC_PHY_1vs4_5a138k\project\impl\gwsynthesis\ddr3_1v4_hs.vg
Physical Constraints File E:\myWork\IP\releaseVerify\RefDesign\Memory_Control\DDR3\Gowin_DDR3_Memory_Interface_RefDesign\DDR3_MC_PHY_1vs4_5a138k\project\src\ddr3_1v4_hs.cst
Timing Constraints File E:\myWork\IP\releaseVerify\RefDesign\Memory_Control\DDR3\Gowin_DDR3_Memory_Interface_RefDesign\DDR3_MC_PHY_1vs4_5a138k\project\src\ddr3_1v4_hs.sdc
Tool Version V1.9.9.02
Part Number GW5AST-LV138FPG676AES
Device GW5AST-138
Device Version B
Created Time Tue Mar 26 14:39:27 2024
Legal Announcement Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.

PnR Details

Place & Route Process Running placement: Placement Phase 0: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s Placement Phase 1: CPU time = 0h 0m 0.201s, Elapsed time = 0h 0m 0.201s Placement Phase 2: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s Placement Phase 3: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s Total Placement: CPU time = 0h 0m 7s, Elapsed time = 0h 0m 7s Running routing: Routing Phase 0: CPU time = 0h 0m 0.755s, Elapsed time = 0h 0m 0.755s Routing Phase 1: CPU time = 0h 0m 39s, Elapsed time = 0h 0m 39s Routing Phase 2: CPU time = 0h 0m 0.421s, Elapsed time = 0h 0m 0.421s Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Total Routing: CPU time = 0h 0m 40s, Elapsed time = 0h 0m 40s Generate output files: CPU time = 0h 0m 12s, Elapsed time = 0h 0m 12s
Total Time and Memory Usage CPU time = 0h 1m 0s, Elapsed time = 0h 1m 0s, Peak memory usage = 1471MB

Resource

Resource Usage Summary:

Resource Usage Utilization
Logic 4199/138240 4%
    --LUT,ALU,ROM16 4199(3731 LUT, 468 ALU, 0 ROM16) -
    --SSRAM(RAM16) 0 -
Register 6293/139140 5%
    --Logic Register as Latch 0/138240 0%
    --Logic Register as FF 6292/138240 5%
    --I/O Register as Latch 0/900 0%
    --I/O Register as FF 1/900 <1%
CLS 4732/69120 7%
I/O Port 75 -
I/O Buf 70 -
    --Input Buf 1 -
    --Output Buf 33 -
    --Inout Buf 36 -
IOLOGIC 32 IDES8_MEM
24 OSER8
40 OSER8_MEM
32 IODELAY
32%
BSRAM 8 SDPB
16 SDPX9B
8%
DSP 00%
PLL 1/12 9%
DDRDLL 1/4 25%
DCS 0/20 0%
DQCE 0/76 0%
OSC 0/1 0%
CLKDIV 1/24 5%
DLLDLY 0/12 0%
DQS 4/24 17%
DHCEN 0/24 0%

I/O Bank Usage Summary:

I/O Bank Usage
bank 2 0/50(0%)
bank 3 5/50(10%)
bank 4 0/50(0%)
bank 5 0/50(0%)
bank 6 44/50(88%)
bank 7 26/50(52%)
bank 10 0/11(0%)

Global Clock Usage Summary:

Global Clock Usage
PRIMARY 2/8(25%)
LW 1/8(13%)
GCLK_PIN 9/24(38%)
PLL 1/12(9%)
CLKDIV 1/24(5%)
DLLDLY 0/12(0%)

Global Clock Signals:

Signal Global Clock Location
clk_d PRIMARY PTR0 PTR1 PTR2
clk_x1 PRIMARY PTR0 PTR1 PTR2 PBR0 PBR1 PBR2
u_ddr3/gw3_top/ddr_rst LW -
memory_clk HCLK -

Pinout by Port Name:

Port Name Diff Pair Loc./Bank Constraint Dir. Site IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Vref Single Resistor Diff Resistor BankVccio Pull Strength
clk P16/3 Y in IOR103[B] LVCMOS33 OFF NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
error R20/3 Y out IOR69[A] LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
error1 N21/3 Y out IOR80[A] LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
led N22/3 Y out IOR80[B] LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
init_calib_complete P20/3 Y out IOR78[A] LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
ddr_addr[0] N1/7 Y out IOL35[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[1] R1/7 Y out IOL22[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[2] R2/7 Y out IOL17[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[3] N2/7 Y out IOL29[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[4] P1/7 Y out IOL22[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[5] T2/7 Y out IOL17[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[6] N4/7 Y out IOL26[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[7] U1/7 Y out IOL15[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[8] T4/7 Y out IOL20[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[9] T3/7 Y out IOL20[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[10] M1/7 Y out IOL35[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[11] P4/7 Y out IOL26[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[12] N3/7 Y out IOL29[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_addr[13] U2/7 Y out IOL15[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_bank[0] M4/7 Y out IOL49[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_bank[1] L5/7 Y out IOL47[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_bank[2] K3/7 Y out IOL51[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_cs L4/7 Y out IOL49[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_ras H2/7 Y out IOL40[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_cas H1/7 Y out IOL40[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_we J3/7 Y out IOL51[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_ck ddr_ck_n M2,L2/7 Y out IOL31 SSTL15D 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_cke L3/7 Y out IOL38[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_odt J1/7 Y out IOL33[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_reset_n N8/7 Y out IOL55[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_dm[0] F4/6 Y out IOL78[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_dm[1] H9/6 Y out IOL107[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_dm[2] E3/6 Y out IOL89[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_dm[3] A3/6 Y out IOL67[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
ddr_dq[0] G4/6 Y io IOL78[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[1] J6/6 Y io IOL74[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[2] L8/6 Y io IOL76[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[3] G5/6 Y io IOL80[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[4] K7/6 Y io IOL71[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[5] J5/6 Y io IOL74[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[6] K8/6 Y io IOL76[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[7] K6/6 Y io IOL71[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[8] E6/6 Y io IOL101[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[9] H8/6 Y io IOL103[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[10] H6/6 Y io IOL98[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[11] G8/6 Y io IOL103[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[12] D6/6 Y io IOL101[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[13] F8/6 Y io IOL105[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[14] G6/6 Y io IOL98[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[15] F7/6 Y io IOL105[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[16] C4/6 Y io IOL85[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[17] F3/6 Y io IOL89[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[18] B4/6 Y io IOL87[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[19] E5/6 Y io IOL83[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[20] D3/6 Y io IOL92[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[21] D5/6 Y io IOL83[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[22] A4/6 Y io IOL87[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[23] D4/6 Y io IOL85[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[24] E1/6 Y io IOL62[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[25] A2/6 Y io IOL67[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[26] G2/6 Y io IOL56[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[27] C2/6 Y io IOL60[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[28] F2/6 Y io IOL58[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[29] E2/6 Y io IOL58[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[30] G1/6 Y io IOL56[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dq[31] D1/6 Y io IOL62[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
ddr_dqs[0] ddr_dqs_n[0] J4,H4/6 Y io IOL69 SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
ddr_dqs[1] ddr_dqs_n[1] H7,G7/6 Y io IOL96 SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
ddr_dqs[2] ddr_dqs_n[2] B5,A5/6 Y io IOL94 SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
ddr_dqs[3] ddr_dqs_n[3] C1,B1/6 Y io IOL65 SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM

All Package Pins:

Loc./Bank Signal Dir. Site IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Vref Single Resistor Diff Resistor Bank Vccio Pull Strength
E22/5 - in IOB37[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D23/5 - in IOB38[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D24/5 - in IOB38[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
C24/5 - in IOB40[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
B24/5 - in IOB40[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
A23/5 - in IOB42[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
A24/5 - in IOB42[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
B25/5 - in IOB44[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
A25/5 - in IOB44[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
C26/5 - in IOB47[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
B26/5 - in IOB47[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
C22/5 - in IOB49[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
C23/5 - in IOB49[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
C17/5 - in IOB51[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
B17/5 - in IOB51[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
E16/5 - in IOB53[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D16/5 - in IOB53[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
A17/5 - in IOB56[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
A18/5 - in IOB56[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
B19/5 - in IOB58[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
A19/5 - in IOB58[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
E17/5 - in IOB60[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
E18/5 - in IOB60[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D18/5 - in IOB62[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
C18/5 - in IOB62[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D19/5 - in IOB66[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
C19/5 - in IOB66[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
E20/5 - in IOB68[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D20/5 - in IOB68[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
B20/5 - in IOB70[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
A20/5 - in IOB70[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
C21/5 - in IOB72[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
B21/5 - in IOB72[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
B22/5 - in IOB74[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
A22/5 - in IOB74[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
E21/5 - in IOB76[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D21/5 - in IOB76[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G15/5 - in IOB78[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F15/5 - in IOB78[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G17/5 - in IOB80[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F17/5 - in IOB80[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H14/5 - in IOB83[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H15/5 - in IOB83[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H16/5 - in IOB85[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G16/5 - in IOB85[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G19/5 - in IOB87[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F20/5 - in IOB87[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F18/5 - in IOB89[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F19/5 - in IOB89[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H17/5 - in IOB91[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L19/4 - in IOB92[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M14/4 - in IOB93[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L14/4 - in IOB93[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M15/4 - in IOB95[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L15/4 - in IOB95[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J14/4 - in IOB97[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J15/4 - in IOB97[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K15/4 - in IOB99[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J16/4 - in IOB99[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M16/4 - in IOB102[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M17/4 - in IOB102[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K16/4 - in IOB104[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K17/4 - in IOB104[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K22/4 - in IOB106[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K23/4 - in IOB106[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F23/4 - in IOB108[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
E23/4 - in IOB108[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G22/4 - in IOB110[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F22/4 - in IOB110[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J24/4 - in IOB112[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H24/4 - in IOB112[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J23/4 - in IOB114[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H23/4 - in IOB114[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H21/4 - in IOB116[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H22/4 - in IOB116[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G20/4 - in IOB120[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G21/4 - in IOB120[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K21/4 - in IOB122[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J21/4 - in IOB122[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L17/4 - in IOB124[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L18/4 - in IOB124[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J19/4 - in IOB126[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H19/4 - in IOB126[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J18/4 - in IOB129[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H18/4 - in IOB129[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K20/4 - in IOB131[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J20/4 - in IOB131[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
E25/4 - in IOB133[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D25/4 - in IOB133[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
E26/4 - in IOB135[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
D26/4 - in IOB135[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H26/4 - in IOB138[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G26/4 - in IOB138[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G24/4 - in IOB140[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F24/4 - in IOB140[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J25/4 - in IOB142[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J26/4 - in IOB142[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
G25/4 - in IOB144[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
F25/4 - in IOB144[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K18/4 - in IOB146[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
J10/10 - out IOB169[A] LVCMOS33 8 UP OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
H11/10 - in IOB169[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V11/10 - in IOB171[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W10/10 - in IOB171[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H12/10 - in IOB173[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H10/10 - in IOB173[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AB7/10 - in IOB175[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
H13/10 - in IOB175[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
Y9/10 - in IOB177[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W9/10 - in IOB177[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AB15/10 - in IOB179[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AE16/10 - in IOB179[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U4/7 - in IOL1[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
T8/7 - in IOL2[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
T7/7 - in IOL2[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
U6/7 - in IOL4[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
U5/7 - in IOL4[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
T5/7 - in IOL6[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
R5/7 - in IOL6[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
R7/7 - in IOL8[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
R6/7 - in IOL8[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
P6/7 - in IOL11[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
P5/7 - in IOL11[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
R8/7 - in IOL13[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
P8/7 - in IOL13[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
U2/7 ddr_addr[13] out IOL15[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
U1/7 ddr_addr[7] out IOL15[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
T2/7 ddr_addr[5] out IOL17[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
R2/7 ddr_addr[2] out IOL17[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
T4/7 ddr_addr[8] out IOL20[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
T3/7 ddr_addr[9] out IOL20[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
R1/7 ddr_addr[1] out IOL22[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
P1/7 ddr_addr[4] out IOL22[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
R3/7 - in IOL24[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
P3/7 - in IOL24[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
P4/7 ddr_addr[11] out IOL26[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
N4/7 ddr_addr[6] out IOL26[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
N3/7 ddr_addr[12] out IOL29[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
N2/7 ddr_addr[3] out IOL29[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
M2/7 ddr_ck out IOL31[A] SSTL15D 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
L2/7 ddr_ck_n out IOL31[B] SSTL15D 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
K1/7 - in IOL33[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
J1/7 ddr_odt out IOL33[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
N1/7 ddr_addr[0] out IOL35[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
M1/7 ddr_addr[10] out IOL35[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
L3/7 ddr_cke out IOL38[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
K2/7 - in IOL38[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
H2/7 ddr_ras out IOL40[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
H1/7 ddr_cas out IOL40[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
N7/7 - in IOL42[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
N6/7 - in IOL42[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
M6/7 - in IOL44[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
M5/7 - in IOL44[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
L5/7 ddr_bank[1] out IOL47[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
K5/7 - in IOL47[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
M4/7 ddr_bank[0] out IOL49[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
L4/7 ddr_cs out IOL49[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
K3/7 ddr_bank[2] out IOL51[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
J3/7 ddr_we out IOL51[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
M7/7 - in IOL53[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
L7/7 - in IOL53[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
N8/7 ddr_reset_n out IOL55[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
G2/6 ddr_dq[26] io IOL56[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
G1/6 ddr_dq[30] io IOL56[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
F2/6 ddr_dq[28] io IOL58[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
E2/6 ddr_dq[29] io IOL58[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
C2/6 ddr_dq[27] io IOL60[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
B2/6 - in IOL60[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
E1/6 ddr_dq[24] io IOL62[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
D1/6 ddr_dq[31] io IOL62[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
C1/6 ddr_dqs[3] io IOL65[A] SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
B1/6 ddr_dqs_n[3] io IOL65[B] SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
A3/6 ddr_dm[3] out IOL67[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
A2/6 ddr_dq[25] io IOL67[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
J4/6 ddr_dqs[0] io IOL69[A] SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
H4/6 ddr_dqs_n[0] io IOL69[B] SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
K7/6 ddr_dq[4] io IOL71[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
K6/6 ddr_dq[7] io IOL71[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
H3/6 - in IOL73[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
J6/6 ddr_dq[1] io IOL74[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
J5/6 ddr_dq[5] io IOL74[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
L8/6 ddr_dq[2] io IOL76[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
K8/6 ddr_dq[6] io IOL76[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
G4/6 ddr_dq[0] io IOL78[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
F4/6 ddr_dm[0] out IOL78[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
G5/6 ddr_dq[3] io IOL80[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
F5/6 - in IOL80[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
E5/6 ddr_dq[19] io IOL83[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
D5/6 ddr_dq[21] io IOL83[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
D4/6 ddr_dq[23] io IOL85[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
C4/6 ddr_dq[16] io IOL85[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
B4/6 ddr_dq[18] io IOL87[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
A4/6 ddr_dq[22] io IOL87[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
F3/6 ddr_dq[17] io IOL89[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
E3/6 ddr_dm[2] out IOL89[B] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
D3/6 ddr_dq[20] io IOL92[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
C3/6 - in IOL92[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
B5/6 ddr_dqs[2] io IOL94[A] SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
A5/6 ddr_dqs_n[2] io IOL94[B] SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
H7/6 ddr_dqs[1] io IOL96[A] SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
G7/6 ddr_dqs_n[1] io IOL96[B] SSTL15D 8 NONE OFF NONE OFF OFF OFF OFF 1.5 MEDIUM
H6/6 ddr_dq[10] io IOL98[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
G6/6 ddr_dq[14] io IOL98[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
E6/6 ddr_dq[8] io IOL101[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
D6/6 ddr_dq[12] io IOL101[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
H8/6 ddr_dq[9] io IOL103[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
G8/6 ddr_dq[11] io IOL103[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
F8/6 ddr_dq[13] io IOL105[A] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
F7/6 ddr_dq[15] io IOL105[B] SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM
H9/6 ddr_dm[1] out IOL107[A] SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM
G9/6 - in IOL107[B] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
J8/6 - in IOL109[A] LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM
U17/2 - in IOR1[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V16/2 - in IOR2[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V17/2 - in IOR2[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V18/2 - in IOR4[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W18/2 - in IOR4[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U15/2 - in IOR6[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U16/2 - in IOR6[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T17/2 - in IOR8[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T18/2 - in IOR8[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U14/2 - in IOR11[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V14/2 - in IOR11[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T14/2 - in IOR13[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T15/2 - in IOR13[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V19/2 - in IOR15[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W19/2 - in IOR15[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W20/2 - in IOR17[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
Y20/2 - in IOR17[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T20/2 - in IOR20[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U20/2 - in IOR20[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T19/2 - in IOR22[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U19/2 - in IOR22[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W21/2 - in IOR24[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
Y21/2 - in IOR24[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U21/2 - in IOR26[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V21/2 - in IOR26[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
Y22/2 - in IOR29[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
Y23/2 - in IOR29[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U22/2 - in IOR31[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V22/2 - in IOR31[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AA22/2 - in IOR33[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AA23/2 - in IOR33[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AB24/2 - in IOR35[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AC24/2 - in IOR35[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V23/2 - in IOR38[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W23/2 - in IOR38[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AA24/2 - in IOR40[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AB25/2 - in IOR40[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
Y25/2 - in IOR42[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AA25/2 - in IOR42[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AB26/2 - in IOR44[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
AC26/2 - in IOR44[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V24/2 - in IOR47[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W24/2 - in IOR47[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W25/2 - in IOR49[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
Y26/2 - in IOR49[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
V26/2 - in IOR51[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
W26/2 - in IOR51[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U25/2 - in IOR53[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U26/2 - in IOR53[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
U24/2 - in IOR55[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T22/3 - in IOR56[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R22/3 - in IOR56[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T24/3 - in IOR58[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T25/3 - in IOR58[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R25/3 - in IOR60[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P25/3 - in IOR60[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
T23/3 - in IOR62[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R23/3 - in IOR62[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R26/3 - in IOR65[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P26/3 - in IOR65[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N26/3 - in IOR67[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M26/3 - in IOR67[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R20/3 error out IOR69[A] LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
R21/3 - in IOR69[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P19/3 - in IOR71[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N19/3 - in IOR71[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R18/3 - in IOR73[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P23/3 - in IOR74[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P24/3 - in IOR74[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N23/3 - in IOR76[A] LVCMOS33 8 DOWN OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N24/3 - out IOR76[B] LVCMOS33 8 UP OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
P20/3 init_calib_complete out IOR78[A] LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
P21/3 - in IOR78[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N21/3 error1 out IOR80[A] LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
N22/3 led out IOR80[B] LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM
M21/3 - in IOR83[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M22/3 - in IOR83[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L22/3 - in IOR85[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L23/3 - in IOR85[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M24/3 - in IOR87[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M25/3 - in IOR87[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L24/3 - in IOR89[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L25/3 - in IOR89[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M20/3 - in IOR92[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
L20/3 - in IOR92[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K25/3 - in IOR94[A] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
K26/3 - in IOR94[B] LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P18/3 - in IOR96[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N18/3 - in IOR96[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R16/3 - in IOR98[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R17/3 - in IOR98[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N16/3 - in IOR101[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N17/3 - in IOR101[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P15/3 - in IOR103[A] LVCMOS33 8 DOWN OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P16/3 clk in IOR103[B] LVCMOS33 OFF NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R14/3 - in IOR105[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
R15/3 - in IOR105[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
P14/3 - in IOR107[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
N14/3 - in IOR107[B] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM
M19/3 - in IOR109[A] LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM