Synthesis Messages
| Report Title | GowinSynthesis Report |
| Design File | D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\ahb_def_slave.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\ahb_s_mux.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\ahb_to_sram.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\BusMatrix.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_bus_matrix.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_cdc_capt_sync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_cdc_connect.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_cdc_random.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_clk_gate.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_code_mux.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_mst.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_slv.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_sync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dap_ahb_ap_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_16bit_dec.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_32bit_dec.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu_bshift.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu_ctl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu_dp.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_alu_srtdiv.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_br_dec.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_dec.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_etmintf.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_exec.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_fetch.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_fetch_ahbintf.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_fetch_ctl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_lsu.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_lsu_ahbintf.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_lsu_ctl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_regbank.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_regfile.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_status.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dpu_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_apb_if.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_comp.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_packet_gen.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_packet_state.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_dwt_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_apb_if.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_clk_gate.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_control_reg.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_event_gen.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_fifo.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_gen.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_res_control.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_sync_count.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trace.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trace_out.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trc_en.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trig_gen.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_trigger.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_etm_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_example_pmu.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_flash_mux.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_fpb.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_fpb_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_fpb_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_htm_port.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_arb.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_emit.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_fifo.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_fifo_byte.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_if.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_itm_ts.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_lic_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_ahb_ctl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_align.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_comp.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_default.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_full.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_maskgen.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_ppb_intf.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_region.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_regions.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mpu_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_bit_master.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_decode_dap.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_decode_dcore.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_decode_icore.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_input_stage_dap.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_input_stage_dcore.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_input_stage_icore.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_output_stage_dcode.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_output_stage_icode.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_output_stage_ppb.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_output_stage_sys.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_mtx_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_cell.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_int_state.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_main.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_ppb_intf.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_preempt.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_reg.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_tree.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_nvic_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_ppb_ahb_to_apb.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_ppb_decoder.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_rom_table.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_sync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_apb_if.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_atb_fifo.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_atb_sync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_formatter.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_trace_clk.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_trace_fifo.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_trace_out.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_trace_sync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_tpiu_undefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cm3_wic.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\CM3ETM.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_miim_wrapper.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_rx_buffer_to_ahb.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_rx_to_buffer.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_rx_wrapper.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_sdp_wrapper_32bit.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_top.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_tx_wrapper.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_ethmac_wrapper.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_gpio.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_ahbif_ctrl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_arbiter.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_async_fifo_clr.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_config.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_const.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_ctrl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_eilmif_ctrl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_fifo.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_gck.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_pad_lib.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_reg.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_regif.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_regif_ctrl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_spiif.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_sync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_sync_l2l.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_spi_flash_sync_p2p.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_ahb_to_iop.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_spi.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_timer.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_uart.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_watchdog.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_watchdog_defs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_apb_watchdog_frc.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\cmsdk_iop_gpio.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\CORTEXM3.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\CORTEXM3INTEGRATION.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpApbDefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpApbIfClamp.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpApbSync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpClamp0.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpEnSync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpIMux.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPDpSync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPJtagDpDefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPJtagDpProtocol.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwDpApbIf.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwDpDefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwDpProtocol.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwDpSync.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSWJDP.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwjDpDefs.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DAPSwjWatcher.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\ddr3_1_4code.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DDR3_define.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\ddr3_name.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\ddr3_to_ahb_top.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\DDR3_TOP.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\dtcm.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\Gowin_EMPU_M3_top.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\GowinAhbExt.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\GowinCM3AhbExt.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\GowinCM3AhbExtWrapper.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\gw_apb_i2c.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\gw_apb_int_wrapper.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\gw_apb_sd.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\gw_gpio.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\InputStage.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\itcm.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\m3_top.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\MatrixDecodeS0.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\MatrixDecodeS1.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\MatrixDecodeS2.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\OutputArb1.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\OutputArb2.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\OutputArb3.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\OutputStage1.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\OutputStage2.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\OutputStage3.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\p_sse050_interconnect_f0_ahb_to_apb.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\p_sse050_interconnect_f0_apb_slave_mux.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\Rtc.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\RtcApbif.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\RtcControl.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\RtcCounter.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\RtcInterrupt.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\RtcParams.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\RtcRevAnd.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\RtcSynctoPCLK.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\RtcUpdate.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\sse050_int_apb_decoder.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\sse050_integration_peripherals.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\sync_p2p.v D:\Gowin\Gowin_V1.9.8Beta\IDE\ipcore\GOWIN_EMPU_M3\data\triple_speed_mac_name.v F:\EMB_pub\embedded\cortex_m3\ref_design\1.0.1\fpga_ref_design\DK_START_GW2A55_V1.3\gowin_empu_m3\src\gowin_empu_m3\temp\gw_empu_m3\cm3_option_defs.v F:\EMB_pub\embedded\cortex_m3\ref_design\1.0.1\fpga_ref_design\DK_START_GW2A55_V1.3\gowin_empu_m3\src\gowin_empu_m3\temp\gw_empu_m3\ahb_option_defs.v F:\EMB_pub\embedded\cortex_m3\ref_design\1.0.1\fpga_ref_design\DK_START_GW2A55_V1.3\gowin_empu_m3\src\gowin_empu_m3\temp\gw_empu_m3\triple_speed_mac_param.v F:\EMB_pub\embedded\cortex_m3\ref_design\1.0.1\fpga_ref_design\DK_START_GW2A55_V1.3\gowin_empu_m3\src\gowin_empu_m3\temp\gw_empu_m3\triple_speed_mac_define.v |
| GowinSynthesis Constraints File | --- |
| GowinSynthesis Version | GowinSynthesis V1.9.8Beta |
| Part Number | GW2A-LV55PG484C8/I7 |
| Device | GW2A-55C |
| Created Time | Fri Jul 16 15:17:31 2021 |
| Legal Announcement | Copyright (C)2014-2021 Gowin Semiconductor Corporation. ALL rights reserved. |
Synthesis Details
| Top Level Module | Gowin_EMPU_M3_Top |
| Synthesis Process | Running parser: CPU time = 0h 0m 8s, Elapsed time = 0h 0m 10s, Peak memory usage = 324.711MB Running netlist conversion: CPU time = 0h 0m 0.89s, Elapsed time = 0h 0m 0.985s, Peak memory usage = 324.711MB Running device independent optimization: Optimizing Phase 0: CPU time = 0h 0m 7s, Elapsed time = 0h 0m 8s, Peak memory usage = 324.711MB Optimizing Phase 1: CPU time = 0h 0m 7s, Elapsed time = 0h 0m 7s, Peak memory usage = 324.711MB Optimizing Phase 2: CPU time = 0h 0m 7s, Elapsed time = 0h 0m 7s, Peak memory usage = 324.711MB Running inference: Inferring Phase 0: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s, Peak memory usage = 324.711MB Inferring Phase 1: CPU time = 0h 0m 0.234s, Elapsed time = 0h 0m 0.365s, Peak memory usage = 324.711MB Inferring Phase 2: CPU time = 0h 0m 0.312s, Elapsed time = 0h 0m 0.372s, Peak memory usage = 324.711MB Inferring Phase 3: CPU time = 0h 0m 0.078s, Elapsed time = 0h 0m 0.116s, Peak memory usage = 324.711MB Running technical mapping: Tech-Mapping Phase 0: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s, Peak memory usage = 324.711MB Tech-Mapping Phase 1: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s, Peak memory usage = 324.711MB Tech-Mapping Phase 2: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s, Peak memory usage = 324.711MB Tech-Mapping Phase 3: CPU time = 0h 2m 35s, Elapsed time = 0h 2m 36s, Peak memory usage = 324.711MB Tech-Mapping Phase 4: CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s, Peak memory usage = 324.711MB Generate output files: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 4s, Peak memory usage = 324.711MB |
| Total Time and Memory Usage | CPU time = 0h 3m 23s, Elapsed time = 0h 3m 29s, Peak memory usage = 324.711MB |
Resource
Resource Usage Summary
| Resource | Usage |
| I/O Port | 286 |
| I/O Buf | 285 |
| IBUF | 79 |
| OBUF | 181 |
| IOBUF | 25 |
| Register | 6630 |
| DFF | 8 |
| DFFE | 75 |
| DFFR | 3 |
| DFFP | 38 |
| DFFPE | 255 |
| DFFC | 540 |
| DFFCE | 5693 |
| DFFNPE | 7 |
| DFFNC | 2 |
| DFFNCE | 7 |
| DL | 1 |
| DLN | 1 |
| LUT | 26004 |
| LUT2 | 2240 |
| LUT3 | 6543 |
| LUT4 | 17221 |
| ALU | 1470 |
| ALU | 1470 |
| SSRAM | 20 |
| RAM16S4 | 4 |
| RAM16SDP4 | 16 |
| INV | 50 |
| INV | 50 |
| DSP | 1 |
| MULT36X36 | 1 |
| BSRAM | 64 |
| SP | 32 |
| SDPB | 32 |
Resource Utilization Summary
| Resource | Usage | Utilization |
| Logic | 27644(26054 LUTs, 1470 ALUs, 20 SSRAMs) / 54720 | 51% |
| Register | 6630 / 41997 | 16% |
| --Register as Latch | 2 / 41997 | 1% |
| --Register as FF | 6628 / 41997 | 16% |
| BSRAM | 64 / 140 | 46% |
Timing
Clock Summary:
| Clock Name | Type | Period | Frequency(MHz) | Rise | Fall | Source | Master | Object |
|---|---|---|---|---|---|---|---|---|
| HCLK | Base | 10.000 | 100.0 | 0.000 | 5.000 | HCLK_ibuf/I | ||
| JTAG_9 | Base | 10.000 | 100.0 | 0.000 | 5.000 | JTAG_9_ibuf/I | ||
| RTCSRCCLK | Base | 10.000 | 100.0 | 0.000 | 5.000 | RTCSRCCLK_ibuf/I | ||
| rtc_1hz_clk_6 | Base | 10.000 | 100.0 | 0.000 | 5.000 | u_GowinCM3AhbExtWrapper/u_GowinCM3AhbExt/rtc_1hz_clk_s2/Q | ||
| n344_6 | Base | 10.000 | 100.0 | 0.000 | 5.000 | u_GowinCM3AhbExtWrapper/u_GowinCM3AhbExt/u_spi1/u_spi_spiif/n344_s2/F |
Max Frequency Summary:
| No. | Clock Name | Constraint | Actual Fmax | Logic Level | Entity |
|---|---|---|---|---|---|
| 1 | HCLK | 100.0(MHz) | 47.6(MHz) | 29 | TOP |
| 2 | JTAG_9 | 100.0(MHz) | 110.0(MHz) | 13 | TOP |
| 3 | RTCSRCCLK | 100.0(MHz) | 189.0(MHz) | 8 | TOP |
| 4 | rtc_1hz_clk_6 | 100.0(MHz) | 129.1(MHz) | 12 | TOP |
Detail Timing Paths Information
Path 1
Path Summary:| Slack | -10.992 |
| Data Arrival Time | 21.820 |
| Data Required Time | 10.828 |
| From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
| To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_5_s0 |
| Launch Clk | HCLK[R] |
| Latch Clk | HCLK[R] |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 0.000 | 0.000 | HCLK | |||
| 0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 0.683 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
| 1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
| 1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
| 1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
| 1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
| 1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
| 1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
| 1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
| 1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
| 2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
| 2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
| 2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
| 2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
| 2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
| 2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
| 2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
| 2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
| 2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
| 2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
| 2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
| 2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
| 2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
| 2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
| 2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
| 2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
| 2.289 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/COUT |
| 2.289 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/CIN |
| 2.324 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/COUT |
| 2.324 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/CIN |
| 2.359 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/COUT |
| 2.359 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/CIN |
| 2.394 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/COUT |
| 2.394 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/CIN |
| 2.430 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/COUT |
| 2.430 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/CIN |
| 2.465 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/COUT |
| 2.465 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/CIN |
| 2.500 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/COUT |
| 2.500 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/CIN |
| 2.535 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/COUT |
| 2.535 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/CIN |
| 2.570 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/COUT |
| 2.570 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/CIN |
| 2.606 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/COUT |
| 2.606 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/CIN |
| 2.641 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/COUT |
| 2.641 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/CIN |
| 2.676 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/COUT |
| 2.676 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/CIN |
| 2.711 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/COUT |
| 2.711 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/CIN |
| 2.746 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/COUT |
| 2.746 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/CIN |
| 2.782 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/COUT |
| 2.782 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/CIN |
| 2.817 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/COUT |
| 2.817 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/CIN |
| 3.287 | 0.470 | tINS | FF | 24 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/SUM |
| 3.524 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/I1 |
| 4.079 | 0.555 | tINS | FF | 14 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/F |
| 4.316 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/I1 |
| 4.871 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/F |
| 5.108 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/I0 |
| 5.625 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/F |
| 5.862 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/I2 |
| 6.315 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/F |
| 6.552 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/I2 |
| 7.005 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/F |
| 7.242 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/I1 |
| 7.797 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/F |
| 8.034 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/I1 |
| 8.589 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/F |
| 8.826 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/I1 |
| 9.381 | 0.555 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/F |
| 9.618 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/S0 |
| 9.869 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/O |
| 10.106 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/I1 |
| 10.209 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/O |
| 10.446 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/I1 |
| 11.001 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/F |
| 11.238 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/I0 |
| 11.755 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/F |
| 11.992 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/I1 |
| 12.547 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/F |
| 12.784 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/I1 |
| 13.339 | 0.555 | tINS | FF | 9 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/F |
| 13.576 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/I0 |
| 14.093 | 0.517 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/F |
| 14.330 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/I1 |
| 14.885 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/F |
| 15.122 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/I1 |
| 15.677 | 0.555 | tINS | FF | 28 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/F |
| 15.914 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s0/I0 |
| 16.431 | 0.517 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s0/F |
| 16.668 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s/I0 |
| 17.185 | 0.517 | tINS | FF | 9 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s/F |
| 17.422 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s116/I2 |
| 17.875 | 0.453 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s116/F |
| 18.112 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s127/I2 |
| 18.565 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s127/F |
| 18.802 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s119/I1 |
| 19.357 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s119/F |
| 19.594 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s111/I1 |
| 20.149 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s111/F |
| 20.386 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s138/I0 |
| 20.903 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s138/F |
| 21.140 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s135/I1 |
| 21.243 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s135/O |
| 21.480 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s102/I0 |
| 21.583 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_5_s102/O |
| 21.820 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_5_s0/D |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 10.000 | 0.000 | HCLK | |||
| 10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 10.682 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_5_s0/CLK |
| 10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_5_s0 |
| Clock Skew: | 0.000 |
| Setup Relationship: | 10.000 |
| Logic Level: | 29 |
| Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
| Arrival Data Path Delay: | cell: 14.089, 67.228%; route: 6.636, 31.665%; tC2Q: 0.232, 1.107% |
| Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Path 2
Path Summary:| Slack | -10.974 |
| Data Arrival Time | 21.802 |
| Data Required Time | 10.828 |
| From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
| To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_0_s0 |
| Launch Clk | HCLK[R] |
| Latch Clk | HCLK[R] |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 0.000 | 0.000 | HCLK | |||
| 0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 0.683 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
| 1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
| 1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
| 1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
| 1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
| 1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
| 1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
| 1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
| 1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
| 2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
| 2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
| 2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
| 2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
| 2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
| 2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
| 2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
| 2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
| 2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
| 2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
| 2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
| 2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
| 2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
| 2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
| 2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
| 2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
| 2.289 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/COUT |
| 2.289 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/CIN |
| 2.324 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/COUT |
| 2.324 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/CIN |
| 2.359 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/COUT |
| 2.359 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/CIN |
| 2.394 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/COUT |
| 2.394 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/CIN |
| 2.430 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/COUT |
| 2.430 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/CIN |
| 2.465 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/COUT |
| 2.465 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/CIN |
| 2.500 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/COUT |
| 2.500 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/CIN |
| 2.535 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/COUT |
| 2.535 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/CIN |
| 2.570 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/COUT |
| 2.570 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/CIN |
| 2.606 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/COUT |
| 2.606 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/CIN |
| 2.641 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/COUT |
| 2.641 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/CIN |
| 2.676 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/COUT |
| 2.676 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/CIN |
| 2.711 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/COUT |
| 2.711 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/CIN |
| 2.746 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/COUT |
| 2.746 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/CIN |
| 2.782 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/COUT |
| 2.782 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/CIN |
| 2.817 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/COUT |
| 2.817 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/CIN |
| 3.287 | 0.470 | tINS | FF | 24 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/SUM |
| 3.524 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/I1 |
| 4.079 | 0.555 | tINS | FF | 14 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/F |
| 4.316 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/I1 |
| 4.871 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/F |
| 5.108 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/I0 |
| 5.625 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/F |
| 5.862 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/I2 |
| 6.315 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/F |
| 6.552 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/I2 |
| 7.005 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/F |
| 7.242 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/I1 |
| 7.797 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/F |
| 8.034 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/I1 |
| 8.589 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/F |
| 8.826 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/I1 |
| 9.381 | 0.555 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/F |
| 9.618 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/S0 |
| 9.869 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/O |
| 10.106 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/I1 |
| 10.209 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/O |
| 10.446 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/I1 |
| 11.001 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/F |
| 11.238 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/I0 |
| 11.755 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/F |
| 11.992 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/I1 |
| 12.547 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/F |
| 12.784 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/I1 |
| 13.339 | 0.555 | tINS | FF | 9 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/F |
| 13.576 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/I0 |
| 14.093 | 0.517 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/F |
| 14.330 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/I1 |
| 14.885 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/F |
| 15.122 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/I1 |
| 15.677 | 0.555 | tINS | FF | 28 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/F |
| 15.914 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s0/I0 |
| 16.431 | 0.517 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s0/F |
| 16.668 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s/I0 |
| 17.185 | 0.517 | tINS | FF | 9 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_exec/dbg_halt_set_Z_s/F |
| 17.422 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s133/I0 |
| 17.939 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s133/F |
| 18.176 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s127/I3 |
| 18.547 | 0.371 | tINS | FF | 8 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s127/F |
| 18.784 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s120/I1 |
| 19.339 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s120/F |
| 19.576 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s108/I1 |
| 20.131 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s108/F |
| 20.368 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s143/I0 |
| 20.885 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s143/F |
| 21.122 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s141/I0 |
| 21.225 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s141/O |
| 21.462 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s101/I0 |
| 21.565 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/nxt_state_0_s101/O |
| 21.802 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_0_s0/D |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 10.000 | 0.000 | HCLK | |||
| 10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 10.682 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_0_s0/CLK |
| 10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ctl/state_0_s0 |
| Clock Skew: | 0.000 |
| Setup Relationship: | 10.000 |
| Logic Level: | 29 |
| Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
| Arrival Data Path Delay: | cell: 14.071, 67.200%; route: 6.636, 31.692%; tC2Q: 0.232, 1.108% |
| Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Path 3
Path Summary:| Slack | -10.966 |
| Data Arrival Time | 21.794 |
| Data Required Time | 10.828 |
| From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
| To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_21_s0 |
| Launch Clk | HCLK[R] |
| Latch Clk | HCLK[R] |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 0.000 | 0.000 | HCLK | |||
| 0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 0.683 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
| 1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
| 1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
| 1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
| 1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
| 1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
| 1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
| 1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
| 1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
| 2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
| 2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
| 2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
| 2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
| 2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
| 2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
| 2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
| 2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
| 2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
| 2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
| 2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
| 2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
| 2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
| 2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
| 2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
| 2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
| 2.289 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/COUT |
| 2.289 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/CIN |
| 2.324 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/COUT |
| 2.324 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/CIN |
| 2.359 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/COUT |
| 2.359 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/CIN |
| 2.394 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/COUT |
| 2.394 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/CIN |
| 2.430 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/COUT |
| 2.430 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/CIN |
| 2.465 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/COUT |
| 2.465 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/CIN |
| 2.500 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/COUT |
| 2.500 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/CIN |
| 2.535 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/COUT |
| 2.535 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/CIN |
| 2.570 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/COUT |
| 2.570 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/CIN |
| 2.606 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/COUT |
| 2.606 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/CIN |
| 2.641 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/COUT |
| 2.641 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/CIN |
| 2.676 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/COUT |
| 2.676 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/CIN |
| 2.711 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/COUT |
| 2.711 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/CIN |
| 2.746 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/COUT |
| 2.746 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/CIN |
| 2.782 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/COUT |
| 2.782 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/CIN |
| 2.817 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/COUT |
| 2.817 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/CIN |
| 3.287 | 0.470 | tINS | FF | 24 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/SUM |
| 3.524 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/I1 |
| 4.079 | 0.555 | tINS | FF | 14 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/F |
| 4.316 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/I1 |
| 4.871 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/F |
| 5.108 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/I0 |
| 5.625 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/F |
| 5.862 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/I2 |
| 6.315 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/F |
| 6.552 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/I2 |
| 7.005 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/F |
| 7.242 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/I1 |
| 7.797 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/F |
| 8.034 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/I1 |
| 8.589 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/F |
| 8.826 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/I1 |
| 9.381 | 0.555 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/F |
| 9.618 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/S0 |
| 9.869 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/O |
| 10.106 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/I1 |
| 10.209 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/O |
| 10.446 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/I1 |
| 11.001 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/F |
| 11.238 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/I0 |
| 11.755 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/F |
| 11.992 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/I1 |
| 12.547 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/F |
| 12.784 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/I1 |
| 13.339 | 0.555 | tINS | FF | 9 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/F |
| 13.576 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/I0 |
| 14.093 | 0.517 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/F |
| 14.330 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/I1 |
| 14.885 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/F |
| 15.122 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/I1 |
| 15.677 | 0.555 | tINS | FF | 28 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/F |
| 15.914 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s/I1 |
| 16.469 | 0.555 | tINS | FF | 80 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s/F |
| 16.706 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ctl_s89/I2 |
| 17.159 | 0.453 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ctl_s89/F |
| 17.396 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_30_s124/I1 |
| 17.951 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_30_s124/F |
| 18.188 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_31_s135/I2 |
| 18.641 | 0.453 | tINS | FF | 30 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_31_s135/F |
| 18.878 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s112/I0 |
| 19.395 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s112/F |
| 19.632 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s104/I1 |
| 20.187 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s104/F |
| 20.424 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s130/I2 |
| 20.877 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s130/F |
| 21.114 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s128/I0 |
| 21.217 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s128/O |
| 21.454 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s95/I0 |
| 21.557 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_21_s95/O |
| 21.794 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_21_s0/D |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 10.000 | 0.000 | HCLK | |||
| 10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 10.682 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_21_s0/CLK |
| 10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_21_s0 |
| Clock Skew: | 0.000 |
| Setup Relationship: | 10.000 |
| Logic Level: | 29 |
| Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
| Arrival Data Path Delay: | cell: 14.063, 67.188%; route: 6.636, 31.704%; tC2Q: 0.232, 1.108% |
| Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Path 4
Path Summary:| Slack | -10.966 |
| Data Arrival Time | 21.794 |
| Data Required Time | 10.828 |
| From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
| To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_22_s0 |
| Launch Clk | HCLK[R] |
| Latch Clk | HCLK[R] |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 0.000 | 0.000 | HCLK | |||
| 0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 0.683 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
| 1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
| 1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
| 1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
| 1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
| 1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
| 1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
| 1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
| 1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
| 2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
| 2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
| 2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
| 2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
| 2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
| 2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
| 2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
| 2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
| 2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
| 2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
| 2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
| 2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
| 2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
| 2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
| 2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
| 2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
| 2.289 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/COUT |
| 2.289 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/CIN |
| 2.324 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/COUT |
| 2.324 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/CIN |
| 2.359 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/COUT |
| 2.359 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/CIN |
| 2.394 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/COUT |
| 2.394 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/CIN |
| 2.430 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/COUT |
| 2.430 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/CIN |
| 2.465 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/COUT |
| 2.465 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/CIN |
| 2.500 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/COUT |
| 2.500 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/CIN |
| 2.535 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/COUT |
| 2.535 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/CIN |
| 2.570 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/COUT |
| 2.570 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/CIN |
| 2.606 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/COUT |
| 2.606 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/CIN |
| 2.641 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/COUT |
| 2.641 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/CIN |
| 2.676 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/COUT |
| 2.676 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/CIN |
| 2.711 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/COUT |
| 2.711 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/CIN |
| 2.746 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/COUT |
| 2.746 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/CIN |
| 2.782 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/COUT |
| 2.782 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/CIN |
| 2.817 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/COUT |
| 2.817 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/CIN |
| 3.287 | 0.470 | tINS | FF | 24 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/SUM |
| 3.524 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/I1 |
| 4.079 | 0.555 | tINS | FF | 14 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/F |
| 4.316 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/I1 |
| 4.871 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/F |
| 5.108 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/I0 |
| 5.625 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/F |
| 5.862 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/I2 |
| 6.315 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/F |
| 6.552 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/I2 |
| 7.005 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/F |
| 7.242 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/I1 |
| 7.797 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/F |
| 8.034 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/I1 |
| 8.589 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/F |
| 8.826 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/I1 |
| 9.381 | 0.555 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/F |
| 9.618 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/S0 |
| 9.869 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/O |
| 10.106 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/I1 |
| 10.209 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/O |
| 10.446 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/I1 |
| 11.001 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/F |
| 11.238 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/I0 |
| 11.755 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/F |
| 11.992 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/I1 |
| 12.547 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/F |
| 12.784 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/I1 |
| 13.339 | 0.555 | tINS | FF | 9 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/F |
| 13.576 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/I0 |
| 14.093 | 0.517 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/F |
| 14.330 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/I1 |
| 14.885 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/F |
| 15.122 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/I1 |
| 15.677 | 0.555 | tINS | FF | 28 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/F |
| 15.914 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s/I1 |
| 16.469 | 0.555 | tINS | FF | 80 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s/F |
| 16.706 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ctl_s89/I2 |
| 17.159 | 0.453 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ctl_s89/F |
| 17.396 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_30_s124/I1 |
| 17.951 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_30_s124/F |
| 18.188 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_31_s135/I2 |
| 18.641 | 0.453 | tINS | FF | 30 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_31_s135/F |
| 18.878 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s112/I0 |
| 19.395 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s112/F |
| 19.632 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s104/I1 |
| 20.187 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s104/F |
| 20.424 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s128/I2 |
| 20.877 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s128/F |
| 21.114 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s126/I0 |
| 21.217 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s126/O |
| 21.454 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s95/I0 |
| 21.557 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_22_s95/O |
| 21.794 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_22_s0/D |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 10.000 | 0.000 | HCLK | |||
| 10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 10.682 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_22_s0/CLK |
| 10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_22_s0 |
| Clock Skew: | 0.000 |
| Setup Relationship: | 10.000 |
| Logic Level: | 29 |
| Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
| Arrival Data Path Delay: | cell: 14.063, 67.188%; route: 6.636, 31.704%; tC2Q: 0.232, 1.108% |
| Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
Path 5
Path Summary:| Slack | -10.966 |
| Data Arrival Time | 21.794 |
| Data Required Time | 10.828 |
| From | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0 |
| To | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_25_s0 |
| Launch Clk | HCLK[R] |
| Latch Clk | HCLK[R] |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 0.000 | 0.000 | HCLK | |||
| 0.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 0.683 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 0.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/CLK |
| 1.095 | 0.232 | tC2Q | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in2_ex_0_s0/Q |
| 1.332 | 0.237 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/I1 |
| 1.901 | 0.570 | tINS | FR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_0_s/COUT |
| 1.901 | 0.000 | tNET | RR | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/CIN |
| 1.937 | 0.035 | tINS | RF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_1_s/COUT |
| 1.937 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/CIN |
| 1.972 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ex_2_s/COUT |
| 1.972 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/CIN |
| 2.007 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_3_s/COUT |
| 2.007 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/CIN |
| 2.042 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_4_s/COUT |
| 2.042 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/CIN |
| 2.078 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_5_s/COUT |
| 2.078 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/CIN |
| 2.113 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_6_s/COUT |
| 2.113 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/CIN |
| 2.148 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_7_s/COUT |
| 2.148 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/CIN |
| 2.183 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_8_s/COUT |
| 2.183 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/CIN |
| 2.218 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_9_s/COUT |
| 2.218 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/CIN |
| 2.254 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_10_s/COUT |
| 2.254 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/CIN |
| 2.289 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_11_s/COUT |
| 2.289 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/CIN |
| 2.324 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_12_s/COUT |
| 2.324 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/CIN |
| 2.359 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_13_s/COUT |
| 2.359 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/CIN |
| 2.394 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_14_s/COUT |
| 2.394 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/CIN |
| 2.430 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_15_s/COUT |
| 2.430 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/CIN |
| 2.465 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_16_s/COUT |
| 2.465 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/CIN |
| 2.500 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_17_s/COUT |
| 2.500 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/CIN |
| 2.535 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_18_s/COUT |
| 2.535 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/CIN |
| 2.570 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_19_s/COUT |
| 2.570 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/CIN |
| 2.606 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_20_s/COUT |
| 2.606 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/CIN |
| 2.641 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_21_s/COUT |
| 2.641 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/CIN |
| 2.676 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_22_s/COUT |
| 2.676 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/CIN |
| 2.711 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_23_s/COUT |
| 2.711 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/CIN |
| 2.746 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_24_s/COUT |
| 2.746 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/CIN |
| 2.782 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_25_s/COUT |
| 2.782 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/CIN |
| 2.817 | 0.035 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_26_s/COUT |
| 2.817 | 0.000 | tNET | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/CIN |
| 3.287 | 0.470 | tINS | FF | 24 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/dpu_ahb_haddrd_27_s/SUM |
| 3.524 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/I1 |
| 4.079 | 0.555 | tINS | FF | 14 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/u_cm3_mpu_region_1/u_cm3_mpu_dcomp/region_hit_s51/F |
| 4.316 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/I1 |
| 4.871 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s163/F |
| 5.108 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/I0 |
| 5.625 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s101/F |
| 5.862 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/I2 |
| 6.315 | 0.453 | tINS | FF | 4 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s38/F |
| 6.552 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/I2 |
| 7.005 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s16/F |
| 7.242 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/I1 |
| 7.797 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s4/F |
| 8.034 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/I1 |
| 8.589 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n459_s1/F |
| 8.826 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/I1 |
| 9.381 | 0.555 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/n439_s1/F |
| 9.618 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/S0 |
| 9.869 | 0.251 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s2/O |
| 10.106 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/I1 |
| 10.209 | 0.103 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_regions/attrsd_4_s0/O |
| 10.446 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/I1 |
| 11.001 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s9/F |
| 11.238 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/I0 |
| 11.755 | 0.517 | tINS | FF | 2 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_mpu/u_cm3_mpu_full/u_cm3_mpu_ahb_ctl/ahb_hprotd_2_s3/F |
| 11.992 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/I1 |
| 12.547 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s9/F |
| 12.784 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/I1 |
| 13.339 | 0.555 | tINS | FF | 9 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/set_str_fwd_ex_s4/F |
| 13.576 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/I0 |
| 14.093 | 0.517 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/fault_lsu_precise_set_s3/F |
| 14.330 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/I1 |
| 14.885 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s8/F |
| 15.122 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/I1 |
| 15.677 | 0.555 | tINS | FF | 28 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s1/F |
| 15.914 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s/I1 |
| 16.469 | 0.555 | tINS | FF | 80 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_dec/dpu_ivalid_s/F |
| 16.706 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ctl_s89/I2 |
| 17.159 | 0.453 | tINS | FF | 6 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_ctl_s89/F |
| 17.396 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_30_s124/I1 |
| 17.951 | 0.555 | tINS | FF | 3 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_30_s124/F |
| 18.188 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_31_s135/I2 |
| 18.641 | 0.453 | tINS | FF | 30 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_31_s135/F |
| 18.878 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s112/I0 |
| 19.395 | 0.517 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s112/F |
| 19.632 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s104/I1 |
| 20.187 | 0.555 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s104/F |
| 20.424 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s132/I2 |
| 20.877 | 0.453 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s132/F |
| 21.114 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s130/I0 |
| 21.217 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s130/O |
| 21.454 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s95/I0 |
| 21.557 | 0.103 | tINS | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_25_s95/O |
| 21.794 | 0.237 | tNET | FF | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_25_s0/D |
| AT | DELAY | TYPE | RF | FANOUT | NODE |
|---|---|---|---|---|---|
| 10.000 | 0.000 | HCLK | |||
| 10.000 | 0.000 | tCL | RR | 1 | HCLK_ibuf/I |
| 10.682 | 0.683 | tINS | RR | 6357 | HCLK_ibuf/O |
| 10.863 | 0.180 | tNET | RR | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_25_s0/CLK |
| 10.828 | -0.035 | tSu | 1 | u_M3_inst/uCORTEXM3INTEGRATION/uCORTEXM3/u_cm3_dpu/u_cm3_dpu_lsu/u_cm3_dpu_lsu_ahbintf/addr_adder_in1_ex_25_s0 |
| Clock Skew: | 0.000 |
| Setup Relationship: | 10.000 |
| Logic Level: | 29 |
| Arrival Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |
| Arrival Data Path Delay: | cell: 14.063, 67.188%; route: 6.636, 31.704%; tC2Q: 0.232, 1.108% |
| Required Clock Path Delay: | cell: 0.683, 79.130%; route: 0.180, 20.870% |