Power Messages

Report Title Power Analysis Report
Design File E:\myWork\IP\releaseVerify\RefDesign\DSP_Math\zipFile\1994\FP_Div_RefDesign\proj\impl\gwsynthesis\FP_Div.vg
Physical Constraints File E:\myWork\IP\releaseVerify\RefDesign\DSP_Math\zipFile\1994\FP_Div_RefDesign\proj\src\FP_Div.cst
Timing Constraints File E:\myWork\IP\releaseVerify\RefDesign\DSP_Math\zipFile\1994\FP_Div_RefDesign\proj\src\FP_Div.sdc
Version V1.9.9 Beta-4
Part Number GW2A-LV55PG484C8/I7
Device GW2A-55
Created Time Thu Sep 07 17:01:15 2023
Legal Announcement Copyright (C)2014-2023 Gowin Semiconductor Corporation. All rights reserved.

Power Summary

Power Information:

Total Power (mW) 278.881
Quiescent Power (mW) 199.560
Dynamic Power (mW) 79.321

Thermal Information:

Junction Temperature 30.218
Theta JA 18.710
Max Allowed Ambient Temperature 79.782

Configure Information:

Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125
Use Vectorless Estimation false
Filter Glitches false
Related Vcd File
Related Saif File
Use Custom Theta JA false
Air Flow LFM_0
Heat Sink None
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Ambient Temperature 25.000

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 1.000 65.350 131.560 196.911
VCCX 2.500 3.251 26.515 74.415
VCCIO18 1.800 3.246 0.951 7.555

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 6.750 NA 5.878
IO 35.718 18.497 6.846
BSRAM 55.341 NA NA

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
top 62.091 62.091(59.246)
top/FP_Div/ 22.408 22.408(22.408)
top/FP_Div/FP_Div_inst/ 22.408 22.408(5.950)
top/FP_Div/FP_Div_inst/div0/ 5.950 5.950(5.950)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/ 5.950 5.950(5.909)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[0].non_restoring_division_latency_inst/ 0.110 0.110(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[10].non_restoring_division_latency_inst/ 0.118 0.118(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[11].non_restoring_division_latency_inst/ 0.117 0.117(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[12].non_restoring_division_latency_inst/ 0.117 0.117(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[13].non_restoring_division_latency_inst/ 0.117 0.117(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[14].non_restoring_division_latency_inst/ 0.117 0.117(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[15].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[16].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[17].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[18].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[19].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[1].non_restoring_division_latency_inst/ 0.120 0.120(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[20].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[21].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[22].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[23].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[24].non_restoring_division_latency_inst/ 0.116 0.116(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[25].non_restoring_division_latency_inst/ 0.117 0.117(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[26].non_restoring_division_latency_inst/ 0.117 0.117(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[27].non_restoring_division_latency_inst/ 0.117 0.117(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[28].non_restoring_division_latency_inst/ 0.117 0.117(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[29].non_restoring_division_latency_inst/ 0.118 0.118(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[2].non_restoring_division_latency_inst/ 0.120 0.120(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[30].non_restoring_division_latency_inst/ 0.118 0.118(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[31].non_restoring_division_latency_inst/ 0.118 0.118(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[32].non_restoring_division_latency_inst/ 0.118 0.118(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[33].non_restoring_division_latency_inst/ 0.119 0.119(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[34].non_restoring_division_latency_inst/ 0.119 0.119(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[35].non_restoring_division_latency_inst/ 0.119 0.119(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[36].non_restoring_division_latency_inst/ 0.120 0.120(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[37].non_restoring_division_latency_inst/ 0.120 0.120(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[38].non_restoring_division_latency_inst/ 0.120 0.120(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[39].non_restoring_division_latency_inst/ 0.120 0.120(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[3].non_restoring_division_latency_inst/ 0.120 0.120(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[40].non_restoring_division_latency_inst/ 0.121 0.121(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[41].non_restoring_division_latency_inst/ 0.121 0.121(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[42].non_restoring_division_latency_inst/ 0.121 0.121(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[43].non_restoring_division_latency_inst/ 0.121 0.121(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[44].non_restoring_division_latency_inst/ 0.122 0.122(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[45].non_restoring_division_latency_inst/ 0.122 0.122(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[46].non_restoring_division_latency_inst/ 0.122 0.122(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[47].non_restoring_division_latency_inst/ 0.122 0.122(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[48].non_restoring_division_latency_inst/ 0.122 0.122(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[49].non_restoring_division_latency_inst/ 0.107 0.107(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[4].non_restoring_division_latency_inst/ 0.119 0.119(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[5].non_restoring_division_latency_inst/ 0.119 0.119(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[6].non_restoring_division_latency_inst/ 0.119 0.119(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[7].non_restoring_division_latency_inst/ 0.119 0.119(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[8].non_restoring_division_latency_inst/ 0.118 0.118(0.000)
top/FP_Div/FP_Div_inst/div0/integer_division_frac_inst/gen_non_restoring[9].non_restoring_division_latency_inst/ 0.118 0.118(0.000)
top/gw_gao_inst_0/ 36.838 36.838(36.838)
top/gw_gao_inst_0/u_icon_top/ 0.005 0.005(0.000)
top/gw_gao_inst_0/u_la0_top/ 36.833 36.833(36.704)
top/gw_gao_inst_0/u_la0_top/u_ao_crc32/ 0.010 0.010(0.000)
top/gw_gao_inst_0/u_la0_top/u_ao_match_0/ 0.002 0.002(0.000)
top/gw_gao_inst_0/u_la0_top/u_ao_mem_ctrl/ 36.691 36.691(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
clk 50.000 51.519
tck_pad_i 20.000 10.580
NO CLOCK DOMAIN 0.000 0.000