

@S |Clock Optimization Summary



#### START OF PREMAP CLOCK OPTIMIZATION REPORT #####[

0 non-gated/non-generated clock tree(s) driving 0 clock pin(s) of sequential element(s)
3 gated/generated clock tree(s) driving 10 clock pin(s) of sequential element(s)
0 instances converted, 10 sequential instances remain driven by gated/generated clocks

=================================================== Gated/Generated Clocks ====================================================
Clock Tree ID     Driving Element     Drive Element Type     Unconverted Fanout     Sample Instance     Explanation            
-------------------------------------------------------------------------------------------------------------------------------
@KP:ckid0_0       ENCRYPTED           PLL                    4                      ENCRYPTED           Black box on clock path
@KP:ckid0_1       ENCRYPTED           CLKDIV                 5                      ENCRYPTED           Black box on clock path
@KP:ckid0_2       ENCRYPTED           PLL                    1                      ENCRYPTED           Black box on clock path
===============================================================================================================================


##### END OF CLOCK OPTIMIZATION REPORT ######

