
Copyright (C) 1994-2019 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: P-2019.03G-1-Beta1
Install: E:\Gowin\Gowin_V1.9.3Beta_37257_win\SynplifyPro
OS: Windows 6.1

Hostname: GW-SW-001

Implementation : rev_1
Synopsys HDL compiler and linker, Version comp2019q1p1, Build 391R, Built Dec  3 2019 09:16:34

Modified Files: 8
FID:  path (prevtimestamp, timestamp)
0        E:\GOWIN_WORK\IP_Design\MIPI\MIPI_release_case\MIPI_DPHY_Reference_Design\MIPI_RefDesign\src\DPHY_RX_TOP\temp\MIPI_Rx\dphy_define.v (N/A, 2020-03-26 13:43:22)
1        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50)
2        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50)
3        E:\Gowin\Gowin_V1.9.3Beta_37257_win\SynplifyPro\lib\generic\gw1n.v (N/A, 2019-12-06 03:09:16)
4        E:\Gowin\Gowin_V1.9.3Beta_37257_win\SynplifyPro\lib\vlog\hypermods.v (N/A, 2019-12-04 01:13:52)
5        E:\Gowin\Gowin_V1.9.3Beta_37257_win\SynplifyPro\lib\vlog\scemi_objects.v (N/A, 2019-12-04 01:13:52)
6        E:\Gowin\Gowin_V1.9.3Beta_37257_win\SynplifyPro\lib\vlog\scemi_pipes.svh (N/A, 2019-12-04 01:13:52)
7        E:\Gowin\Gowin_V1.9.3Beta_37257_win\SynplifyPro\lib\vlog\umr_capim.v (N/A, 2019-12-04 01:13:52)

*******************************************************************
Modules that may have changed as a result of file changes: 9
MID:  lib.cell.view
0        work.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
1        work.\~Aligner.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (may instantiate this module)
2        work.\~DPHY_RX.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (may instantiate this module)
3        work.\~IO_Ctrl_RX.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (may instantiate this module)
4        work.\~clk_cross_fifo.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (may instantiate this module)
5        work.\~idesx8.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (may instantiate this module)
6        work.\~lane_align_FIFO.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (may instantiate this module)
7        work.\~lane_aligner.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (may instantiate this module)
8        work.\~word_aligner.DPHY_RX_TOP.verilog may have changed because the following files changed:
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX.v (N/A, 2019-12-17 16:53:50) <-- (module definition)
                        E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_RX\data\DPHY_RX_TOP.v (N/A, 2019-12-17 16:53:50) <-- (may instantiate this module)

*******************************************************************
Unmodified files: 0
FID:  path (timestamp)

*******************************************************************
Unchanged modules: 0
MID:  lib.cell.view
