[General]
ipc_version=4
type=mipi_rx
version=3.1
target_device=gw1n9-014
file=DPHY_RX_TOP
module=DPHY_RX_TOP

[Config]
BYTE_ALIGN=true
CLK_LANE=false
DATA0_BEFORE_LANE=false
DISABLE_IO=true
DPHY_LANES=3
EXT_CLK=false
HS_DATA0_IO_DELAY=0
LANE_ALIGN=true
MODE=16
DATA1_BEFORE_LANE=false
DATA2_BEFORE_LANE=false
DATA3_BEFORE_LANE=false
HS_DATA1_IO_DELAY=0
HS_DATA2_IO_DELAY=0
HS_DATA3_IO_DELAY=0
LANG=0
Synthesis_tool=Synplify Pro
IO_TYPE_ELVDS=true
LANE_0=false
LANE_1=false
LANE_2=false
LANE_3=false
