Project Status Summary Page

Project Settings
Project Name | MIPI_Rx | Device Name | rev_1: GOWIN-GW1N : GW1N_9
Implementation Name | rev_1 | Top Module | [auto]
Pipelining | 1 | Retiming | 0
Resource Sharing | 1 | Fanout Guide | 10000
Disable I/O Insertion | 1 | Disable Sequential Optimizations | 0
Clock Conversion | 1 | FSM Compiler | 1

Run Status
Job Name | Status |  |  |  | CPU Time | Real Time | Memory | Date/Time
(compiler) | Complete | 8 | 5 | 0 | - | 00m:02s | - | 2020/3/26 13:44:00
(premap) | Complete | 5 | 0 | 0 | 0m:02s | 0m:02s | 226MB | 2020/3/26 13:44:04
(fpga_mapper) | Complete | 9 | 4 | 0 | 0m:09s | 0m:09s | 242MB | 2020/3/26 13:44:14
Multi-srs Generator | Complete |  |  |  | 00m:01s |  |  | 2020/3/26 13:44:01

Area Summary
I/O ports (io_port) | 79 | Non I/O Register bits (non_io_reg) | 942 (14%)
I/O Register bits (total_io_reg) | 0 | Ultra Rams | 0
Block Rams (v_ram) | 0 (26) | Block Multipliers (dsp_used) | 0 (10)
LUTs (total_luts) | 1010 (11%) |  |

Timing Summary
Clock Name | Req Freq | Est Freq | Slack
--- | --- | --- | ---
_~DPHY_RX_DPHY_RX_TOP_|HS_CLK_inferred_clock | 329.2 MHz | 279.8 MHz | -0.536
_~idesx8_DPHY_RX_TOP_|sclk_inferred_clock | 133.9 MHz | 113.8 MHz | -1.318
System | 288.1 MHz | 244.9 MHz | -0.612

Optimizations Summary
Combined Clock Conversion | 0 / 3 |  |