Selecting top level module DPHY_TX_TOP
Running optimization stage 1 on PLL .......
Running optimization stage 1 on \~pllx8.DPHY_TX_TOP  .......
Running optimization stage 1 on LUT4 .......
Running optimization stage 1 on OSER16 .......
Running optimization stage 1 on CLKDIV .......
Running optimization stage 1 on ELVDS_TBUF .......
Running optimization stage 1 on \~oserx8.DPHY_TX_TOP  .......
Running optimization stage 1 on \~DPHY_TX.DPHY_TX_TOP  .......
@N: CG364 :"E:\Gowin\Gowin_V1.9.3Beta_37257_win\IDE\ipcore\MIPI_TX\data\DPHY_TX_TOP.v":165:22:165:22|Synthesizing module DPHY_TX_TOP in library work.
Running optimization stage 1 on DPHY_TX_TOP .......
Running optimization stage 2 on DPHY_TX_TOP .......
Running optimization stage 2 on \~DPHY_TX.DPHY_TX_TOP  .......
Running optimization stage 2 on \~oserx8.DPHY_TX_TOP  .......
Running optimization stage 2 on ELVDS_TBUF .......
Running optimization stage 2 on CLKDIV .......
Running optimization stage 2 on OSER16 .......
Running optimization stage 2 on LUT4 .......
Running optimization stage 2 on \~pllx8.DPHY_TX_TOP  .......
Running optimization stage 2 on PLL .......

For a summary of runtime and memory usage per design unit, please see file:
==========================================================
@L: E:\GOWIN_WORK\IP_Design\MIPI\MIPI_release_case\MIPI_DPHY_Reference_Design\MIPI_RefDesign\src\DPHY_TX_TOP\temp\MIPI_Tx\rev_1\synwork\layer0.rt.csv

