Hierarchy Module Resource
MODULE NAME |
REG NUMBER |
ALU NUMBER |
LUT NUMBER |
DSP NUMBER |
BSRAM NUMBER |
SSRAM NUMBER |
DsiTest_Top (F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/Dsi_Test_pattern_2a18/fpga_proj/src/top.v) |
85 |
34 |
25 |
- |
- |
- |
    |--u_pll
(F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/Dsi_Test_pattern_2a18/fpga_proj/src/top.v) |
- |
- |
- |
- |
- |
- |
    |--u_test_gen
(F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/Dsi_Test_pattern_2a18/fpga_proj/src/top.v) |
122 |
- |
161 |
- |
- |
- |
    |--u_p2b
(F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/Dsi_Test_pattern_2a18/fpga_proj/src/top.v) |
210 |
14 |
126 |
- |
- |
8 |
    |--u_dsi_tx
(F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/Dsi_Test_pattern_2a18/fpga_proj/src/top.v) |
479 |
4 |
1251 |
- |
2 |
4 |
    |--u_tx_phy
(F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/Dsi_Test_pattern_2a18/fpga_proj/src/top.v) |
- |
- |
6 |
- |
- |
- |