Hierarchy Module Resource

MODULE NAME REG NUMBER ALU NUMBER LUT NUMBER DSP NUMBER BSRAM NUMBER SSRAM NUMBER
DsiTest_Top (F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/DSI_Test_Pattern_5a25/fpga_proj/src/top.v) 86 34 29 - - -
    |--u_test_gen (F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/DSI_Test_Pattern_5a25/fpga_proj/src/top.v) 122 - 188 - - -
    |--u_p2b (F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/DSI_Test_Pattern_5a25/fpga_proj/src/top.v) 192 20 144 - 1 -
    |--u_dsi_tx (F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/DSI_Test_Pattern_5a25/fpga_proj/src/top.v) 477 4 1254 - 3 -
    |--u_dphy_tx_ip (F:/mySrc/MIPI_modular_IP/Ref_Design/Saved/DSI_Test_Pattern_5a25/fpga_proj/src/top.v) - - 1 - - -