Power Messages

Report Title Power Analysis Report
Design File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_PWM_RefDesign\project\impl\gwsynthesis\fpga_project.vg
Physical Constraints File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_PWM_RefDesign\project\src\fpga_project.cst
Timing Constraints File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_PWM_RefDesign\project\src\fpga_project.sdc
Tool Version V1.9.11.02 (64-bit)
Part Number GW1N-LV9QN88C6/I5
Device GW1N-9
Device Version C
Created Time Tue Apr 15 15:23:05 2025
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.

Configure Information:

Grade Commercial
Process Typical
Ambient Temperature 25.000
Use Custom Theta JA false
Heat Sink None
Air Flow LFM_0
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Related Vcd File
Related Saif File
Filter Glitches false
Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125

Power Summary

Power Information:

Total Power (mW) 22.129
Quiescent Power (mW) 9.510
Dynamic Power (mW) 12.619

Thermal Information:

Junction Temperature 25.714
Theta JA 32.620
Max Allowed Ambient Temperature 84.286

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 1.200 9.557 2.401 14.350
VCCX 3.300 0.174 1.300 4.865
VCCIO33 3.300 0.174 0.709 2.914

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 0.078 NA 6.562
IO 3.904 2.531 20.714
PLL 11.158 NA NA

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
top 11.236 11.236(11.236)
top/Gowin_PLL/ 11.158 11.158(0.000)
top/dut/ 0.056 0.056(0.056)
top/dut/u_pwm/ 0.056 0.056(0.000)
top/gw_gvio_inst_0/ 0.022 0.022(0.022)
top/gw_gvio_inst_0/u_gvio0_top/ 0.021 0.021(0.000)
top/gw_gvio_inst_0/u_gvio_icon_top/ 0.001 0.001(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
tck_pad_i 20.000 0.014
pclk 100.000 0.067
Gowin_PLL/rpll_inst/CLKOUT.default_gen_clk 400.000 0.007
clk 50.000 11.158