fpga_project_1 (rev_1)
Synthesis -
Compiler Report
Compiler Constraint Applicator
Pre-mapping Report
Clock Summary
Clock Conversion
Mapper Report
Timing Report
Performance Summary
Clock Relationships
Interface Information
Detailed Report for Clocks
Clock: psram_memory_interface_top_2ch|clk_out_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: psram_syn_top|clk_d_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: psram_syn_top|memory_clk_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: System
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Resource Utilization
Constraint Checker Report (14:30 22-Feb)
Session Log (14:30 22-Feb)