Hierarchy Module Resource
MODULE NAME |
REG NUMBER |
ALU NUMBER |
LUT NUMBER |
DSP NUMBER |
BSRAM NUMBER |
SSRAM NUMBER |
psram_syn_top (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_2ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) |
33 |
- |
70 |
- |
- |
- |
    |--your_instance_name
(E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_2ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) |
- |
- |
- |
- |
- |
- |
    |--u_PSRAM_TOP
(E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_2ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) |
1144 |
84 |
1943 |
- |
- |
36 |
    |--u_test0
(E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_2ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) |
349 |
91 |
439 |
- |
- |
- |
    |--u_test1
(E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_2ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) |
349 |
91 |
437 |
- |
- |
- |