Timing Messages

Report Title Timing Analysis Report
Design File E:\myWork\IP\releaseVerify\version\1.9.11\Gowin_USB_Audio_Class_RefDesign\project\impl\gwsynthesis\Gowin_UAC_V1_0.vg
Physical Constraints File E:\myWork\IP\releaseVerify\version\1.9.11\Gowin_USB_Audio_Class_RefDesign\project\src\Gowin_UAC_V1_0.cst
Timing Constraint File E:\myWork\IP\releaseVerify\version\1.9.11\Gowin_USB_Audio_Class_RefDesign\project\src\Gowin_UAC_V1_0.sdc
Tool Version V1.9.11 (64-bit)
Part Number GW2AR-LV18QN88C8/I7
Device GW2AR-18
Device Version C
Created Time Tue Dec 24 15:49:06 2024
Legal Announcement Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.

Timing Summaries

STA Tool Run Summary:

Setup Delay Model Slow 0.95V 85C C8/I7
Hold Delay Model Fast 1.05V 0C C8/I7
Numbers of Paths Analyzed 10846
Numbers of Endpoints Analyzed 12381
Numbers of Falling Endpoints 4
Numbers of Setup Violated Endpoints 0
Numbers of Hold Violated Endpoints 0

Clock Summary:

NO. Clock Name Type Period Frequency(MHz) Rise Fall Source Master Objects
1 PHY_CLKOUT Base 16.667 59.999 0.000 8.334 Gowin_rPLL/rpll_inst/CLKOUTD
2 CLK_480M Base 2.083 480.077 0.000 1.042 Gowin_rPLL/rpll_inst/CLKOUT
3 CLK_12M Base 83.333 12.000 0.000 41.666 CLK_12M
4 CLK_IIS Base 122.070 8.192 0.000 61.035 CLK_IIS
5 CLK_120M Base 8.333 120.005 0.000 4.167 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/sclk
6 clk_98304 Base 10.173 98.299 0.000 5.087 iis_rPLL/rpll_inst/CLKOUT
7 Gowin_rPLL/rpll_inst/CLKOUTP.default_gen_clk Generated 2.083 480.002 0.000 1.042 CLK_12M_ibuf/I CLK_12M Gowin_rPLL/rpll_inst/CLKOUTP
8 Gowin_rPLL/rpll_inst/CLKOUTD3.default_gen_clk Generated 6.250 160.001 0.000 3.125 CLK_12M_ibuf/I CLK_12M Gowin_rPLL/rpll_inst/CLKOUTD3
9 iis_rPLL/rpll_inst/CLKOUTP.default_gen_clk Generated 10.173 98.304 0.000 5.086 CLK_IIS_ibuf/I CLK_IIS iis_rPLL/rpll_inst/CLKOUTP
10 iis_rPLL/rpll_inst/CLKOUTD.default_gen_clk Generated 20.345 49.152 0.000 10.173 CLK_IIS_ibuf/I CLK_IIS iis_rPLL/rpll_inst/CLKOUTD
11 iis_rPLL/rpll_inst/CLKOUTD3.default_gen_clk Generated 30.518 32.768 0.000 15.259 CLK_IIS_ibuf/I CLK_IIS iis_rPLL/rpll_inst/CLKOUTD3

Max Frequency Summary:

NO. Clock Name Constraint Actual Fmax Logic Level Entity
1 PHY_CLKOUT 59.999(MHz) 61.076(MHz) 17 TOP
2 CLK_120M 120.005(MHz) 161.188(MHz) 7 TOP
3 clk_98304 98.299(MHz) 102.714(MHz) 12 TOP

No timing paths to get frequency of CLK_480M!

No timing paths to get frequency of CLK_12M!

No timing paths to get frequency of CLK_IIS!

No timing paths to get frequency of Gowin_rPLL/rpll_inst/CLKOUTP.default_gen_clk!

No timing paths to get frequency of Gowin_rPLL/rpll_inst/CLKOUTD3.default_gen_clk!

No timing paths to get frequency of iis_rPLL/rpll_inst/CLKOUTP.default_gen_clk!

No timing paths to get frequency of iis_rPLL/rpll_inst/CLKOUTD.default_gen_clk!

No timing paths to get frequency of iis_rPLL/rpll_inst/CLKOUTD3.default_gen_clk!

Total Negative Slack Summary:

Clock Name Analysis Type Endpoints TNS Number of Endpoints
PHY_CLKOUT Setup 0.000 0
PHY_CLKOUT Hold 0.000 0
CLK_480M Setup 0.000 0
CLK_480M Hold 0.000 0
CLK_12M Setup 0.000 0
CLK_12M Hold 0.000 0
CLK_IIS Setup 0.000 0
CLK_IIS Hold 0.000 0
CLK_120M Setup 0.000 0
CLK_120M Hold 0.000 0
clk_98304 Setup 0.000 0
clk_98304 Hold 0.000 0
Gowin_rPLL/rpll_inst/CLKOUTP.default_gen_clk Setup 0.000 0
Gowin_rPLL/rpll_inst/CLKOUTP.default_gen_clk Hold 0.000 0
Gowin_rPLL/rpll_inst/CLKOUTD3.default_gen_clk Setup 0.000 0
Gowin_rPLL/rpll_inst/CLKOUTD3.default_gen_clk Hold 0.000 0
iis_rPLL/rpll_inst/CLKOUTP.default_gen_clk Setup 0.000 0
iis_rPLL/rpll_inst/CLKOUTP.default_gen_clk Hold 0.000 0
iis_rPLL/rpll_inst/CLKOUTD.default_gen_clk Setup 0.000 0
iis_rPLL/rpll_inst/CLKOUTD.default_gen_clk Hold 0.000 0
iis_rPLL/rpll_inst/CLKOUTD3.default_gen_clk Setup 0.000 0
iis_rPLL/rpll_inst/CLKOUTD3.default_gen_clk Hold 0.000 0

Timing Details

Path Slacks Table:

Setup Paths Table

Report Command:report_timing -setup -max_paths 25 -max_common_paths 1

Path Number Path Slack From Node To Node From Clock To Clock Relation Clock Skew Data Delay
1 0.294 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_0_s1/D PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 16.338
2 0.298 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_1_s1/D PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 16.334
3 0.298 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_15_s1/D PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 16.334
4 0.437 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_23_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.701
5 0.437 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_24_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.701
6 0.453 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_2_s12/CE PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 16.179
7 0.453 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_3_s12/CE PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 16.179
8 0.591 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_23_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.547
9 0.591 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_24_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.547
10 0.625 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_rxgoodpacket_s0/D PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 16.007
11 0.637 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_8_s2/CE PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 15.995
12 0.669 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_0_s12/CE PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 15.963
13 0.704 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_19_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.434
14 0.704 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_20_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.434
15 0.704 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_21_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.434
16 0.713 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_16_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.425
17 0.750 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_6_s4/D PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 15.882
18 0.831 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_22_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.307
19 0.847 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_4_s12/CE PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 15.785
20 0.847 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_5_s12/CE PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 15.785
21 0.847 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_7_s2/CE PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 15.785
22 0.885 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_1_s2/D PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 15.747
23 0.931 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_17_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.207
24 0.996 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_22_s0/D clk_98304:[R] clk_98304:[R] 10.173 0.000 9.142
25 1.004 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/PHY_DATAOUT_0_s0/D PHY_CLKOUT:[R] PHY_CLKOUT:[R] 16.667 0.000 15.628

Hold Paths Table

Report Command:report_timing -hold -max_paths 25 -max_common_paths 1

Path Number Path Slack From Node To Node From Clock To Clock Relation Clock Skew Data Delay
1 0.074 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_r_wr_data_3_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s/DI[3] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.323
2 0.074 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_5_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/DI[5] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.323
3 0.074 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_4_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/DI[4] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.323
4 0.074 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_0_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/DI[0] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.323
5 0.074 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_4_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/DI[4] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.323
6 0.074 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_0_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/DI[0] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.323
7 0.076 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_r_wr_data_4_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s/DI[4] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.325
8 0.076 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_2_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/DI[2] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.325
9 0.076 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_19_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/DI[3] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.325
10 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_18_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/DI[2] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
11 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_12_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s/DI[12] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
12 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_11_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s/DI[11] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
13 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_20_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/DI[4] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
14 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_17_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/DI[1] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
15 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_16_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/DI[0] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
16 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_14_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/DI[14] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
17 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_10_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/DI[10] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
18 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_22_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/DI[6] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
19 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_20_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/DI[4] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
20 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_15_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/DI[15] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
21 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_24_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/DI[8] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
22 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_19_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/DI[3] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
23 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_8_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/DI[8] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
24 0.077 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_18_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/DI[2] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.326
25 0.080 USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_20_s1/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/DI[4] PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 0.329

Recovery Paths Table

Report Command:report_timing -recovery -max_paths 25 -max_common_paths 1

Path Number Path Slack From Node To Node From Clock To Clock Relation Clock Skew Data Delay
1 1.596 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s/RESETB CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
2 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0/PRESET CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
3 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_0_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
4 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_1_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
5 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_2_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
6 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_3_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
7 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_0_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
8 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_1_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
9 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_2_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
10 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_3_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
11 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_4_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
12 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_0_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
13 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_1_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
14 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_2_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
15 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_3_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
16 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_4_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
17 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_0_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
18 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
19 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_2_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
20 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_3_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
21 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_4_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
22 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_5_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
23 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Full_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
24 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_0_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129
25 1.999 u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_1_s0/CLEAR CLK_120M:[F] CLK_120M:[R] 4.166 0.003 2.129

Removal Paths Table

Report Command:report_timing -removal -max_paths 25 -max_common_paths 1

Path Number Path Slack From Node To Node From Clock To Clock Relation Clock Skew Data Delay
1 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/Full_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
2 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_0_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
3 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_1_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
4 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_5_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
5 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_6_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
6 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_1_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
7 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_3_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
8 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_1_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
9 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_4_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
10 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_6_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
11 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
12 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_pktval_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
13 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Empty_s0/PRESET PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
14 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Full_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
15 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_0_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
16 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_2_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
17 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_3_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
18 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_4_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
19 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wptr_3_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
20 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wq2_rptr_4_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
21 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/sync_rx_pkt_fifo/rp_0_s3/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
22 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_dval_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
23 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_rd_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
24 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_rd_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509
25 1.498 u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_wr_data_0_s0/CLEAR PHY_CLKOUT:[R] PHY_CLKOUT:[R] 0.000 0.000 1.509

Minimum Pulse Width Table:

Report Command:report_min_pulse_width -nworst 10 -detail

Number Slack Actual Width Required Width Type Clock Objects
1 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_2_s0
2 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_1_s0
3 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_0_s0
4 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_wr_s0
5 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/DRU_500M_Top/u_dru_500m_logic/ID_15_s0
6 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wq2_rptr_1_s0
7 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0
8 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0
9 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s
10 2.403 3.403 1.000 Low Pulse Width CLK_120M u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0

Timing Report By Analysis Type:

Setup Analysis Report

Report Command:report_timing -setup -max_paths 25 -max_common_paths 1

Path1

Path Summary:

Slack 0.294
Data Arrival Time 18.609
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_0_s1
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R16C30[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/CLK
2.503 0.232 tC2Q RF 186 R16C30[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/Q
5.192 2.689 tNET FF 1 R29C53[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_0_s2614/I0
5.709 0.517 tINS FF 7 R29C53[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_0_s2614/F
6.764 1.055 tNET FF 1 R42C51[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2331/I0
7.217 0.453 tINS FF 5 R42C51[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2331/F
7.924 0.706 tNET FF 1 R32C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2327/I0
8.295 0.371 tINS FF 2 R32C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2327/F
8.983 0.689 tNET FF 1 R23C50[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s62/I0
9.445 0.462 tINS FR 1 R23C50[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s62/F
9.447 0.001 tNET RR 1 R23C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s33/I3
9.818 0.371 tINS RF 1 R23C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s33/F
9.822 0.004 tNET FF 1 R23C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s13/I3
10.392 0.570 tINS FR 1 R23C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s13/F
10.565 0.172 tNET RR 1 R22C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s3/I3
10.936 0.371 tINS RF 1 R22C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s3/F
10.940 0.004 tNET FF 1 R22C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s0/I0
11.402 0.462 tINS FR 1 R22C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s0/F
11.403 0.001 tNET RR 1 R22C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s/I0
11.920 0.517 tINS RF 1 R22C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s/F
14.230 2.309 tNET FF 1 R7C13[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s8/I0
14.683 0.453 tINS FF 1 R7C13[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s8/F
15.080 0.397 tNET FF 1 R7C12[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s6/I0
15.542 0.462 tINS FR 1 R7C12[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s6/F
15.543 0.001 tNET RR 1 R7C12[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s2/I3
15.996 0.453 tINS RF 2 R7C12[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s2/F
16.490 0.494 tNET FF 1 R7C8[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n774_s3/I0
16.861 0.371 tINS FF 3 R7C8[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n774_s3/F
17.045 0.184 tNET FF 1 R7C7[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s5/I2
17.507 0.462 tINS FR 1 R7C7[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s5/F
17.509 0.001 tNET RR 1 R7C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s4/I0
18.058 0.549 tINS RR 3 R7C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s4/F
18.060 0.003 tNET RR 1 R7C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s2/I1
18.609 0.549 tINS RR 1 R7C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s2/F
18.609 0.000 tNET RR 1 R7C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_0_s1/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R7C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_0_s1/CLK
18.903 -0.035 tSu 1 R7C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_0_s1

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 17
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 7.393, 45.251%; route: 8.713, 53.329%; tC2Q: 0.232, 1.420%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path2

Path Summary:

Slack 0.298
Data Arrival Time 18.606
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_1_s1
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R16C30[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/CLK
2.503 0.232 tC2Q RF 186 R16C30[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/Q
5.192 2.689 tNET FF 1 R29C53[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_0_s2614/I0
5.709 0.517 tINS FF 7 R29C53[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_0_s2614/F
6.764 1.055 tNET FF 1 R42C51[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2331/I0
7.217 0.453 tINS FF 5 R42C51[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2331/F
7.924 0.706 tNET FF 1 R32C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2327/I0
8.295 0.371 tINS FF 2 R32C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2327/F
8.983 0.689 tNET FF 1 R23C50[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s62/I0
9.445 0.462 tINS FR 1 R23C50[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s62/F
9.447 0.001 tNET RR 1 R23C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s33/I3
9.818 0.371 tINS RF 1 R23C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s33/F
9.822 0.004 tNET FF 1 R23C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s13/I3
10.392 0.570 tINS FR 1 R23C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s13/F
10.565 0.172 tNET RR 1 R22C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s3/I3
10.936 0.371 tINS RF 1 R22C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s3/F
10.940 0.004 tNET FF 1 R22C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s0/I0
11.402 0.462 tINS FR 1 R22C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s0/F
11.403 0.001 tNET RR 1 R22C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s/I0
11.920 0.517 tINS RF 1 R22C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s/F
14.230 2.309 tNET FF 1 R7C13[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s8/I0
14.683 0.453 tINS FF 1 R7C13[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s8/F
15.080 0.397 tNET FF 1 R7C12[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s6/I0
15.542 0.462 tINS FR 1 R7C12[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s6/F
15.543 0.001 tNET RR 1 R7C12[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s2/I3
15.996 0.453 tINS RF 2 R7C12[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s2/F
16.490 0.494 tNET FF 1 R7C8[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n774_s3/I0
16.861 0.371 tINS FF 3 R7C8[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n774_s3/F
17.045 0.184 tNET FF 1 R7C7[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s5/I2
17.507 0.462 tINS FR 1 R7C7[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s5/F
17.509 0.001 tNET RR 1 R7C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s4/I0
18.058 0.549 tINS RR 3 R7C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s4/F
18.235 0.177 tNET RR 1 R7C8[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n775_s2/I1
18.606 0.371 tINS RF 1 R7C8[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n775_s2/F
18.606 0.000 tNET FF 1 R7C8[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_1_s1/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R7C8[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_1_s1/CLK
18.903 -0.035 tSu 1 R7C8[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_1_s1

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 17
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 7.215, 44.171%; route: 8.887, 54.409%; tC2Q: 0.232, 1.420%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path3

Path Summary:

Slack 0.298
Data Arrival Time 18.606
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_15_s1
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R16C30[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/CLK
2.503 0.232 tC2Q RF 186 R16C30[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/Q
5.192 2.689 tNET FF 1 R29C53[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_0_s2614/I0
5.709 0.517 tINS FF 7 R29C53[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_0_s2614/F
6.764 1.055 tNET FF 1 R42C51[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2331/I0
7.217 0.453 tINS FF 5 R42C51[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2331/F
7.924 0.706 tNET FF 1 R32C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2327/I0
8.295 0.371 tINS FF 2 R32C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_descrom_rdat_6_s2327/F
8.983 0.689 tNET FF 1 R23C50[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s62/I0
9.445 0.462 tINS FR 1 R23C50[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s62/F
9.447 0.001 tNET RR 1 R23C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s33/I3
9.818 0.371 tINS RF 1 R23C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s33/F
9.822 0.004 tNET FF 1 R23C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s13/I3
10.392 0.570 tINS FR 1 R23C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s13/F
10.565 0.172 tNET RR 1 R22C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s3/I3
10.936 0.371 tINS RF 1 R22C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s3/F
10.940 0.004 tNET FF 1 R22C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s0/I0
11.402 0.462 tINS FR 1 R22C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s0/F
11.403 0.001 tNET RR 1 R22C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s/I0
11.920 0.517 tINS RF 1 R22C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_6_s/F
14.230 2.309 tNET FF 1 R7C13[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s8/I0
14.683 0.453 tINS FF 1 R7C13[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s8/F
15.080 0.397 tNET FF 1 R7C12[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s6/I0
15.542 0.462 tINS FR 1 R7C12[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s6/F
15.543 0.001 tNET RR 1 R7C12[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s2/I3
15.996 0.453 tINS RF 2 R7C12[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n779_s2/F
16.490 0.494 tNET FF 1 R7C8[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n774_s3/I0
16.861 0.371 tINS FF 3 R7C8[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n774_s3/F
17.045 0.184 tNET FF 1 R7C7[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s5/I2
17.507 0.462 tINS FR 1 R7C7[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s5/F
17.509 0.001 tNET RR 1 R7C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s4/I0
18.058 0.549 tINS RR 3 R7C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n776_s4/F
18.235 0.177 tNET RR 1 R7C8[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n761_s2/I2
18.606 0.371 tINS RF 1 R7C8[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n761_s2/F
18.606 0.000 tNET FF 1 R7C8[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_15_s1/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R7C8[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_15_s1/CLK
18.903 -0.035 tSu 1 R7C8[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/crc16_buf_15_s1

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 17
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 7.215, 44.171%; route: 8.887, 54.409%; tC2Q: 0.232, 1.420%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path4

Path Summary:

Slack 0.437
Data Arrival Time 11.972
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_23_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R41C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R41C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/Q
3.345 0.842 tNET FF 2 R40C33[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3601_s/I0
3.915 0.570 tINS FR 1 R40C33[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3601_s/COUT
3.915 0.000 tNET RR 2 R40C33[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3600_s/CIN
4.385 0.470 tINS RF 2 R40C33[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3600_s/SUM
4.953 0.567 tNET FF 2 R40C31[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s32/I1
5.324 0.371 tINS FF 1 R40C31[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s32/COUT
5.324 0.000 tNET FF 2 R40C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s33/CIN
5.359 0.035 tINS FF 1 R40C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s33/COUT
5.359 0.000 tNET FF 2 R40C32[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s34/CIN
5.394 0.035 tINS FF 1 R40C32[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s34/COUT
5.394 0.000 tNET FF 2 R40C32[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s35/CIN
5.429 0.035 tINS FF 1 R40C32[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s35/COUT
5.429 0.000 tNET FF 2 R40C32[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s36/CIN
5.464 0.035 tINS FF 1 R40C32[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s36/COUT
5.464 0.000 tNET FF 2 R40C32[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s37/CIN
5.500 0.035 tINS FF 1 R40C32[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s37/COUT
6.140 0.640 tNET FF 1 R39C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n503_s3/I0
6.593 0.453 tINS FF 5 R39C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n503_s3/F
8.648 2.055 tNET FF 1 R20C4[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n498_s3/I0
9.101 0.453 tINS FF 4 R20C4[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n498_s3/F
9.359 0.259 tNET FF 1 R22C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n494_s4/I0
9.730 0.371 tINS FF 4 R22C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n494_s4/F
9.919 0.189 tNET FF 1 R21C4[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n492_s2/I2
10.290 0.371 tINS FF 3 R21C4[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n492_s2/F
10.299 0.009 tNET FF 1 R21C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n491_s1/I0
10.869 0.570 tINS FR 2 R21C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n491_s1/F
10.871 0.003 tNET RR 1 R21C4[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n489_s2/I1
11.420 0.549 tINS RR 2 R21C4[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n489_s2/F
11.423 0.003 tNET RR 1 R21C4[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n490_s0/I1
11.972 0.549 tINS RR 1 R21C4[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n490_s0/F
11.972 0.000 tNET RR 1 R21C4[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_23_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R21C4[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_23_s0/CLK
12.409 -0.035 tSu 1 R21C4[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_23_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 12
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.903, 50.543%; route: 4.566, 47.066%; tC2Q: 0.232, 2.392%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path5

Path Summary:

Slack 0.437
Data Arrival Time 11.972
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_24_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R41C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R41C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/Q
3.345 0.842 tNET FF 2 R40C33[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3601_s/I0
3.915 0.570 tINS FR 1 R40C33[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3601_s/COUT
3.915 0.000 tNET RR 2 R40C33[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3600_s/CIN
4.385 0.470 tINS RF 2 R40C33[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3600_s/SUM
4.953 0.567 tNET FF 2 R40C31[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s32/I1
5.324 0.371 tINS FF 1 R40C31[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s32/COUT
5.324 0.000 tNET FF 2 R40C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s33/CIN
5.359 0.035 tINS FF 1 R40C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s33/COUT
5.359 0.000 tNET FF 2 R40C32[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s34/CIN
5.394 0.035 tINS FF 1 R40C32[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s34/COUT
5.394 0.000 tNET FF 2 R40C32[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s35/CIN
5.429 0.035 tINS FF 1 R40C32[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s35/COUT
5.429 0.000 tNET FF 2 R40C32[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s36/CIN
5.464 0.035 tINS FF 1 R40C32[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s36/COUT
5.464 0.000 tNET FF 2 R40C32[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s37/CIN
5.500 0.035 tINS FF 1 R40C32[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s37/COUT
6.140 0.640 tNET FF 1 R39C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n503_s3/I0
6.593 0.453 tINS FF 5 R39C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n503_s3/F
8.648 2.055 tNET FF 1 R20C4[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n498_s3/I0
9.101 0.453 tINS FF 4 R20C4[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n498_s3/F
9.359 0.259 tNET FF 1 R22C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n494_s4/I0
9.730 0.371 tINS FF 4 R22C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n494_s4/F
9.919 0.189 tNET FF 1 R21C4[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n492_s2/I2
10.290 0.371 tINS FF 3 R21C4[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n492_s2/F
10.299 0.009 tNET FF 1 R21C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n491_s1/I0
10.869 0.570 tINS FR 2 R21C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n491_s1/F
10.871 0.003 tNET RR 1 R21C4[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n489_s2/I1
11.420 0.549 tINS RR 2 R21C4[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n489_s2/F
11.423 0.003 tNET RR 1 R21C4[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n489_s0/I1
11.972 0.549 tINS RR 1 R21C4[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n489_s0/F
11.972 0.000 tNET RR 1 R21C4[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_24_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R21C4[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_24_s0/CLK
12.409 -0.035 tSu 1 R21C4[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_24_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 12
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.903, 50.543%; route: 4.566, 47.066%; tC2Q: 0.232, 2.392%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path6

Path Summary:

Slack 0.453
Data Arrival Time 18.450
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_2_s12
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.120 4.617 tNET FF 1 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/I0
7.573 0.453 tINS FF 2 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/F
7.991 0.418 tNET FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/I0
8.444 0.453 tINS FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/F
8.857 0.413 tNET FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/I0
9.228 0.371 tINS FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/F
9.884 0.656 tNET FF 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/I2
10.454 0.570 tINS FR 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/F
10.626 0.172 tNET RR 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/I1
10.997 0.371 tINS RF 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/F
11.168 0.170 tNET FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/I1
11.539 0.371 tINS FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/F
11.709 0.170 tNET FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/I3
12.226 0.517 tINS FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/F
15.182 2.956 tNET FF 1 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/I0
15.737 0.555 tINS FF 4 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/F
16.233 0.496 tNET FF 1 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/I2
16.686 0.453 tINS FF 3 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/F
17.355 0.669 tNET FF 1 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/I1
17.904 0.549 tINS FR 7 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/F
18.450 0.546 tNET RR 1 R7C6[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_2_s12/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R7C6[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_2_s12/CLK
18.903 -0.035 tSu 1 R7C6[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_2_s12

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.663, 28.822%; route: 11.284, 69.744%; tC2Q: 0.232, 1.434%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path7

Path Summary:

Slack 0.453
Data Arrival Time 18.450
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_3_s12
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.120 4.617 tNET FF 1 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/I0
7.573 0.453 tINS FF 2 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/F
7.991 0.418 tNET FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/I0
8.444 0.453 tINS FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/F
8.857 0.413 tNET FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/I0
9.228 0.371 tINS FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/F
9.884 0.656 tNET FF 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/I2
10.454 0.570 tINS FR 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/F
10.626 0.172 tNET RR 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/I1
10.997 0.371 tINS RF 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/F
11.168 0.170 tNET FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/I1
11.539 0.371 tINS FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/F
11.709 0.170 tNET FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/I3
12.226 0.517 tINS FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/F
15.182 2.956 tNET FF 1 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/I0
15.737 0.555 tINS FF 4 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/F
16.233 0.496 tNET FF 1 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/I2
16.686 0.453 tINS FF 3 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/F
17.355 0.669 tNET FF 1 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/I1
17.904 0.549 tINS FR 7 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/F
18.450 0.546 tNET RR 1 R7C6[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_3_s12/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R7C6[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_3_s12/CLK
18.903 -0.035 tSu 1 R7C6[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_3_s12

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.663, 28.822%; route: 11.284, 69.744%; tC2Q: 0.232, 1.434%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path8

Path Summary:

Slack 0.591
Data Arrival Time 11.818
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_23_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q
3.481 0.977 tNET FF 2 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/I1
3.852 0.371 tINS FF 1 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/COUT
3.852 0.000 tNET FF 2 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/CIN
3.887 0.035 tINS FF 1 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/COUT
3.887 0.000 tNET FF 2 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/CIN
3.922 0.035 tINS FF 1 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/COUT
3.922 0.000 tNET FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/CIN
4.392 0.470 tINS FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/SUM
4.955 0.563 tNET FF 2 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/I0
5.504 0.549 tINS FR 1 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/COUT
5.504 0.000 tNET RR 2 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/CIN
5.539 0.035 tINS RF 1 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/COUT
5.539 0.000 tNET FF 2 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/CIN
5.575 0.035 tINS FF 1 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/COUT
5.575 0.000 tNET FF 2 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/CIN
5.610 0.035 tINS FF 1 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/COUT
5.610 0.000 tNET FF 2 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/CIN
5.645 0.035 tINS FF 1 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/COUT
5.645 0.000 tNET FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/CIN
5.680 0.035 tINS FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/COUT
7.924 2.243 tNET FF 1 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/I0
8.377 0.453 tINS FF 3 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/F
8.798 0.422 tNET FF 1 R17C33[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n496_s1/I0
9.251 0.453 tINS FF 4 R17C33[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n496_s1/F
9.919 0.667 tNET FF 1 R17C29[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n491_s5/I2
10.474 0.555 tINS FF 3 R17C29[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n491_s5/F
10.896 0.422 tNET FF 1 R16C30[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n489_s1/I2
11.445 0.549 tINS FR 2 R16C30[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n489_s1/F
11.447 0.003 tNET RR 1 R16C30[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n490_s0/I0
11.818 0.371 tINS RF 1 R16C30[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n490_s0/F
11.818 0.000 tNET FF 1 R16C30[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_23_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R16C30[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_23_s0/CLK
12.409 -0.035 tSu 1 R16C30[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_23_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.017, 42.080%; route: 5.298, 55.490%; tC2Q: 0.232, 2.430%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path9

Path Summary:

Slack 0.591
Data Arrival Time 11.818
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_24_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q
3.481 0.977 tNET FF 2 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/I1
3.852 0.371 tINS FF 1 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/COUT
3.852 0.000 tNET FF 2 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/CIN
3.887 0.035 tINS FF 1 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/COUT
3.887 0.000 tNET FF 2 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/CIN
3.922 0.035 tINS FF 1 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/COUT
3.922 0.000 tNET FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/CIN
4.392 0.470 tINS FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/SUM
4.955 0.563 tNET FF 2 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/I0
5.504 0.549 tINS FR 1 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/COUT
5.504 0.000 tNET RR 2 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/CIN
5.539 0.035 tINS RF 1 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/COUT
5.539 0.000 tNET FF 2 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/CIN
5.575 0.035 tINS FF 1 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/COUT
5.575 0.000 tNET FF 2 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/CIN
5.610 0.035 tINS FF 1 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/COUT
5.610 0.000 tNET FF 2 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/CIN
5.645 0.035 tINS FF 1 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/COUT
5.645 0.000 tNET FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/CIN
5.680 0.035 tINS FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/COUT
7.924 2.243 tNET FF 1 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/I0
8.377 0.453 tINS FF 3 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/F
8.798 0.422 tNET FF 1 R17C33[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n496_s1/I0
9.251 0.453 tINS FF 4 R17C33[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n496_s1/F
9.919 0.667 tNET FF 1 R17C29[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n491_s5/I2
10.474 0.555 tINS FF 3 R17C29[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n491_s5/F
10.896 0.422 tNET FF 1 R16C30[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n489_s1/I2
11.445 0.549 tINS FR 2 R16C30[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n489_s1/F
11.447 0.003 tNET RR 1 R16C30[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n489_s0/I0
11.818 0.371 tINS RF 1 R16C30[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n489_s0/F
11.818 0.000 tNET FF 1 R16C30[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_24_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R16C30[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_24_s0/CLK
12.409 -0.035 tSu 1 R16C30[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_24_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.017, 42.080%; route: 5.298, 55.490%; tC2Q: 0.232, 2.430%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path10

Path Summary:

Slack 0.625
Data Arrival Time 18.279
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_rxgoodpacket_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R16C30[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/CLK
2.503 0.232 tC2Q RF 186 R16C30[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_0_s0/Q
5.410 2.906 tNET FF 1 R32C50[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s14/I0
5.927 0.517 tINS FF 12 R32C50[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s14/F
6.882 0.955 tNET FF 1 R21C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s54/I1
7.437 0.555 tINS FF 3 R21C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s54/F
8.992 1.555 tNET FF 1 R31C53[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s31/I1
9.363 0.371 tINS FF 1 R31C53[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s31/F
9.534 0.170 tNET FF 1 R30C53[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s9/I2
10.083 0.549 tINS FR 1 R30C53[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s9/F
10.227 0.144 tNET RR 1 R30C53[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s1/I3
10.776 0.549 tINS RR 1 R30C53[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s1/F
10.948 0.172 tNET RR 1 R30C52[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s/I1
11.503 0.555 tINS RF 1 R30C52[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_5_s/F
14.007 2.504 tNET FF 1 R7C13[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n780_s7/I0
14.378 0.371 tINS FF 1 R7C13[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n780_s7/F
14.791 0.413 tNET FF 1 R6C12[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n780_s5/I1
15.162 0.371 tINS FF 1 R6C12[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n780_s5/F
15.166 0.004 tNET FF 1 R6C12[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n780_s2/I1
15.619 0.453 tINS FF 2 R6C12[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n780_s2/F
16.114 0.494 tNET FF 1 R6C8[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n773_s3/I3
16.485 0.371 tINS FF 4 R6C8[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n773_s3/F
17.158 0.674 tNET FF 1 R5C10[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s4/I2
17.728 0.570 tINS FR 1 R5C10[3][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s4/F
17.730 0.001 tNET RR 1 R5C10[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s0/I3
18.279 0.549 tINS RR 1 R5C10[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s0/F
18.279 0.000 tNET RR 1 R5C10[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_rxgoodpacket_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R5C10[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_rxgoodpacket_s0/CLK
18.903 -0.035 tSu 1 R5C10[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_rxgoodpacket_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 13
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 5.781, 36.115%; route: 9.994, 62.436%; tC2Q: 0.232, 1.449%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path11

Path Summary:

Slack 0.637
Data Arrival Time 18.267
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_8_s2
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.120 4.617 tNET FF 1 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/I0
7.573 0.453 tINS FF 2 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/F
7.991 0.418 tNET FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/I0
8.444 0.453 tINS FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/F
8.857 0.413 tNET FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/I0
9.228 0.371 tINS FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/F
9.884 0.656 tNET FF 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/I2
10.454 0.570 tINS FR 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/F
10.626 0.172 tNET RR 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/I1
10.997 0.371 tINS RF 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/F
11.168 0.170 tNET FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/I1
11.539 0.371 tINS FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/F
11.709 0.170 tNET FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/I3
12.226 0.517 tINS FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/F
15.182 2.956 tNET FF 1 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/I0
15.737 0.555 tINS FF 4 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/F
16.233 0.496 tNET FF 1 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/I2
16.686 0.453 tINS FF 3 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/F
17.355 0.669 tNET FF 1 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/I1
17.904 0.549 tINS FR 7 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/F
18.267 0.363 tNET RR 1 R7C7[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_8_s2/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R7C7[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_8_s2/CLK
18.903 -0.035 tSu 1 R7C7[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_8_s2

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.663, 29.153%; route: 11.100, 69.397%; tC2Q: 0.232, 1.450%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path12

Path Summary:

Slack 0.669
Data Arrival Time 18.235
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_0_s12
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.120 4.617 tNET FF 1 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/I0
7.573 0.453 tINS FF 2 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/F
7.991 0.418 tNET FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/I0
8.444 0.453 tINS FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/F
8.857 0.413 tNET FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/I0
9.228 0.371 tINS FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/F
9.884 0.656 tNET FF 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/I2
10.454 0.570 tINS FR 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/F
10.626 0.172 tNET RR 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/I1
10.997 0.371 tINS RF 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/F
11.168 0.170 tNET FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/I1
11.539 0.371 tINS FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/F
11.709 0.170 tNET FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/I3
12.226 0.517 tINS FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/F
15.182 2.956 tNET FF 1 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/I0
15.737 0.555 tINS FF 4 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/F
16.233 0.496 tNET FF 1 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/I2
16.686 0.453 tINS FF 3 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/F
17.355 0.669 tNET FF 1 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/I1
17.904 0.549 tINS FR 7 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/F
18.235 0.331 tNET RR 1 R6C6[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_0_s12/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R6C6[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_0_s12/CLK
18.903 -0.035 tSu 1 R6C6[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_0_s12

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.663, 29.211%; route: 11.068, 69.336%; tC2Q: 0.232, 1.453%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path13

Path Summary:

Slack 0.704
Data Arrival Time 11.705
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_19_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q
3.481 0.977 tNET FF 2 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/I1
3.852 0.371 tINS FF 1 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/COUT
3.852 0.000 tNET FF 2 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/CIN
3.887 0.035 tINS FF 1 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/COUT
3.887 0.000 tNET FF 2 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/CIN
3.922 0.035 tINS FF 1 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/COUT
3.922 0.000 tNET FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/CIN
4.392 0.470 tINS FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/SUM
4.955 0.563 tNET FF 2 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/I0
5.504 0.549 tINS FR 1 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/COUT
5.504 0.000 tNET RR 2 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/CIN
5.539 0.035 tINS RF 1 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/COUT
5.539 0.000 tNET FF 2 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/CIN
5.575 0.035 tINS FF 1 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/COUT
5.575 0.000 tNET FF 2 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/CIN
5.610 0.035 tINS FF 1 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/COUT
5.610 0.000 tNET FF 2 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/CIN
5.645 0.035 tINS FF 1 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/COUT
5.645 0.000 tNET FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/CIN
5.680 0.035 tINS FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/COUT
7.924 2.243 tNET FF 1 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/I0
8.377 0.453 tINS FF 3 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/F
8.390 0.013 tNET FF 1 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/I0
8.907 0.517 tINS FF 4 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/F
9.326 0.419 tNET FF 1 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/I1
9.697 0.371 tINS FF 4 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/F
9.871 0.175 tNET FF 1 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/I1
10.242 0.371 tINS FF 5 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/F
10.669 0.427 tNET FF 1 R17C28[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n492_s2/I2
11.239 0.570 tINS FR 3 R17C28[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n492_s2/F
11.243 0.004 tNET RR 1 R17C28[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n494_s0/I0
11.705 0.462 tINS RR 1 R17C28[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n494_s0/F
11.705 0.000 tNET RR 1 R17C28[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_19_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R17C28[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_19_s0/CLK
12.409 -0.035 tSu 1 R17C28[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_19_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 12
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.380, 46.434%; route: 4.821, 51.107%; tC2Q: 0.232, 2.459%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path14

Path Summary:

Slack 0.704
Data Arrival Time 11.705
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_20_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q
3.481 0.977 tNET FF 2 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/I1
3.852 0.371 tINS FF 1 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/COUT
3.852 0.000 tNET FF 2 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/CIN
3.887 0.035 tINS FF 1 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/COUT
3.887 0.000 tNET FF 2 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/CIN
3.922 0.035 tINS FF 1 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/COUT
3.922 0.000 tNET FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/CIN
4.392 0.470 tINS FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/SUM
4.955 0.563 tNET FF 2 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/I0
5.504 0.549 tINS FR 1 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/COUT
5.504 0.000 tNET RR 2 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/CIN
5.539 0.035 tINS RF 1 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/COUT
5.539 0.000 tNET FF 2 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/CIN
5.575 0.035 tINS FF 1 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/COUT
5.575 0.000 tNET FF 2 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/CIN
5.610 0.035 tINS FF 1 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/COUT
5.610 0.000 tNET FF 2 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/CIN
5.645 0.035 tINS FF 1 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/COUT
5.645 0.000 tNET FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/CIN
5.680 0.035 tINS FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/COUT
7.924 2.243 tNET FF 1 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/I0
8.377 0.453 tINS FF 3 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/F
8.390 0.013 tNET FF 1 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/I0
8.907 0.517 tINS FF 4 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/F
9.326 0.419 tNET FF 1 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/I1
9.697 0.371 tINS FF 4 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/F
9.871 0.175 tNET FF 1 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/I1
10.242 0.371 tINS FF 5 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/F
10.669 0.427 tNET FF 1 R17C28[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n492_s2/I2
11.239 0.570 tINS FR 3 R17C28[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n492_s2/F
11.243 0.004 tNET RR 1 R17C28[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n493_s0/I1
11.705 0.462 tINS RR 1 R17C28[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n493_s0/F
11.705 0.000 tNET RR 1 R17C28[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_20_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R17C28[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_20_s0/CLK
12.409 -0.035 tSu 1 R17C28[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_20_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 12
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.380, 46.434%; route: 4.821, 51.107%; tC2Q: 0.232, 2.459%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path15

Path Summary:

Slack 0.704
Data Arrival Time 11.705
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_21_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q
3.481 0.977 tNET FF 2 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/I1
3.852 0.371 tINS FF 1 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/COUT
3.852 0.000 tNET FF 2 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/CIN
3.887 0.035 tINS FF 1 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/COUT
3.887 0.000 tNET FF 2 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/CIN
3.922 0.035 tINS FF 1 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/COUT
3.922 0.000 tNET FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/CIN
4.392 0.470 tINS FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/SUM
4.955 0.563 tNET FF 2 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/I0
5.504 0.549 tINS FR 1 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/COUT
5.504 0.000 tNET RR 2 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/CIN
5.539 0.035 tINS RF 1 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/COUT
5.539 0.000 tNET FF 2 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/CIN
5.575 0.035 tINS FF 1 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/COUT
5.575 0.000 tNET FF 2 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/CIN
5.610 0.035 tINS FF 1 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/COUT
5.610 0.000 tNET FF 2 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/CIN
5.645 0.035 tINS FF 1 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/COUT
5.645 0.000 tNET FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/CIN
5.680 0.035 tINS FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/COUT
7.924 2.243 tNET FF 1 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/I0
8.377 0.453 tINS FF 3 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/F
8.390 0.013 tNET FF 1 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/I0
8.907 0.517 tINS FF 4 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/F
9.326 0.419 tNET FF 1 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/I1
9.697 0.371 tINS FF 4 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/F
9.871 0.175 tNET FF 1 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/I1
10.242 0.371 tINS FF 5 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/F
10.669 0.427 tNET FF 1 R17C28[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n492_s2/I2
11.239 0.570 tINS FR 3 R17C28[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n492_s2/F
11.243 0.004 tNET RR 1 R17C28[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n492_s0/I1
11.705 0.462 tINS RR 1 R17C28[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n492_s0/F
11.705 0.000 tNET RR 1 R17C28[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_21_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R17C28[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_21_s0/CLK
12.409 -0.035 tSu 1 R17C28[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_21_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 12
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.380, 46.434%; route: 4.821, 51.107%; tC2Q: 0.232, 2.459%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path16

Path Summary:

Slack 0.713
Data Arrival Time 11.697
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_16_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q
3.481 0.977 tNET FF 2 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/I1
3.852 0.371 tINS FF 1 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/COUT
3.852 0.000 tNET FF 2 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/CIN
3.887 0.035 tINS FF 1 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/COUT
3.887 0.000 tNET FF 2 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/CIN
3.922 0.035 tINS FF 1 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/COUT
3.922 0.000 tNET FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/CIN
4.392 0.470 tINS FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/SUM
4.955 0.563 tNET FF 2 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/I0
5.504 0.549 tINS FR 1 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/COUT
5.504 0.000 tNET RR 2 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/CIN
5.539 0.035 tINS RF 1 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/COUT
5.539 0.000 tNET FF 2 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/CIN
5.575 0.035 tINS FF 1 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/COUT
5.575 0.000 tNET FF 2 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/CIN
5.610 0.035 tINS FF 1 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/COUT
5.610 0.000 tNET FF 2 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/CIN
5.645 0.035 tINS FF 1 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/COUT
5.645 0.000 tNET FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/CIN
5.680 0.035 tINS FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/COUT
7.924 2.243 tNET FF 1 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/I0
8.377 0.453 tINS FF 3 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/F
8.390 0.013 tNET FF 1 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/I0
8.907 0.517 tINS FF 4 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/F
9.326 0.419 tNET FF 1 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/I1
9.697 0.371 tINS FF 4 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/F
10.197 0.500 tNET FF 1 R17C29[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n498_s2/I2
10.568 0.371 tINS FF 3 R17C29[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n498_s2/F
10.751 0.184 tNET FF 1 R17C30[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n497_s1/I0
11.122 0.371 tINS FF 1 R17C30[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n497_s1/F
11.127 0.004 tNET FF 1 R17C30[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n497_s0/I1
11.697 0.570 tINS FR 1 R17C30[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n497_s0/F
11.697 0.000 tNET RR 1 R17C30[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_16_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R17C30[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_16_s0/CLK
12.409 -0.035 tSu 1 R17C30[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_16_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 12
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.289, 45.508%; route: 4.904, 52.030%; tC2Q: 0.232, 2.461%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path17

Path Summary:

Slack 0.750
Data Arrival Time 18.153
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_6_s4
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.894 5.391 tNET FF 1 R45C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s114/I0
8.356 0.462 tINS FR 1 R45C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s114/F
8.358 0.001 tNET RR 1 R45C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s130/I0
8.913 0.555 tINS RF 1 R45C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s130/F
9.160 0.247 tNET FF 1 R43C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s56/I2
9.730 0.570 tINS FR 1 R43C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s56/F
9.731 0.001 tNET RR 1 R43C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s27/I1
10.280 0.549 tINS RR 1 R43C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s27/F
10.281 0.001 tNET RR 1 R43C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s10/I0
10.851 0.570 tINS RR 1 R43C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s10/F
10.853 0.001 tNET RR 1 R43C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s2/I0
11.315 0.462 tINS RR 1 R43C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s2/F
11.316 0.001 tNET RR 1 R43C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s/I2
11.769 0.453 tINS RF 1 R43C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s/F
15.146 3.377 tNET FF 1 R6C13[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s9/I0
15.663 0.517 tINS FF 2 R6C13[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s9/F
15.910 0.247 tNET FF 1 R6C12[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s8/I2
16.281 0.371 tINS FF 5 R6C12[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s8/F
17.691 1.410 tNET FF 1 R6C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n624_s28/I0
18.153 0.462 tINS FR 1 R6C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n624_s28/F
18.153 0.000 tNET RR 1 R6C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_6_s4/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R6C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_6_s4/CLK
18.903 -0.035 tSu 1 R6C7[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_6_s4

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.971, 31.300%; route: 10.679, 67.239%; tC2Q: 0.232, 1.461%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path18

Path Summary:

Slack 0.831
Data Arrival Time 11.578
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_22_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q
3.481 0.977 tNET FF 2 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/I1
3.852 0.371 tINS FF 1 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/COUT
3.852 0.000 tNET FF 2 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/CIN
3.887 0.035 tINS FF 1 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/COUT
3.887 0.000 tNET FF 2 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/CIN
3.922 0.035 tINS FF 1 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/COUT
3.922 0.000 tNET FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/CIN
4.392 0.470 tINS FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/SUM
4.955 0.563 tNET FF 2 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/I0
5.504 0.549 tINS FR 1 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/COUT
5.504 0.000 tNET RR 2 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/CIN
5.539 0.035 tINS RF 1 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/COUT
5.539 0.000 tNET FF 2 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/CIN
5.575 0.035 tINS FF 1 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/COUT
5.575 0.000 tNET FF 2 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/CIN
5.610 0.035 tINS FF 1 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/COUT
5.610 0.000 tNET FF 2 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/CIN
5.645 0.035 tINS FF 1 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/COUT
5.645 0.000 tNET FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/CIN
5.680 0.035 tINS FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/COUT
7.924 2.243 tNET FF 1 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/I0
8.377 0.453 tINS FF 3 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/F
8.390 0.013 tNET FF 1 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/I0
8.907 0.517 tINS FF 4 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/F
9.326 0.419 tNET FF 1 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/I1
9.697 0.371 tINS FF 4 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/F
9.871 0.175 tNET FF 1 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/I1
10.242 0.371 tINS FF 5 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/F
10.666 0.423 tNET FF 1 R16C29[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n491_s2/I1
11.037 0.371 tINS FF 1 R16C29[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n491_s2/F
11.207 0.170 tNET FF 1 R17C29[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n491_s0/I2
11.578 0.371 tINS FF 1 R17C29[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n491_s0/F
11.578 0.000 tNET FF 1 R17C29[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_22_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R17C29[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_22_s0/CLK
12.409 -0.035 tSu 1 R17C29[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_22_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 12
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.090, 43.951%; route: 4.984, 53.557%; tC2Q: 0.232, 2.493%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path19

Path Summary:

Slack 0.847
Data Arrival Time 18.057
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_4_s12
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.120 4.617 tNET FF 1 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/I0
7.573 0.453 tINS FF 2 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/F
7.991 0.418 tNET FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/I0
8.444 0.453 tINS FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/F
8.857 0.413 tNET FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/I0
9.228 0.371 tINS FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/F
9.884 0.656 tNET FF 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/I2
10.454 0.570 tINS FR 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/F
10.626 0.172 tNET RR 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/I1
10.997 0.371 tINS RF 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/F
11.168 0.170 tNET FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/I1
11.539 0.371 tINS FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/F
11.709 0.170 tNET FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/I3
12.226 0.517 tINS FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/F
15.182 2.956 tNET FF 1 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/I0
15.737 0.555 tINS FF 4 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/F
16.233 0.496 tNET FF 1 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/I2
16.686 0.453 tINS FF 3 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/F
17.355 0.669 tNET FF 1 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/I1
17.904 0.549 tINS FR 7 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/F
18.057 0.153 tNET RR 1 R6C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_4_s12/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R6C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_4_s12/CLK
18.903 -0.035 tSu 1 R6C7[2][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_4_s12

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.663, 29.540%; route: 10.890, 68.990%; tC2Q: 0.232, 1.470%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path20

Path Summary:

Slack 0.847
Data Arrival Time 18.057
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_5_s12
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.120 4.617 tNET FF 1 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/I0
7.573 0.453 tINS FF 2 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/F
7.991 0.418 tNET FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/I0
8.444 0.453 tINS FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/F
8.857 0.413 tNET FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/I0
9.228 0.371 tINS FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/F
9.884 0.656 tNET FF 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/I2
10.454 0.570 tINS FR 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/F
10.626 0.172 tNET RR 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/I1
10.997 0.371 tINS RF 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/F
11.168 0.170 tNET FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/I1
11.539 0.371 tINS FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/F
11.709 0.170 tNET FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/I3
12.226 0.517 tINS FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/F
15.182 2.956 tNET FF 1 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/I0
15.737 0.555 tINS FF 4 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/F
16.233 0.496 tNET FF 1 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/I2
16.686 0.453 tINS FF 3 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/F
17.355 0.669 tNET FF 1 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/I1
17.904 0.549 tINS FR 7 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/F
18.057 0.153 tNET RR 1 R6C7[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_5_s12/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R6C7[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_5_s12/CLK
18.903 -0.035 tSu 1 R6C7[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_5_s12

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.663, 29.540%; route: 10.890, 68.990%; tC2Q: 0.232, 1.470%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path21

Path Summary:

Slack 0.847
Data Arrival Time 18.057
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_7_s2
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.120 4.617 tNET FF 1 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/I0
7.573 0.453 tINS FF 2 R42C49[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s95/F
7.991 0.418 tNET FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/I0
8.444 0.453 tINS FF 1 R41C50[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s124/F
8.857 0.413 tNET FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/I0
9.228 0.371 tINS FF 1 R39C51[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s72/F
9.884 0.656 tNET FF 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/I2
10.454 0.570 tINS FR 1 R41C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s42/F
10.626 0.172 tNET RR 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/I1
10.997 0.371 tINS RF 1 R42C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s15/F
11.168 0.170 tNET FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/I1
11.539 0.371 tINS FF 1 R42C51[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s3/F
11.709 0.170 tNET FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/I3
12.226 0.517 tINS FF 1 R42C52[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_1_s/F
15.182 2.956 tNET FF 1 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/I0
15.737 0.555 tINS FF 4 R6C13[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s9/F
16.233 0.496 tNET FF 1 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/I2
16.686 0.453 tINS FF 3 R6C11[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s7/F
17.355 0.669 tNET FF 1 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/I1
17.904 0.549 tINS FR 7 R6C7[3][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_11_s14/F
18.057 0.153 tNET RR 1 R6C7[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_7_s2/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R6C7[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_7_s2/CLK
18.903 -0.035 tSu 1 R6C7[1][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_7_s2

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.663, 29.540%; route: 10.890, 68.990%; tC2Q: 0.232, 1.470%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path22

Path Summary:

Slack 0.885
Data Arrival Time 18.018
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_1_s2
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.894 5.391 tNET FF 1 R45C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s114/I0
8.356 0.462 tINS FR 1 R45C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s114/F
8.358 0.001 tNET RR 1 R45C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s130/I0
8.913 0.555 tINS RF 1 R45C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s130/F
9.160 0.247 tNET FF 1 R43C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s56/I2
9.730 0.570 tINS FR 1 R43C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s56/F
9.731 0.001 tNET RR 1 R43C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s27/I1
10.280 0.549 tINS RR 1 R43C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s27/F
10.281 0.001 tNET RR 1 R43C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s10/I0
10.851 0.570 tINS RR 1 R43C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s10/F
10.853 0.001 tNET RR 1 R43C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s2/I0
11.315 0.462 tINS RR 1 R43C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s2/F
11.316 0.001 tNET RR 1 R43C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s/I2
11.769 0.453 tINS RF 1 R43C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s/F
15.146 3.377 tNET FF 1 R6C13[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s9/I0
15.663 0.517 tINS FF 2 R6C13[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s9/F
15.910 0.247 tNET FF 1 R6C12[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s8/I2
16.281 0.371 tINS FF 5 R6C12[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s8/F
17.448 1.168 tNET FF 1 R6C7[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n633_s34/I1
18.018 0.570 tINS FR 1 R6C7[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n633_s34/F
18.018 0.000 tNET RR 1 R6C7[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_1_s2/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R6C7[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_1_s2/CLK
18.903 -0.035 tSu 1 R6C7[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/s_state_1_s2

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 5.079, 32.254%; route: 10.436, 66.273%; tC2Q: 0.232, 1.473%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path23

Path Summary:

Slack 0.931
Data Arrival Time 11.478
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_17_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R44C38[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/s_sample_freq_3_s1/Q
3.481 0.977 tNET FF 2 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/I1
3.852 0.371 tINS FF 1 R49C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3588_s/COUT
3.852 0.000 tNET FF 2 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/CIN
3.887 0.035 tINS FF 1 R49C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3587_s/COUT
3.887 0.000 tNET FF 2 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/CIN
3.922 0.035 tINS FF 1 R49C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3586_s/COUT
3.922 0.000 tNET FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/CIN
4.392 0.470 tINS FF 2 R49C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3585_s/SUM
4.955 0.563 tNET FF 2 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/I0
5.504 0.549 tINS FR 1 R50C39[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s30/COUT
5.504 0.000 tNET RR 2 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/CIN
5.539 0.035 tINS RF 1 R50C40[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s31/COUT
5.539 0.000 tNET FF 2 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/CIN
5.575 0.035 tINS FF 1 R50C40[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s32/COUT
5.575 0.000 tNET FF 2 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/CIN
5.610 0.035 tINS FF 1 R50C40[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s33/COUT
5.610 0.000 tNET FF 2 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/CIN
5.645 0.035 tINS FF 1 R50C40[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s34/COUT
5.645 0.000 tNET FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/CIN
5.680 0.035 tINS FF 2 R50C40[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/n3620_s35/COUT
7.924 2.243 tNET FF 1 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/I0
8.377 0.453 tINS FF 3 R17C35[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n502_s3/F
8.390 0.013 tNET FF 1 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/I0
8.907 0.517 tINS FF 4 R17C35[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n503_s2/F
9.326 0.419 tNET FF 1 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/I1
9.697 0.371 tINS FF 4 R17C32[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n500_s2/F
9.871 0.175 tNET FF 1 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/I1
10.242 0.371 tINS FF 5 R17C31[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n495_s1/F
10.908 0.666 tNET FF 1 R16C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n496_s0/I1
11.478 0.570 tINS FR 1 R16C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/n496_s0/F
11.478 0.000 tNET RR 1 R16C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_17_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R16C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_17_s0/CLK
12.409 -0.035 tSu 1 R16C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst1/ff_value_17_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 3.918, 42.558%; route: 5.057, 54.922%; tC2Q: 0.232, 2.520%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path24

Path Summary:

Slack 0.996
Data Arrival Time 11.414
Data Required Time 12.409
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_22_s0
Launch Clk clk_98304:[R]
Latch Clk clk_98304:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 clk_98304
0.000 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
2.271 2.271 tNET RR 1 R41C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/CLK
2.503 0.232 tC2Q RF 4 R41C28[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/s_sample_freq_3_s1/Q
3.345 0.842 tNET FF 2 R40C33[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3601_s/I0
3.915 0.570 tINS FR 1 R40C33[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3601_s/COUT
3.915 0.000 tNET RR 2 R40C33[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3600_s/CIN
4.385 0.470 tINS RF 2 R40C33[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3600_s/SUM
4.953 0.567 tNET FF 2 R40C31[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s32/I1
5.324 0.371 tINS FF 1 R40C31[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s32/COUT
5.324 0.000 tNET FF 2 R40C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s33/CIN
5.359 0.035 tINS FF 1 R40C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s33/COUT
5.359 0.000 tNET FF 2 R40C32[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s34/CIN
5.394 0.035 tINS FF 1 R40C32[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s34/COUT
5.394 0.000 tNET FF 2 R40C32[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s35/CIN
5.429 0.035 tINS FF 1 R40C32[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s35/COUT
5.429 0.000 tNET FF 2 R40C32[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s36/CIN
5.464 0.035 tINS FF 1 R40C32[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s36/COUT
5.464 0.000 tNET FF 2 R40C32[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s37/CIN
5.500 0.035 tINS FF 1 R40C32[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/n3605_s37/COUT
6.140 0.640 tNET FF 1 R39C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n503_s3/I0
6.593 0.453 tINS FF 5 R39C32[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n503_s3/F
8.648 2.055 tNET FF 1 R20C4[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n498_s3/I0
9.101 0.453 tINS FF 4 R20C4[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n498_s3/F
9.359 0.259 tNET FF 1 R22C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n494_s4/I0
9.730 0.371 tINS FF 4 R22C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n494_s4/F
9.919 0.189 tNET FF 1 R21C4[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n492_s2/I2
10.290 0.371 tINS FF 3 R21C4[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n492_s2/F
10.299 0.009 tNET FF 1 R21C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n491_s1/I0
10.869 0.570 tINS FR 2 R21C4[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n491_s1/F
11.043 0.174 tNET RR 1 R21C3[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n491_s0/I1
11.414 0.371 tINS RF 1 R21C3[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/n491_s0/F
11.414 0.000 tNET FF 1 R21C3[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_22_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
10.173 10.173 active clock edge time
10.173 0.000 clk_98304
10.173 0.000 tCL RR 1023 PLL_R[1] iis_rPLL/rpll_inst/CLKOUT
12.444 2.271 tNET RR 1 R21C3[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_22_s0/CLK
12.409 -0.035 tSu 1 R21C3[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/speaker_feedback_inst3/ff_value_22_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 10.173
Logic Level 11
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 4.176, 45.678%; route: 4.734, 51.784%; tC2Q: 0.232, 2.538%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path25

Path Summary:

Slack 1.004
Data Arrival Time 17.900
Data Required Time 18.903
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0
To u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/PHY_DATAOUT_0_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
2.271 2.271 tNET RR 1 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/CLK
2.503 0.232 tC2Q RF 179 R15C30[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/descrom_raddr_1_s0/Q
7.894 5.391 tNET FF 1 R45C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s114/I0
8.356 0.462 tINS FR 1 R45C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s114/F
8.358 0.001 tNET RR 1 R45C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s130/I0
8.913 0.555 tINS RF 1 R45C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s130/F
9.160 0.247 tNET FF 1 R43C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s56/I2
9.730 0.570 tINS FR 1 R43C50[3][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s56/F
9.731 0.001 tNET RR 1 R43C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s27/I1
10.280 0.549 tINS RR 1 R43C50[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s27/F
10.281 0.001 tNET RR 1 R43C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s10/I0
10.851 0.570 tINS RR 1 R43C50[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s10/F
10.853 0.001 tNET RR 1 R43C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s2/I0
11.315 0.462 tINS RR 1 R43C50[3][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s2/F
11.316 0.001 tNET RR 1 R43C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s/I2
11.769 0.453 tINS RF 1 R43C50[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/u_usb_desc/o_desc_rdat_d_0_s/F
15.146 3.377 tNET FF 1 R6C13[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s9/I0
15.663 0.517 tINS FF 2 R6C13[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n912_s9/F
15.910 0.247 tNET FF 1 R6C12[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s8/I2
16.281 0.371 tINS FF 5 R6C12[0][B] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n328_s8/F
16.957 0.676 tNET FF 1 R5C9[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n785_s3/I0
17.527 0.570 tINS FR 1 R5C9[0][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n785_s3/F
17.529 0.001 tNET RR 1 R5C9[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n785_s0/I2
17.900 0.371 tINS RF 1 R5C9[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/n785_s0/F
17.900 0.000 tNET FF 1 R5C9[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/PHY_DATAOUT_0_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
16.667 16.667 active clock edge time
16.667 0.000 PHY_CLKOUT
16.667 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
18.938 2.271 tNET RR 1 R5C9[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/PHY_DATAOUT_0_s0/CLK
18.903 -0.035 tSu 1 R5C9[1][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_packet/PHY_DATAOUT_0_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 16.667
Logic Level 12
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%
Arrival Data Path Delay cell: 5.450, 34.873%; route: 9.946, 63.643%; tC2Q: 0.232, 1.484%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Hold Analysis Report

Report Command:report_timing -hold -max_paths 25 -max_common_paths 1

Path1

Path Summary:

Slack 0.074
Data Arrival Time 1.834
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_r_wr_data_3_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C32[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_r_wr_data_3_s1/CLK
1.712 0.201 tC2Q RF 1 R45C32[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_r_wr_data_3_s1/Q
1.834 0.122 tNET FF 1 BSRAM_R46[9] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s/DI[3]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[9] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[9] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.122, 37.751%; tC2Q: 0.201, 62.249%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path2

Path Summary:

Slack 0.074
Data Arrival Time 1.834
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_5_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R47C14[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_5_s1/CLK
1.712 0.201 tC2Q RF 1 R47C14[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_5_s1/Q
1.834 0.122 tNET FF 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/DI[5]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.122, 37.751%; tC2Q: 0.201, 62.249%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path3

Path Summary:

Slack 0.074
Data Arrival Time 1.834
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_4_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C38[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_4_s1/CLK
1.712 0.201 tC2Q RF 1 R45C38[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_4_s1/Q
1.834 0.122 tNET FF 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/DI[4]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.122, 37.751%; tC2Q: 0.201, 62.249%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path4

Path Summary:

Slack 0.074
Data Arrival Time 1.834
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_0_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C38[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_0_s1/CLK
1.712 0.201 tC2Q RF 1 R45C38[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_0_s1/Q
1.834 0.122 tNET FF 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/DI[0]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.122, 37.751%; tC2Q: 0.201, 62.249%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path5

Path Summary:

Slack 0.074
Data Arrival Time 1.834
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_4_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C41[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_4_s1/CLK
1.712 0.201 tC2Q RF 1 R45C41[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_4_s1/Q
1.834 0.122 tNET FF 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/DI[4]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.122, 37.751%; tC2Q: 0.201, 62.249%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path6

Path Summary:

Slack 0.074
Data Arrival Time 1.834
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_0_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C41[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_0_s1/CLK
1.712 0.201 tC2Q RF 1 R45C41[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_0_s1/Q
1.834 0.122 tNET FF 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/DI[0]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.122, 37.751%; tC2Q: 0.201, 62.249%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path7

Path Summary:

Slack 0.076
Data Arrival Time 1.836
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_r_wr_data_4_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R48C32[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_r_wr_data_4_s1/CLK
1.713 0.202 tC2Q RR 1 R48C32[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_r_wr_data_4_s1/Q
1.836 0.123 tNET RR 1 BSRAM_R46[9] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s/DI[4]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[9] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[9] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.123, 37.889%; tC2Q: 0.202, 62.111%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path8

Path Summary:

Slack 0.076
Data Arrival Time 1.836
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_2_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R48C14[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_2_s1/CLK
1.713 0.202 tC2Q RR 1 R48C14[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_2_s1/Q
1.836 0.123 tNET RR 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/DI[2]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.123, 37.889%; tC2Q: 0.202, 62.111%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path9

Path Summary:

Slack 0.076
Data Arrival Time 1.836
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_19_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R48C44[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_19_s1/CLK
1.713 0.202 tC2Q RR 2 R48C44[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_19_s1/Q
1.836 0.123 tNET RR 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/DI[3]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.123, 37.889%; tC2Q: 0.202, 62.111%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path10

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_18_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C29[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_18_s1/CLK
1.712 0.201 tC2Q RF 2 R45C29[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_18_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/DI[2]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path11

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_12_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C27[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_12_s1/CLK
1.712 0.201 tC2Q RF 2 R45C27[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_12_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[7] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s/DI[12]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[7] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[7] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path12

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_11_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C27[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_11_s1/CLK
1.712 0.201 tC2Q RF 2 R45C27[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_11_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[7] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s/DI[11]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[7] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[7] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path13

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_20_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C17[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_20_s1/CLK
1.712 0.201 tC2Q RF 2 R45C17[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_20_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/DI[4]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path14

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_17_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C17[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_17_s1/CLK
1.712 0.201 tC2Q RF 2 R45C17[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_17_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/DI[1]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path15

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_16_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R47C17[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_16_s1/CLK
1.712 0.201 tC2Q RF 2 R47C17[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_16_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/DI[0]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[4] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path16

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_14_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C15[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_14_s1/CLK
1.712 0.201 tC2Q RF 2 R45C15[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_14_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/DI[14]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path17

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_10_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C39[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_10_s1/CLK
1.712 0.201 tC2Q RF 2 R45C39[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_r_wr_data_10_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/DI[10]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[11] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path18

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_22_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R47C44[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_22_s1/CLK
1.712 0.201 tC2Q RF 2 R47C44[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_22_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/DI[6]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path19

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_20_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C44[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_20_s1/CLK
1.712 0.201 tC2Q RF 2 R45C44[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_20_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/DI[4]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path20

Path Summary:

Slack 0.077
Data Arrival Time 1.837
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_15_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C42[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_15_s1/CLK
1.712 0.201 tC2Q RF 2 R45C42[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_15_s1/Q
1.837 0.125 tNET FF 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/DI[15]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[12] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.125, 38.377%; tC2Q: 0.201, 61.623%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path21

Path Summary:

Slack 0.077
Data Arrival Time 1.838
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_24_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R47C29[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_24_s1/CLK
1.713 0.202 tC2Q RR 2 R47C29[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_24_s1/Q
1.838 0.124 tNET RR 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/DI[8]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.124, 38.121%; tC2Q: 0.202, 61.879%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path22

Path Summary:

Slack 0.077
Data Arrival Time 1.838
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_19_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R45C29[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_19_s1/CLK
1.713 0.202 tC2Q RR 2 R45C29[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_19_s1/Q
1.838 0.124 tNET RR 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/DI[3]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.124, 38.121%; tC2Q: 0.202, 61.879%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path23

Path Summary:

Slack 0.077
Data Arrival Time 1.838
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_8_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R48C14[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_8_s1/CLK
1.713 0.202 tC2Q RR 2 R48C14[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_r_wr_data_8_s1/Q
1.838 0.124 tNET RR 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/DI[8]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[3] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst2/fifo_right/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.124, 38.121%; tC2Q: 0.202, 61.879%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path24

Path Summary:

Slack 0.077
Data Arrival Time 1.838
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_18_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R48C44[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_18_s1/CLK
1.713 0.202 tC2Q RR 2 R48C44[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_l_wr_data_18_s1/Q
1.838 0.124 tNET RR 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/DI[2]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[13] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst1/fifo_left/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.124, 38.121%; tC2Q: 0.202, 61.879%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path25

Path Summary:

Slack 0.080
Data Arrival Time 1.840
Data Required Time 1.760
From USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_20_s1
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R47C29[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_20_s1/CLK
1.712 0.201 tC2Q RF 2 R47C29[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_l_wr_data_20_s1/Q
1.840 0.128 tNET FF 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/DI[4]

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s/CLKA
1.760 0.249 tHld 1 BSRAM_R46[8] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb2pcm_inst3/fifo_left/mem_mem_0_1_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 0.128, 38.816%; tC2Q: 0.201, 61.184%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Recovery Analysis Report

Report Command:report_timing -recovery -max_paths 25 -max_common_paths 1

Path1

Path Summary:

Slack 1.596
Data Arrival Time 8.571
Data Required Time 10.166
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 8 BSRAM_R10[15] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s/RESETB

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 BSRAM_R10[15] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s/CLKB
10.166 -0.438 tSu 1 BSRAM_R10[15] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path2

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R4C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0/PRESET

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R4C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0/CLK
10.569 -0.035 tSu 1 R4C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path3

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_0_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C52[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C52[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_0_s0/CLK
10.569 -0.035 tSu 1 R5C52[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_0_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path4

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_1_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C49[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C49[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_1_s0/CLK
10.569 -0.035 tSu 1 R5C49[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_1_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path5

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_2_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C49[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C49[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_2_s0/CLK
10.569 -0.035 tSu 1 R5C49[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_2_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path6

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_3_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C52[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C52[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_3_s0/CLK
10.569 -0.035 tSu 1 R5C52[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rptr_3_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path7

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_0_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R3C52[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R3C52[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_0_s0/CLK
10.569 -0.035 tSu 1 R3C52[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_0_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path8

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_1_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R3C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R3C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_1_s0/CLK
10.569 -0.035 tSu 1 R3C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_1_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path9

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_2_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R3C52[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R3C52[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_2_s0/CLK
10.569 -0.035 tSu 1 R3C52[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_2_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path10

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_3_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R4C50[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R4C50[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_3_s0/CLK
10.569 -0.035 tSu 1 R4C50[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_3_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path11

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_4_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R4C50[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R4C50[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_4_s0/CLK
10.569 -0.035 tSu 1 R4C50[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq2_wptr_4_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path12

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_0_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R2C53[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R2C53[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_0_s0/CLK
10.569 -0.035 tSu 1 R2C53[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_0_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path13

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_1_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R2C50[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R2C50[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_1_s0/CLK
10.569 -0.035 tSu 1 R2C50[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_1_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path14

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_2_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R2C53[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R2C53[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_2_s0/CLK
10.569 -0.035 tSu 1 R2C53[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_2_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path15

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_3_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R3C49[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R3C49[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_3_s0/CLK
10.569 -0.035 tSu 1 R3C49[0][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_3_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path16

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_4_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R3C49[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R3C49[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_4_s0/CLK
10.569 -0.035 tSu 1 R3C49[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.rq1_wptr_4_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path17

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_0_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R4C50[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R4C50[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_0_s0/CLK
10.569 -0.035 tSu 1 R4C50[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_0_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path18

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R4C50[2][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R4C50[2][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0/CLK
10.569 -0.035 tSu 1 R4C50[2][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path19

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_2_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C52[2][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C52[2][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_2_s0/CLK
10.569 -0.035 tSu 1 R5C52[2][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_2_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path20

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_3_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C50[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C50[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_3_s0/CLK
10.569 -0.035 tSu 1 R5C50[2][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_3_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path21

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_4_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_4_s0/CLK
10.569 -0.035 tSu 1 R5C51[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_4_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path22

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_5_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R3C52[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_5_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R3C52[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_5_s0/CLK
10.569 -0.035 tSu 1 R3C52[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_5_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path23

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Full_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C41[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Full_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C41[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Full_s0/CLK
10.569 -0.035 tSu 1 R5C41[1][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Full_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path24

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_0_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C41[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C41[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_0_s0/CLK
10.569 -0.035 tSu 1 R5C41[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_0_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Path25

Path Summary:

Slack 1.999
Data Arrival Time 8.571
Data Required Time 10.569
From u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0
To u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_1_s0
Launch Clk CLK_120M:[F]
Latch Clk CLK_120M:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
4.167 4.167 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF 1 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK
6.673 0.232 tC2Q FF 46 R4C40[1][B] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/Q
8.571 1.897 tNET FF 1 R5C42[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
8.333 8.333 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR 159 TOPSIDE[0] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
10.604 2.271 tNET RR 1 R5C42[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_1_s0/CLK
10.569 -0.035 tSu 1 R5C42[0][A] u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wbin_1_s0

Path Statistics:

Clock Skew -0.003
Setup Relationship 4.166
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 2.274, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.897, 89.105%; tC2Q: 0.232, 10.895%
Required Clock Path Delay cell: 0.000, 0.000%; route: 2.271, 100.000%

Removal Analysis Report

Report Command:report_timing -removal -max_paths 25 -max_common_paths 1

Path1

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/Full_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R29C43[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/Full_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R29C43[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/Full_s0/CLK
1.522 0.011 tHld 1 R29C43[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/Full_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path2

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_0_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R30C44[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R30C44[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_0_s0/CLK
1.522 0.011 tHld 1 R30C44[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_0_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path3

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_1_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R30C42[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R30C42[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_1_s0/CLK
1.522 0.011 tHld 1 R30C42[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/wbin_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path4

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_5_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R27C42[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_5_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R27C42[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_5_s0/CLK
1.522 0.011 tHld 1 R27C42[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_5_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path5

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_6_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R27C42[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_6_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R27C42[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_6_s0/CLK
1.522 0.011 tHld 1 R27C42[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep6/clk_cross_fifo/rptr_6_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path6

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_1_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R35C41[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R35C41[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_1_s0/CLK
1.522 0.011 tHld 1 R35C41[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path7

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_3_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R35C41[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R35C41[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_3_s0/CLK
1.522 0.011 tHld 1 R35C41[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/clk_cross_fifo/rbin_3_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path8

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_1_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R36C46[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R36C46[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_1_s0/CLK
1.522 0.011 tHld 1 R36C46[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path9

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_4_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R36C46[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R36C46[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_4_s0/CLK
1.522 0.011 tHld 1 R36C46[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_4_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path10

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_6_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R34C48[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_6_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R34C48[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_6_s0/CLK
1.522 0.011 tHld 1 R34C48[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/sync_rx_pkt_fifo/pkg_wp_6_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path11

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R34C46[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R34C46[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_s0/CLK
1.522 0.011 tHld 1 R34C46[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path12

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_pktval_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R34C46[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_pktval_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R34C46[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_pktval_s0/CLK
1.522 0.011 tHld 1 R34C46[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep5/pkt_fifo_wr_pktval_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path13

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Empty_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R24C42[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Empty_s0/PRESET

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R24C42[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Empty_s0/CLK
1.522 0.011 tHld 1 R24C42[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Empty_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path14

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Full_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R22C44[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Full_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R22C44[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Full_s0/CLK
1.522 0.011 tHld 1 R22C44[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/Full_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path15

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_0_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R22C45[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R22C45[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_0_s0/CLK
1.522 0.011 tHld 1 R22C45[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_0_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path16

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_2_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R22C45[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R22C45[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_2_s0/CLK
1.522 0.011 tHld 1 R22C45[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_2_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path17

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_3_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R21C45[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R21C45[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_3_s0/CLK
1.522 0.011 tHld 1 R21C45[1][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_3_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path18

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_4_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R21C45[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R21C45[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_4_s0/CLK
1.522 0.011 tHld 1 R21C45[1][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wbin_4_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path19

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wptr_3_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R22C43[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wptr_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R22C43[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wptr_3_s0/CLK
1.522 0.011 tHld 1 R22C43[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wptr_3_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path20

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wq2_rptr_4_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R22C43[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wq2_rptr_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R22C43[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wq2_rptr_4_s0/CLK
1.522 0.011 tHld 1 R22C43[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/clk_cross_fifo/wq2_rptr_4_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path21

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/sync_rx_pkt_fifo/rp_0_s3
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R22C48[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/sync_rx_pkt_fifo/rp_0_s3/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R22C48[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/sync_rx_pkt_fifo/rp_0_s3/CLK
1.522 0.011 tHld 1 R22C48[0][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/sync_rx_pkt_fifo/rp_0_s3

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path22

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_dval_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R25C43[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_dval_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R25C43[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_dval_s0/CLK
1.522 0.011 tHld 1 R25C43[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_dval_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path23

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_rd_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R25C43[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_rd_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R25C43[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_rd_s0/CLK
1.522 0.011 tHld 1 R25C43[2][B] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/c_fifo_rd_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path24

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_rd_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R22C48[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_rd_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R22C48[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_rd_s0/CLK
1.522 0.011 tHld 1 R22C48[0][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_rd_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Path25

Path Summary:

Slack 1.498
Data Arrival Time 3.021
Data Required Time 1.522
From u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0
To USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_wr_data_0_s0
Launch Clk PHY_CLKOUT:[R]
Latch Clk PHY_CLKOUT:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/CLK
1.713 0.202 tC2Q RR 1002 R14C4[2][A] u_usb_device_controller_top_HS/u_usb_device_controller/u_usb_device_controller_utmi/u_usb_init/s_reset_s0/Q
3.021 1.307 tNET RR 1 R27C18[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_wr_data_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 PHY_CLKOUT
0.000 0.000 tCL RR 3021 PLL_L[1] Gowin_rPLL/rpll_inst/CLKOUTD
1.511 1.511 tNET RR 1 R27C18[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_wr_data_0_s0/CLK
1.522 0.011 tHld 1 R27C18[2][A] USB_Audio_Class_3Speaker3Mic/u_USB_Audio_Class/usb_fifo_inst/usb_rx_buf_ep4/pkt_fifo_wr_data_0_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 1
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%
Arrival Data Path Delay cell: 0.000, 0.000%; route: 1.307, 86.618%; tC2Q: 0.202, 13.382%
Required Clock Path Delay cell: 0.000, 0.000%; route: 1.511, 100.000%

Minimum Pulse Width Report:

Report Command:report_min_pulse_width -nworst 10 -detail

MPW1

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_2_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_2_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_2_s0/CLK

MPW2

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_1_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_1_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_1_s0/CLK

MPW3

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_0_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_0_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/rx_data_0_s0/CLK

MPW4

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_wr_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_wr_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_wr_s0/CLK

MPW5

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/DRU_500M_Top/u_dru_500m_logic/ID_15_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/DRU_500M_Top/u_dru_500m_logic/ID_15_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/DRU_500M_Top/u_dru_500m_logic/ID_15_s0/CLK

MPW6

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wq2_rptr_1_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wq2_rptr_1_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/Equal.wq2_rptr_1_s0/CLK

MPW7

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/rbin_num_1_s0/CLK

MPW8

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Empty_s0/CLK

MPW9

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s/CLKB

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_tx_phy/u_fifo_8to4/fifo_8to4_sub_inst/Small.mem_Small.mem_0_0_s/CLKB

MPW10

MPW Summary:

Slack: 2.403
Actual Width: 3.403
Required Width: 1.000
Type: Low Pulse Width
Clock: CLK_120M
Objects: u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0

Late clock Path:

AT DELAY TYPE RF NODE
4.167 0.000 active clock edge time
4.167 0.000 CLK_120M
4.167 0.000 tCL FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
6.441 2.274 tNET FF u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
8.333 0.000 active clock edge time
8.333 0.000 CLK_120M
8.333 0.000 tCL RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/clkdiv_inst/CLKOUT
9.844 1.511 tNET RR u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/i_rx_phy/u_cdr_serdes_x8_dx/fifo_rx/fifo_4to8_sub_inst/reset_w_1_s0/CLK

High Fanout Nets Report:

Report Command:report_high_fanout_nets -max_nets 10

FANOUT NET NAME WORST SLACK MAX DELAY
3021 phy_clkout 0.294 2.274
1023 CLK_98304 0.437 2.274
1002 phy_reset 6.023 2.063
214 descrom_raddr[4] 1.070 3.143
201 descrom_raddr[3] 1.692 3.098
186 descrom_raddr[0] 0.294 3.900
184 descrom_raddr[2] 0.355 4.110
179 descrom_raddr[1] 0.453 5.391
159 sclk 2.129 2.274
128 FU_ep[0] 8.492 1.616

Route Congestions Report:

Report Command:report_route_congestion -max_grids 10

GRID LOC ROUTE CONGESTIONS
R25C33 91.67%
R23C31 90.28%
R47C17 90.28%
R24C33 88.89%
R9C3 88.89%
R38C38 87.50%
R48C44 87.50%
R8C34 87.50%
R24C38 87.50%
R34C34 86.11%

Timing Exceptions Report:

Setup Analysis Report

Report Command:report_exceptions -setup -max_paths 5 -max_common_paths 1

No timing exceptions to report!

Hold Analysis Report

Report Command:report_exceptions -hold -max_paths 5 -max_common_paths 1

No timing exceptions to report!

Recovery Analysis Report

Report Command:report_exceptions -recovery -max_paths 5 -max_common_paths 1

No timing exceptions to report!

Removal Analysis Report

Report Command:report_exceptions -removal -max_paths 5 -max_common_paths 1

No timing exceptions to report!

Timing Constraints Report:

SDC Command Type State Detail Command
TC_CLOCK Actived create_clock -name PHY_CLKOUT -period 16.667 -waveform {0 8.334} [get_pins {Gowin_rPLL/rpll_inst/CLKOUTD}]
TC_CLOCK Actived create_clock -name CLK_480M -period 2.083 -waveform {0 1.042} [get_pins {Gowin_rPLL/rpll_inst/CLKOUT}]
TC_CLOCK Actived create_clock -name CLK_12M -period 83.333 -waveform {0 41.666} [get_nets {CLK_12M}]
TC_CLOCK Actived create_clock -name CLK_IIS -period 122.07 -waveform {0 61.035} [get_nets {CLK_IIS}]
TC_CLOCK Actived create_clock -name CLK_120M -period 8.333 -waveform {0 4.167} [get_nets {u_USB_SoftPHY_Top/usb2_0_softphy/u_usb_20_phy_utmi/u_usb2_0_softphy/u_usb_phy_hs/sclk}]
TC_CLOCK Actived create_clock -name clk_98304 -period 10.173 -waveform {0 5.087} [get_pins {iis_rPLL/rpll_inst/CLKOUT}]
TC_CLOCK_GROUP Actived set_clock_groups -asynchronous -group [get_clocks {PHY_CLKOUT}] -group [get_clocks {CLK_120M}]
TC_CLOCK_GROUP Actived set_clock_groups -asynchronous -group [get_clocks {PHY_CLKOUT}] -group [get_clocks {CLK_480M}]
TC_CLOCK_GROUP Actived set_clock_groups -asynchronous -group [get_clocks {PHY_CLKOUT}] -group [get_clocks {clk_98304}]